return ROK;
}
+#ifdef OAI_TESTING
+uint16_t reverseBytes16(uint16_t num) {
+ return (num >> 8) | (num << 8);
+}
+
+uint32_t reverseBytes32(uint32_t num) {
+ return ((num >> 24) & 0x000000FF) |
+ ((num >> 8) & 0x0000FF00) |
+ ((num << 8) & 0x00FF0000) |
+ ((num << 24) & 0xFF000000);
+}
+#endif
+
#ifdef INTEL_FAPI
/*******************************************************************
*
void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen)
{
memset(hdr, 0, sizeof(fapi_msg_t));
- hdr->msg_id = msgType;
- hdr->length = msgLen;
+#ifdef OAI_TESTING
+ hdr->msg_id = reverseBytes16(msgType);
+ hdr->length = reverseBytes32(msgLen);
+#else
+ hdr->msg_id = (msgType);
+ hdr->length = (msgLen);
+#endif
}
/*******************************************************************
void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
uint32_t value, uint32_t *msgLen)
{
- tlv->tl.tag = tag;
- tlv->tl.length = length;
- tlv->value = value;
+#ifdef OAI_TESTING
+ tlv->tl.tag = reverseBytes16(tag);
+ tlv->tl.length = reverseBytes16(length);
+ tlv->value = reverseBytes32(value);
+#else
+ tlv->tl.tag = (tag);
+ tlv->tl.length = (length);
+ tlv->value = (value);
+#endif
*msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
+
}
/*******************************************************************
*
******************************************************************/
void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
{
+#ifndef OAI_TESTING
*mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
*val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
+#else
+ *mibPdu |= ((uint8_t)((sfn >> 4) & 0x3f) << 1);
+ *val = (mibPdu[2] << 24 | mibPdu[1] << 16 | mibPdu[0] << 8);
+#endif
DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
}
}
#endif
+#ifdef OAI_TESTING
+
/*******************************************************************
*
- * @brief Sends FAPI Config req to PHY
+ * @brief Pack and send DL TTI message to OAI L1
*
* @details
*
- * Function : lwr_mac_procConfigReqEvt
+ * Function : packDlTtiReq
*
* Functionality:
- * -Sends FAPI Config Req to PHY
+ * -Pack and send DL TTI message to OAI L1
*
- * @params[in]
+ * @params[in] fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len
+ * @return Void
+ *
+ * ****************************************************************/
+
+void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len)
+{
+ uint8_t pduIdx = 0, freqIdx = 0, dciIndex = 0, ueGrpIdx = 0;
+ uint8_t numBytes = 0, ret = ROK;
+ uint32_t totalLen=0,lenIdx=0, lenDifference=0;
+ uint8_t *mBuf = out;
+
+ //header
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->header.numMsg, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->header.opaque, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16,dlTtiReq->header.msg_id, &mBuf, &totalLen);
+ dlTtiReq->header.length = totalLen; // Update header length with the total length
+
+ CMCHKPKLEN(oduPackPostUInt32,dlTtiReq->header.length, &mBuf, &totalLen);
+
+
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->sfn, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->slot, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->nPdus, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->nGroup, &mBuf, &totalLen);
+ for(pduIdx = 0; pduIdx < dlTtiReq->nPdus; pduIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pduType, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pduSize, &mBuf, &totalLen);
+ lenIdx=totalLen;
+ switch(reverseBytes16(dlTtiReq->pdus[pduIdx].pduType))
+ {
+ case FAPI_PDCCH_PDU_TYPE:
+ {
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.bwpSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.bwpStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.subCarrierSpacing, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.cyclicPrefix, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.startSymbolIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.durationSymbols, &mBuf, &totalLen);
+ for(freqIdx = 0; freqIdx < 6; freqIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.freqDomainResource[freqIdx], &mBuf, &totalLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.cceRegMappingType, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.regBundleSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.interleaverSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.coreSetType, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.shiftIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.precoderGranularity, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.numDlDci, &mBuf, &totalLen);
+ // Extract the pdcch_pdu fields for the given pduIdx
+
+ for(dciIndex = 0; dciIndex < reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.numDlDci); dciIndex++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].rnti, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingRnti, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].cceIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].aggregationLevel, &mBuf, &totalLen);
+
+ fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].pc_and_bform;
+
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->numPrgs), &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->prgSize), &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen);
+
+ for(uint16_t prgIdx = 0; prgIdx < preCodingAndBeamforming->numPrgs; prgIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen);
+ for(uint8_t digBfIdx = 0; digBfIdx < preCodingAndBeamforming->digBfInterfaces; digBfIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen);
+ }
+ }
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].beta_pdcch_1_0, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].powerControlOffsetSS, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits, &mBuf, &totalLen);
+ numBytes = reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits) / 8;
+
+ if(reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits) % 8)
+ {
+ numBytes += 1;
+ }
+ for(uint8_t payloadIdx = 0; payloadIdx < numBytes; payloadIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payload[payloadIdx], &mBuf, &totalLen);
+ }
+ }
+ lenDifference=totalLen- lenIdx;
+ *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference);
+ break;
+ }
+
+ case FAPI_PDSCH_PDU_TYPE:
+ {
+
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rnti, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pdu_index, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.bwpSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.bwpStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.subCarrierSpacing, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cyclicPrefix, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfCodeWords, &mBuf, &totalLen);
+
+ for(uint8_t cwIdx = 0; cwIdx < dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfCodeWords; cwIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].targetCodeRate, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].qamModOrder, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].mcsIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].mcsTable, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].rvIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].tbSize, &mBuf, &totalLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dataScramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfLayers, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.transmissionScheme, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.refPoint, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlDmrsSymbPos, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dmrsConfigType, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlDmrsScramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.scid, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.numDmrsCdmGrpsNoData, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dmrsPorts, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.resourceAlloc, &mBuf, &totalLen);
+ for(uint8_t rbBitMapIdx = 0; rbBitMapIdx < 36; rbBitMapIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rbBitmap[rbBitMapIdx], &mBuf, &totalLen);
+ }
+
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rbStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rbSize, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.vrbToPrbMapping, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.startSymbIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfSymbols, &mBuf, &totalLen);
+ if (reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap) & 0b1)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsPortIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsTimeDensity, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsFreqDensity, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsReOffset, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nEpreRatioOfPdschToPtrs, &mBuf, &totalLen);
+ }
+ fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.preCodingAndBeamforming;
+
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->numPrgs), &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->prgSize), &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen);
+
+ for(uint16_t prgIdx = 0; prgIdx < (preCodingAndBeamforming->numPrgs); prgIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen);
+ for(uint8_t digBfIdx = 0; digBfIdx < (preCodingAndBeamforming->digBfInterfaces); digBfIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen);
+ }
+ }
+
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.powerControlOffset, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.powerControlOffsetSS, &mBuf, &totalLen);
+ if (reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap) & 0b10)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.isLastCbPresent, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.isInlineTbCrc, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlTbCrc, &mBuf, &totalLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes, &mBuf, &totalLen);
+ lenDifference=totalLen- lenIdx;
+ *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference);
+ break;
+ }
+
+ case FAPI_PBCH_PDU_TYPE:
+ {
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.physCellId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.betaPss, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.ssbBlockIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.ssbSubCarrierOffset, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.ssbOffsetPointA, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.bchPayloadFlag, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.bchPayload.bchPayload, &mBuf, &totalLen);
+ fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.preCodingAndBeamforming;
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->numPrgs, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->prgSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen);
+
+ for(uint16_t prgIdx = 0; prgIdx < reverseBytes16(preCodingAndBeamforming->numPrgs); prgIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen);
+ for(uint8_t digBfIdx = 0; digBfIdx < (preCodingAndBeamforming->digBfInterfaces); digBfIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen);
+ }
+ }
+ lenDifference=totalLen- lenIdx;
+ *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference);
+
+ break;
+ }
+ default:
+ {
+ return NULLP;
+ }
+ }
+ }
+ for(ueGrpIdx = 0; ueGrpIdx < dlTtiReq->nGroup; ueGrpIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->ue_grp_info[ueGrpIdx].nUe, &mBuf, &totalLen);
+
+ for(uint8_t ueIdx = 0; ueIdx < dlTtiReq->ue_grp_info[ueGrpIdx].nUe; ueIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->ue_grp_info[ueGrpIdx].pduIdx[ueIdx], &mBuf, &totalLen);
+ }
+ }
+ if(totalLen !=sizeof(fapi_dl_tti_req_t))
+ {
+ *((uint32_t *)(out + 4)) = reverseBytes32(totalLen);
+ }
+
+ *len=totalLen;
+
+}
+
+/*******************************************************************
+ *
+ * @brief Pack and send UL TTI message to OAI L1
+ *
+ * @details
+ *
+ * Function : packUlTtiReq
+ *
+ * Functionality:
+ * -Pack and send UL TTI message to OAI L1
+ *
+ * @params[in] fapi_ul_tti_req_t *ulTti,uint8_t *out, uint32_t *len
+ * @return Void
+ *
+ * ****************************************************************/
+
+void packUlTtiReq(fapi_ul_tti_req_t *ulTtiReq,uint8_t *out, uint32_t *len)
+{
+ uint8_t pduIdx = 0, ueGrpIdx = 0, ret = ROK;
+ uint32_t lenIdx=0, lenDifference=0, totalLen=0;
+
+
+ uint8_t *mBuf = out;
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->header.numMsg, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->header.opaque, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16,ulTtiReq->header.msg_id, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32,ulTtiReq->header.length, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->sfn, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->slot, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nPdus, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->rachPresent, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nUlsch, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nUlcch, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nGroup, &mBuf, &totalLen);
+
+ for(pduIdx = 0; pduIdx < ulTtiReq->nPdus; pduIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pduType, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pduSize, &mBuf, &totalLen);
+ lenIdx=totalLen;
+ switch(reverseBytes16(ulTtiReq->pdus[pduIdx].pduType))
+ {
+ case FAPI_PRACH_PDU_TYPE:
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.physCellId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.numPrachOcas, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.prachFormat, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.numRa, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.prachStartSymbol, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.numCs, &mBuf, &totalLen);
+ fapi_ul_rx_bmform_pdu_t *ulBmform=&ulTtiReq->pdus[pduIdx].pdu.prach_pdu.beamforming;
+ CMCHKPKLEN(oduPackPostUInt8, ulBmform->trp_scheme, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->numPrgs, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->prgSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulBmform->digBfInterface, &mBuf, &totalLen);
+
+ for(uint8_t prgIdx = 0; prgIdx < reverseBytes16(ulBmform->numPrgs); prgIdx++)
+ {
+ for(uint8_t digBfIdx = 0; digBfIdx < ulBmform->digBfInterface; digBfIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->rx_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen);
+ }
+ }
+ lenDifference=totalLen- lenIdx;
+ *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference);
+ break;
+ }
+ case FAPI_PUSCH_PDU_TYPE:
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rnti, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.handle, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.bwpSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.bwpStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.subCarrierSpacing, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.cyclicPrefix, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.targetCodeRate, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.qamModOrder, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.mcsIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.mcsTable, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.transformPrecoding, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dataScramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.nrOfLayers, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.ulDmrsSymbPos, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dmrsConfigType, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.ulDmrsScramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschIdentity, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.scid, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.numDmrsCdmGrpsNoData, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dmrsPorts, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.resourceAlloc, &mBuf, &totalLen);
+ for(uint8_t rbBitMapIdx = 0; rbBitMapIdx < 36; rbBitMapIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rbBitmap[rbBitMapIdx], &mBuf, &totalLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rbStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rbSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.vrbToPrbMapping, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.frequencyHopping, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.txDirectCurrentLocation, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.uplinkFrequencyShift7p5khz, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.startSymbIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.nrOfSymbols, &mBuf, &totalLen);
+
+ //Fill fapi_pusch_data_t
+ if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x01)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.rvIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.harqProcessId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.newDataIndicator, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.tbSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.numCb, &mBuf, &totalLen);
+ for(int i=0;i<reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.numCb);i++)
+ {
+ //TODO - Above loop length must be cb length= (numCB+7)/8;
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.cbPresentAndPosition[i], &mBuf, &totalLen);
+ }
+ }
+ //Fill fapi_pusch_uci_t
+ if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x02)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.harqAckBitLength, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.csiPart1BitLength, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.csiPart2BitLength, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.alphaScaling, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.betaOffsetHarqAck, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.betaOffsetCsi1, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.betaOffsetCsi2, &mBuf, &totalLen);
+ }
+
+ //Fill fapi_pusch_ptrs_t
+ if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x04)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.numPtrsPorts, &mBuf, &totalLen);
+ for(uint8_t portIdx = 0; portIdx < ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.numPtrsPorts; portIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsInfo[portIdx].ptrsPortIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsInfo[portIdx].ptrsDmrsPort, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsInfo[portIdx].ptrsReOffset, &mBuf, &totalLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsTimeDensity, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsFreqDensity, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ulPtrsPower, &mBuf, &totalLen);
+ }
+ //Fill fapi_dfts_ofdm_t
+ if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x08)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.lowPaprGroupNumber, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.lowPaprSequenceNumber, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.ulPtrsSampleDensity, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.ulPtrsTimeDensityTransformPrecoding, &mBuf, &totalLen);
+ }
+
+ //Fill fapi_ul_rx_bmform_pdu_t
+ fapi_ul_rx_bmform_pdu_t *ulBmform=&ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.beamforming;
+ CMCHKPKLEN(oduPackPostUInt8, ulBmform->trp_scheme, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->numPrgs, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->prgSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulBmform->digBfInterface, &mBuf, &totalLen);
+
+ for(uint8_t prgIdx = 0; prgIdx < reverseBytes16(ulBmform->numPrgs); prgIdx++)
+ {
+ for(uint8_t digBfIdx = 0; digBfIdx < ulBmform->digBfInterface; digBfIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->rx_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen);
+ }
+ }
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.maintParamV3.ldpcBaseGraph, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.maintParamV3.tbSizeLbrmBytes, &mBuf, &totalLen);
+ lenDifference=totalLen- lenIdx;
+ *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference);
+ break;
+ }
+ case FAPI_PUCCH_PDU_TYPE:
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.rnti, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.handle, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bwpSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bwpStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.subCarrierSpacing, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.cyclicPrefix, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.formatType, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.multiSlotTxIndicator, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.pi2Bpsk, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.prbStart, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.prbSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.startSymbolIndex, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.nrOfSymbols, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.freqHopFlag, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.secondHopPrb, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.groupHopFlag, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.sequenceHopFlag, &mBuf, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.hoppingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.initialCyclicShift, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.dataScramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.timeDomainOccIdx, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.preDftOccIdx, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.preDftOccLen, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.addDmrsFlag, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.dmrsScramblingId, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.dmrsCyclicShift, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.srFlag, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bitLenHarq, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bitLenCsiPart1, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bitLenCsiPart2, &mBuf, &totalLen);
+
+ //Fill fapi_ul_rx_bmform_pdu_t
+ fapi_ul_rx_bmform_pdu_t *ulBmform=&ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.beamforming;
+ CMCHKPKLEN(oduPackPostUInt8, ulBmform->trp_scheme, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->numPrgs, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->prgSize, &mBuf, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, ulBmform->digBfInterface, &mBuf, &totalLen);
+
+ for(uint8_t prgIdx = 0; prgIdx < reverseBytes16(ulBmform->numPrgs); prgIdx++)
+ {
+ for(uint8_t digBfIdx = 0; digBfIdx < ulBmform->digBfInterface; digBfIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, ulBmform->rx_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen);
+ }
+ }
+ lenDifference=totalLen- lenIdx;
+ *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference);
+ break;
+ }
+ default:
+ {
+ return RFAILED;
+ }
+ }
+ }
+
+ for(ueGrpIdx = 0; ueGrpIdx < ulTtiReq->nGroup; ueGrpIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->ueGrpInfo[ueGrpIdx].nUe, &mBuf, &totalLen);
+ for(uint8_t ueIdx = 0; ueIdx < ulTtiReq->ueGrpInfo[ueGrpIdx].nUe; ueIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->ueGrpInfo[ueGrpIdx].pduIdx[ueIdx], &mBuf, &totalLen);
+ }
+ }
+
+ *len=totalLen;
+ if(totalLen != sizeof(fapi_ul_tti_req_t))
+ {
+ *((uint32_t *)(out + 4)) = reverseBytes32(totalLen);
+ }
+
+}
+
+/*******************************************************************
+ *
+ * @brief Pack and send TX Data Req message to OAI L1
+ *
+ * @details
+ *
+ * Function : packTxDataReqBuffer
+ *
+ * Functionality:
+ * -Pack and send TX Data Req message to OAI L1
+ *
+ * @params[in] fapi_tx_data_req_t *txdata, uint8_t *mBuf ,uint32_t *len
+ * @return Void
+ *
+ * ****************************************************************/
+
+void packTxDataReqBuffer(fapi_tx_data_req_t *txDataReq, uint8_t *mBuf ,uint32_t *len)
+{
+ uint16_t pduIdx = 0;
+ uint8_t ret = ROK;
+ uint16_t payloadSize = 0;
+ uint32_t totalLen = 0;
+
+ uint8_t *out = mBuf;
+
+ CMCHKPKLEN(oduPackPostUInt8, txDataReq->header.numMsg, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt8, txDataReq->header.opaque, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, txDataReq->header.msg_id, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, txDataReq->header.length, &out, &totalLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, txDataReq->sfn, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, txDataReq->slot, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, txDataReq->num_pdus, &out, &totalLen);
+
+ for (pduIdx = 0; pduIdx <reverseBytes16( txDataReq->num_pdus); pduIdx++)
+ {
+
+ CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].pdu_length, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt16, txDataReq->pdu_desc[pduIdx].pdu_index, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].num_tlvs, &out, &totalLen);
+
+ for (uint32_t tlvIdx = 0; tlvIdx < reverseBytes32(txDataReq->pdu_desc[pduIdx].num_tlvs); tlvIdx++)
+ {
+
+ CMCHKPKLEN(oduPackPostUInt16, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].tag, &out, &totalLen);
+ CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].length, &out, &totalLen);
+
+ payloadSize = reverseBytes32(txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].length);
+ payloadSize = (payloadSize + 3 )/4;
+ for (uint32_t payloadByte = 0; payloadByte < payloadSize; payloadByte++)
+ {
+ //TODO- CHeck
+ CMCHKPKLEN(oduPackPostUInt32_S, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].value.direct[payloadByte], &out, &totalLen);
+ }
+ }
+ }
+
+ *len = totalLen;
+ if(totalLen != sizeof(fapi_tx_data_req_t))
+ {
+ *((uint32_t *)(mBuf + 4)) = reverseBytes32(totalLen);
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Pack and send Config Req message to OAI L1
+ *
+ * @details
+ *
+ * Function : packConfigReq
+ *
+ * Functionality:
+ * -Pack and send Config Req message to OAI L1
+ *
+ * @params[in] fapi_config_req_t *configReq,uint8_t *mBuf,uint32_t *len
+ * @return Void
+ *
+ * ****************************************************************/
+
+void packConfigReq(fapi_config_req_t *configReq, uint8_t *mBuf, uint32_t *len)
+{
+ uint8_t *out = mBuf;
+ uint32_t msgLen = 0;
+ uint16_t totalTlv = 0;
+ uint16_t tlvSize=10;//uint16_t [5]
+ uint16_t value[5] = {0,273,0,0,0};
+
+ CMCHKPKLEN(oduPackPostUInt8, configReq->header.numMsg, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt8, configReq->header.opaque, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt16, configReq->header.msg_id, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt32, configReq->header.length, &out, &msgLen);
+
+ totalTlv = configReq->number_of_tlvs;
+ uint8_t randmTlvCnt= 25; //This value is randomly assigned
+ CMCHKPKLEN(oduPackPostUInt8, randmTlvCnt, &out, &msgLen);
+
+ for(uint16_t idx=0;idx<totalTlv;idx++)
+ {
+ fapi_uint32_tlv_t tlv =configReq->tlvs[idx];
+
+ CMCHKPKLEN(oduPackPostUInt16, tlv.tl.tag, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt16, tlv.tl.length, &out, &msgLen);
+ switch(reverseBytes16(tlv.tl.length))
+ {
+ case 1:
+ {
+ uint8_t val=tlv.value;
+ CMCHKPKLEN(oduPackPostUInt8, val, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt8, 0, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt8, 0, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt8, 0, &out, &msgLen);
+ break;
+ }
+ case 2:
+ {
+ uint16_t val=tlv.value;
+ CMCHKPKLEN(oduPackPostUInt16, val, &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt16, 0, &out, &msgLen);
+ break;
+ }
+ case 4:
+ {
+ uint32_t val=tlv.value;
+ CMCHKPKLEN(oduPackPostUInt32, val, &out, &msgLen);
+ break;
+ }
+
+
+ }
+ }
+ // adding dlGridSize and ulGridSize tlv
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(FAPI_DL_GRIDSIZE_TAG), &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(tlvSize), &out, &msgLen);
+ for(uint8_t arrIdx=0;arrIdx<5;arrIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(value[arrIdx]), &out, &msgLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt16, 0, &out, &msgLen);
+
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(FAPI_UL_GRID_SIZE_TAG), &out, &msgLen);
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(tlvSize), &out, &msgLen);
+ for(uint8_t arrIdx=0;arrIdx<5;arrIdx++)
+ {
+ CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(value[arrIdx]), &out, &msgLen);
+ }
+ CMCHKPKLEN(oduPackPostUInt16, 0, &out, &msgLen);
+
+ *len = msgLen;
+ if(msgLen != sizeof(configReq->header.length))
+ {
+ *((uint32_t *)(mBuf + 4)) = reverseBytes32(msgLen);
+ }
+}
+
+#define TLV_ALIGN(_tlv_size) (32-_tlv_size)
+/*******************************************************************
+ *
+ * @brief Build FAPI Config Req as per OAI code and send to PHY
+ *
+ * @details
+ *
+ * Function : buildAndSendOAIConfigReqToL1
+ *
+ * Functionality:
+ * -Build FAPI Config Req as per OAI code and send to PHY
+ *
+ * @params[in] void *msg
* @return ROK - success
* RFAILED - failure
*
* ****************************************************************/
-
-uint8_t lwr_mac_procConfigReqEvt(void *msg)
+uint8_t buildAndSendOAIConfigReqToL1(void *msg)
{
#ifdef INTEL_FAPI
#ifdef CALL_FLOW_DEBUG_LOG
DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
#endif
#ifdef NR_TDD
- uint8_t slotIdx = 0;
+ uint8_t slotIdx = 0;
uint8_t symbolIdx =0;
uint8_t numSlotsInMaxPeriodicity = 0; /*number of TDD Slots in MAX_PERIODICITY(10ms) as per numerology*/
uint8_t numSlotsInCurrPeriodicity = 0; /*number of TDD Slots in Configured_PERIODICITY(0.5ms to 10ms) as per numerology*/
uint8_t cntSlotCfg = 0; /*number of Slot Cfg repeatition*/
-#endif
+#endif
+ uint16_t totalTlv=0;
uint16_t index = 0;
uint16_t *cellId =NULLP;
uint16_t cellIdx =0;
uint32_t msgLen = 0;
+ uint32_t totalCfgReqMsgLen=0;
uint32_t mib = 0;
uint32_t dlFreq = 0, ulFreq = 0;
MacCellCfg macCfgParams;
- fapi_vendor_msg_t *vendorMsg;
fapi_config_req_t *configReq;
fapi_msg_header_t *msgHeader;
p_fapi_api_queue_elem_t headerElem;
- p_fapi_api_queue_elem_t vendorMsgQElem;
p_fapi_api_queue_elem_t cfgReqQElem;
DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
/* Fill Cell Configuration in lwrMacCb */
memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
- lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
+ lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
lwrMacCb.numCell++;
-#ifdef NR_TDD
+ uint16_t psize=sizeof(fapi_api_queue_elem_t)+(sizeof(fapi_config_req_t));
+
+#ifndef NR_TDD
+ totalTlv = 24;
+#else
numSlotsInMaxPeriodicity = MAX_TDD_PERIODICITY * pow(2, macCb.macCell[cellIdx]->numerology);
numSlotsInCurrPeriodicity = calcNumSlotsInCurrPeriodicity(macCfgParams.tddCfg.tddPeriod, macCb.macCell[cellIdx]->numerology);
}
DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in MAX_PERIOICITY(10ms) = %d", numSlotsInMaxPeriodicity);
DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in CURRENT PERIOICITY(enumVal = %d) = %d\n", macCfgParams.tddCfg.tddPeriod, numSlotsInCurrPeriodicity);
+ //configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
+ totalTlv = 26 + 1+ numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT;
#endif
-
- /* Allocte And fill Vendor msg */
- LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
- if(!vendorMsgQElem)
- {
- DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
- return RFAILED;
- }
- FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
- vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
- fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
- vendorMsg->config_req_vendor.hopping_id = 0;
- vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
- vendorMsg->config_req_vendor.group_hop_flag = 0;
- vendorMsg->config_req_vendor.sequence_hop_flag = 0;
- vendorMsg->config_req_vendor.urllc_capable = 0;
- vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
- vendorMsg->config_req_vendor.nr_of_dl_ports =1;
- vendorMsg->config_req_vendor.nr_of_ul_ports =1;
- vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
- vendorMsg->config_req_vendor.ssb_subc_spacing =1;
- vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
- vendorMsg->start_req_vendor.sfn = 0;
- vendorMsg->start_req_vendor.slot = 0;
- vendorMsg->start_req_vendor.mode = 4;
-#ifdef DEBUG_MODE
- vendorMsg->start_req_vendor.count = 0;
- vendorMsg->start_req_vendor.period = 1;
-#endif
+ /* totalCfgReqMsgLen = size of config req's msg header + size of tlv supporting + size of tlv supporting *sizeof(fapi_uint32_tlv_t) */
+ totalCfgReqMsgLen += sizeof(configReq->header) + sizeof( configReq->number_of_tlvs) + totalTlv*sizeof(fapi_uint32_tlv_t);
+
/* Fill FAPI config req */
- LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
- if(!cfgReqQElem)
- {
- DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
- LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
- return RFAILED;
- }
- FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
- sizeof(fapi_config_req_t));
-
- configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
+ LWR_MAC_ALLOC(configReq, sizeof(fapi_config_req_t));
memset(configReq, 0, sizeof(fapi_config_req_t));
- fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
-#ifndef NR_TDD
- configReq->number_of_tlvs = 25;
-#else
- configReq->number_of_tlvs = 25 + 1 + numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT;
-#endif
-
+ fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, totalCfgReqMsgLen);
+ configReq->number_of_tlvs = totalTlv;
msgLen = sizeof(configReq->number_of_tlvs);
fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
- sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
+ sizeof(uint16_t), macCfgParams.carrCfg.dlBw << TLV_ALIGN(16) , &msgLen);
dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
- sizeof(uint32_t), dlFreq, &msgLen);
- /* Due to bug in Intel FT code, commenting TLVs that are are not
+ sizeof(uint32_t), dlFreq << TLV_ALIGN(32), &msgLen);
+ /* Due to bug in Intel FT code, commenting TLVs that are are not
* needed to avoid error. Must be uncommented when FT bug is fixed */
//fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
- sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
+ sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt << TLV_ALIGN(16), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
- sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
+ sizeof(uint16_t), macCfgParams.carrCfg.ulBw << TLV_ALIGN(16), &msgLen);
ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
- sizeof(uint32_t), ulFreq, &msgLen);
+ sizeof(uint32_t), ulFreq << TLV_ALIGN(32), &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
- sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
+ sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt << TLV_ALIGN(16), &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
/* fill cell config */
fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
- sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
+ sizeof(uint16_t), macCfgParams.cellCfg.phyCellId << TLV_ALIGN(16), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
- sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
+ sizeof(uint8_t), macCfgParams.cellCfg.dupType << TLV_ALIGN(8), &msgLen);
/* fill SSB configuration */
fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
- sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
- //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr << TLV_ALIGN(32), &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag<<TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
+ sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn << TLV_ALIGN(8), &msgLen);
/* fill PRACH configuration */
- //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
- sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
+ sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing) << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
+ sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
- sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
+ sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
- sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
+ sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
- sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
- //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx << TLV_ALIGN(16), &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
- sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1 << TLV_ALIGN(16), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
- sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg << TLV_ALIGN(8), &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
/* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
}*/
fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
+ sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach << TLV_ALIGN(8), &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
/* fill SSB table */
fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
- sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
+ sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA << TLV_ALIGN(16), &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod << TLV_ALIGN(8), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset << TLV_ALIGN(8), &msgLen);
setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
- sizeof(uint32_t), mib, &msgLen);
+ sizeof(uint32_t), mib << TLV_ALIGN(32), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
- sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0] << TLV_ALIGN(32), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
+ sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0] << TLV_ALIGN(8), &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
#ifdef NR_TDD
/* fill TDD table */
fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
- sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
+ sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod << TLV_ALIGN(8), &msgLen);
cntSlotCfg = numSlotsInMaxPeriodicity/numSlotsInCurrPeriodicity;
while(cntSlotCfg)
(slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
{
fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
- sizeof(uint8_t), DL_SYMBOL, &msgLen);
+ sizeof(uint8_t), DL_SYMBOL<< TLV_ALIGN(8), &msgLen);
}
/*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
{
fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
- sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
+ sizeof(uint8_t), FLEXI_SYMBOL<< TLV_ALIGN(8), &msgLen);
}
/*Fill Partial UL symbols and Full-UL slot*/
else
{
fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
- sizeof(uint8_t), UL_SYMBOL, &msgLen);
+ sizeof(uint8_t), UL_SYMBOL<< TLV_ALIGN(8), &msgLen);
}
}
}
cntSlotCfg--;
}
-#endif
+#endif
/* fill measurement config */
//fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
/* fill DMRS Type A Pos */
- fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
+ // fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
+ uint32_t bufferLen=0;
+ uint8_t mBuf[2500];
+ packConfigReq(configReq, mBuf, &bufferLen);
+ //hexdump1(mBuf, bufferLen);
+ LWR_MAC_ALLOC(cfgReqQElem,(sizeof(fapi_api_queue_elem_t)+bufferLen));
+
+ if(!cfgReqQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(cfgReqQElem, NULLP, FAPI_CONFIG_REQUEST, 1, bufferLen);
+ memcpy((uint8_t *)(cfgReqQElem +1), mBuf, bufferLen);
/* Fill message header */
LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
{
DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
- LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
sizeof(fapi_msg_header_t));
- msgHeader = (fapi_msg_header_t *)(headerElem + 1);
- msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
- msgHeader->handle = 0;
-
+ msgHeader = (fapi_msg_header_t*)(headerElem+1);
+ msgHeader->num_msg = 1; /* Config req msg */
+ msgHeader->handle = 0;
+
DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
LwrMacSendToL1(headerElem);
-#endif
-
+ LWR_MAC_FREE(configReq, sizeof(fapi_config_req_t));
return ROK;
-} /* lwr_mac_handleConfigReqEvt */
+#endif
+}
+#endif
/*******************************************************************
*
- * @brief Processes config response from phy
+ * @brief Sends FAPI Config req to PHY
*
* @details
*
- * Function : lwr_mac_procConfigRspEvt
+ * Function : lwr_mac_procConfigReqEvt
*
* Functionality:
- * Processes config response from phy
+ * -Sends FAPI Config Req to PHY
*
- * @params[in] FAPI message pointer
+ * @params[in]
* @return ROK - success
* RFAILED - failure
*
* ****************************************************************/
-uint8_t lwr_mac_procConfigRspEvt(void *msg)
+uint8_t lwr_mac_procConfigReqEvt(void *msg)
{
+#ifndef OAI_TESTING
#ifdef INTEL_FAPI
- fapi_config_resp_t *configRsp;
- configRsp = (fapi_config_resp_t *)msg;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
+#endif
+#ifdef NR_TDD
+ uint8_t slotIdx = 0;
+ uint8_t symbolIdx =0;
+ uint8_t numSlotsInMaxPeriodicity = 0; /*number of TDD Slots in MAX_PERIODICITY(10ms) as per numerology*/
+ uint8_t numSlotsInCurrPeriodicity = 0; /*number of TDD Slots in Configured_PERIODICITY(0.5ms to 10ms) as per numerology*/
+ uint8_t cntSlotCfg = 0; /*number of Slot Cfg repeatition*/
+#endif
+ uint16_t index = 0;
+ uint16_t *cellId =NULLP;
+ uint16_t cellIdx =0;
+ uint32_t msgLen = 0;
+ uint32_t mib = 0;
+ uint32_t dlFreq = 0, ulFreq = 0;
+ MacCellCfg macCfgParams;
+ fapi_vendor_msg_t *vendorMsg;
+ fapi_config_req_t *configReq;
+ fapi_msg_header_t *msgHeader;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t vendorMsgQElem;
+ p_fapi_api_queue_elem_t cfgReqQElem;
DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
- lwrMacCb.phyState);
+ lwrMacCb.phyState);
- if(configRsp != NULL)
+ cellId = (uint16_t *)msg;
+ GET_CELL_IDX(*cellId, cellIdx);
+ macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
+
+ /* Fill Cell Configuration in lwrMacCb */
+ memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
+ lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
+ lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
+ lwrMacCb.numCell++;
+#ifdef NR_TDD
+ numSlotsInMaxPeriodicity = MAX_TDD_PERIODICITY * pow(2, macCb.macCell[cellIdx]->numerology);
+ numSlotsInCurrPeriodicity = calcNumSlotsInCurrPeriodicity(macCfgParams.tddCfg.tddPeriod, macCb.macCell[cellIdx]->numerology);
+
+ if(numSlotsInCurrPeriodicity == 0)
{
- if(configRsp->error_code == MSG_OK)
+ DU_LOG("\nERROR --> LWR_MAC: CONFIG_REQ: numSlotsInCurrPeriodicity is 0 thus exiting");
+ return RFAILED;
+ }
+ DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in MAX_PERIOICITY(10ms) = %d", numSlotsInMaxPeriodicity);
+ DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in CURRENT PERIOICITY(enumVal = %d) = %d\n", macCfgParams.tddCfg.tddPeriod, numSlotsInCurrPeriodicity);
+#endif
+
+ /* Allocte And fill Vendor msg */
+ LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ if(!vendorMsgQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
+ vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
+ fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
+ vendorMsg->config_req_vendor.hopping_id = 0;
+ vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
+ vendorMsg->config_req_vendor.group_hop_flag = 0;
+ vendorMsg->config_req_vendor.sequence_hop_flag = 0;
+ vendorMsg->config_req_vendor.urllc_capable = 0;
+ vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
+ vendorMsg->config_req_vendor.nr_of_dl_ports =1;
+ vendorMsg->config_req_vendor.nr_of_ul_ports =1;
+ vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
+ vendorMsg->config_req_vendor.ssb_subc_spacing =1;
+ vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
+ vendorMsg->start_req_vendor.sfn = 0;
+ vendorMsg->start_req_vendor.slot = 0;
+ vendorMsg->start_req_vendor.mode = 4;
+#ifdef DEBUG_MODE
+ vendorMsg->start_req_vendor.count = 0;
+ vendorMsg->start_req_vendor.period = 1;
+#endif
+ /* Fill FAPI config req */
+ LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
+ if(!cfgReqQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
+ LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
+ sizeof(fapi_config_req_t));
+
+ configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
+ memset(configReq, 0, sizeof(fapi_config_req_t));
+ fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
+#ifndef NR_TDD
+ configReq->number_of_tlvs = 25;
+#else
+ configReq->number_of_tlvs = 25 + 1 + numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT;
+#endif
+
+ msgLen = sizeof(configReq->number_of_tlvs);
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
+ sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
+ dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
+ fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
+ sizeof(uint32_t), dlFreq, &msgLen);
+ /* Due to bug in Intel FT code, commenting TLVs that are are not
+ * needed to avoid error. Must be uncommented when FT bug is fixed */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
+ sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
+ sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
+ ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
+ fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
+ sizeof(uint32_t), ulFreq, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
+ sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
+ sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
+
+ /* fill cell config */
+ fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
+ sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
+ sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
+
+ /* fill SSB configuration */
+ fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
+
+ /* fill PRACH configuration */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
+ sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
+ sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
+ sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
+ /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
+ {
+ for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
+ fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
+ &msgLen);
+ }
+ else
+ {
+ macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
+ }*/
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
+
+ /* fill SSB table */
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
+ sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
+
+ setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
+ fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
+ sizeof(uint32_t), mib, &msgLen);
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
+
+#ifdef NR_TDD
+ /* fill TDD table */
+ fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
+ sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
+
+ cntSlotCfg = numSlotsInMaxPeriodicity/numSlotsInCurrPeriodicity;
+ while(cntSlotCfg)
+ {
+ for(slotIdx =0 ;slotIdx < numSlotsInCurrPeriodicity; slotIdx++)
+ {
+ for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
+ {
+ /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
+ if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
+ (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), DL_SYMBOL, &msgLen);
+ }
+
+ /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
+ else if(slotIdx < (numSlotsInCurrPeriodicity - macCfgParams.tddCfg.nrOfUlSlots -1) || \
+ (slotIdx == (numSlotsInCurrPeriodicity - macCfgParams.tddCfg.nrOfUlSlots -1) && \
+ symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
+ }
+ /*Fill Partial UL symbols and Full-UL slot*/
+ else
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), UL_SYMBOL, &msgLen);
+ }
+ }
+ }
+ cntSlotCfg--;
+ }
+#endif
+
+ /* fill measurement config */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
+ sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
+
+ /* fill DMRS Type A Pos */
+ fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
+ LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
+ msgHeader->handle = 0;
+
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
+ LwrMacSendToL1(headerElem);
+#endif
+#else
+ buildAndSendOAIConfigReqToL1(msg);
+#endif
+ return ROK;
+} /* lwr_mac_handleConfigReqEvt */
+
+/*******************************************************************
+ *
+ * @brief Processes config response from phy
+ *
+ * @details
+ *
+ * Function : lwr_mac_procConfigRspEvt
+ *
+ * Functionality:
+ * Processes config response from phy
+ *
+ * @params[in] FAPI message pointer
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+
+uint8_t lwr_mac_procConfigRspEvt(void *msg)
+{
+#ifdef INTEL_FAPI
+ fapi_config_resp_t *configRsp;
+ configRsp = (fapi_config_resp_t *)msg;
+
+ DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
+ lwrMacCb.phyState);
+
+ if(configRsp != NULL)
+ {
+ if(configRsp->error_code == MSG_OK)
{
DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
lwrMacCb.phyState = PHY_STATE_CONFIGURED;
* ****************************************************************/
uint8_t lwr_mac_procStartReqEvt(void *msg)
{
+#ifndef OAI_TESTING
#ifdef INTEL_FAPI
#ifdef CALL_FLOW_DEBUG_LOG
DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
LwrMacSendToL1(headerElem);
#endif
+#else
+ fapi_msg_header_t *msgHeader;
+ fapi_start_req_t *startReq;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t startReqElem;
+
+ /* Fill FAPI config req */
+ LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
+ if(!startReqElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(startReqElem, NULLP, FAPI_START_REQUEST, 1, sizeof(fapi_start_req_t));
+ startReq = (fapi_start_req_t *)(startReqElem + 1);
+ memset(startReq, 0, sizeof(fapi_start_req_t));
+ fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 1; /* Start req msg */
+ msgHeader->handle = 0;
+ /* Send to PHY */
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
+ LwrMacSendToL1(headerElem);
+#endif
return ROK;
} /* lwr_mac_procStartReqEvt */
fapi_stop_req_t *stopReq;
p_fapi_api_queue_elem_t stopReqElem;
+#ifndef OAI_TESTING
vendorMsg->sfn = slotInfo.sfn;
vendorMsg->slot = slotInfo.slot;
-
+#endif
/* Fill FAPI stop req */
LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
if(!stopReqElem)
uint32_t mibPayload = 0;
if(dlTtiReqPdu != NULL)
{
- dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
- dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pduType = reverseBytes16(SSB_PDU_TYPE); /* SSB PDU */
+ dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_ssb_pdu_t)); /* Size of SSB PDU */
+ dlTtiReqPdu->pdu.ssb_pdu.physCellId = reverseBytes16(macCellCfg->cellCfg.phyCellId);
+ dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = reverseBytes16(macCellCfg->ssbCfg.ssbOffsetPointA);
+#else
+ dlTtiReqPdu->pduType = (SSB_PDU_TYPE); /* SSB PDU */
+ dlTtiReqPdu->pduSize = (sizeof(fapi_dl_ssb_pdu_t)); /* Size of SSB PDU */
+ dlTtiReqPdu->pdu.ssb_pdu.physCellId = (macCellCfg->cellCfg.phyCellId);
+ dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = (macCellCfg->ssbCfg.ssbOffsetPointA);
+#endif
dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
- dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
+ dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
/* ssbOfPdufstA to be filled in ssbCfg */
- dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
/* Bit manipulation for SFN */
setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
- dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = reverseBytes32(mibPayload);
+ dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = reverseBytes16(1);
+ dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(275);
+ dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 1;
+ dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(0);
+ dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(macCellCfg->ssbCfg.beamId[0]);
+#else
+ dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = (mibPayload);
dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
- dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
- pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
- dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
+ dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
+#endif
return ROK;
}
return RFAILED;
uint8_t sysInfoIndSize = 1;
uint8_t reservedSize = 15;
+#ifdef OAI_TESTING
+ dlDciPtr[0].rnti = reverseBytes16(sib1PdcchInfo->dci[0].rnti);
+ dlDciPtr[0].scramblingId = reverseBytes16(sib1PdcchInfo->dci[0].scramblingId);
+ dlDciPtr[0].scramblingRnti = reverseBytes16(sib1PdcchInfo->dci[0].scramblingRnti);
+ dlDciPtr[0].pc_and_bform.numPrgs = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs);
+ dlDciPtr[0].pc_and_bform.prgSize = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize);
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx);
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]);
+#else
dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti;
dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId;
dlDciPtr[0].scramblingRnti = sib1PdcchInfo->dci[0].scramblingRnti;
- dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex;
- dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel;
dlDciPtr[0].pc_and_bform.numPrgs = sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs;
dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize;
- dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
+#endif
+ dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
+ dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex;
+ dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel;
dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
- dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
}
/* Fetching DCI field values */
+#ifndef OAI_TESTING
timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1;
+#else
+ timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex;
+#endif
VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex;
reserved = 0;
/* Reversing bits in each DCI field */
+#ifndef OAI_TESTING
freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
+#endif
/* Calulating total number of bytes in buffer */
dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
+ sysInfoIndSize + reservedSize;
-
numBytes = dlDciPtr[0].payloadSizeBits / 8;
if(dlDciPtr[0].payloadSizeBits % 8)
- numBytes += 1;
+ numBytes += 1;
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
- DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
- return;
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
}
-
+#ifdef OAI_TESTING
+ dlDciPtr[0].payloadSizeBits = reverseBytes16(dlDciPtr[0].payloadSizeBits);
+#endif
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
dlDciPtr[0].payload[bytePos] = 0;
bytePos = numBytes - 1;
+#ifndef OAI_TESTING
bitPos = 0;
+#else
+ bitPos = 1;
+#endif
/* Packing DCI format fields */
fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 6;
+#ifdef OAI_TESTING
+ dlDciPtr[0].rnti = reverseBytes16(P_RNTI);
+ dlDciPtr[0].scramblingId = reverseBytes16(macCellCfg->cellCfg.phyCellId);
+ dlDciPtr[0].scramblingRnti = reverseBytes16(0);
+#else
dlDciPtr[0].rnti = P_RNTI;
dlDciPtr[0].scramblingId = macCellCfg->cellCfg.phyCellId;
dlDciPtr[0].scramblingRnti = 0;
+#endif
dlDciPtr[0].cceIndex = dlPageAlloc->pageDlDci.cceIndex;
dlDciPtr[0].aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
dlDciPtr[0].pc_and_bform.numPrgs = 1;
numBytes += 1;
}
+#ifdef OAI_TESTING
+ dlDciPtr[0].payloadSizeBits = reverseBytes16(dlDciPtr[0].payloadSizeBits);
+#endif
+
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 16;
+#ifdef OAI_TESTING
+ dlDciPtr[0].rnti = reverseBytes16(rarPdcchInfo->dci[0].rnti);
+ dlDciPtr[0].scramblingId = reverseBytes16(rarPdcchInfo->dci[0].scramblingId);
+ dlDciPtr[0].scramblingRnti = reverseBytes16(rarPdcchInfo->dci[0].scramblingRnti);
+ dlDciPtr[0].pc_and_bform.numPrgs = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs);
+ dlDciPtr[0].pc_and_bform.prgSize = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.prgSize);
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx);
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]);
+#else
dlDciPtr[0].rnti = rarPdcchInfo->dci[0].rnti;
dlDciPtr[0].scramblingId = rarPdcchInfo->dci[0].scramblingId;
dlDciPtr[0].scramblingRnti = rarPdcchInfo->dci[0].scramblingRnti;
- dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex;
- dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel;
dlDciPtr[0].pc_and_bform.numPrgs = rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs;
dlDciPtr[0].pc_and_bform.prgSize = rarPdcchInfo->dci[0].beamPdcchInfo.prgSize;
- dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
+#endif
+ dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex;
+ dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel;
+ dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
dlDciPtr[0].beta_pdcch_1_0 = rarPdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
dlDciPtr[0].powerControlOffsetSS = rarPdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
numBytes = dlDciPtr[0].payloadSizeBits / 8;
if(dlDciPtr[0].payloadSizeBits % 8)
- numBytes += 1;
+ numBytes += 1;
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
- DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
- return;
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
}
+#ifdef OAI_TESTING
+ dlDciPtr[0].payloadSizeBits = reverseBytes16(39);
+#endif
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
dlDciPtr[0].payload[bytePos] = 0;
tbScaling, tbScalingSize);
fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
reserved, reservedSize);
+#ifdef OAI_TESTING
+ dlDciPtr[0].payload[4] = 0x15;
+#endif
+
}
} /* fillRarDlDciPdu */
for(dciIndex = 0; dciIndex < pdcchInfo->numDlDci; dciIndex++)
{
+#ifdef OAI_TESTING
+ dlDciPtr[dciIndex].rnti = reverseBytes16(pdcchInfo->dci[dciIndex].rnti);
+ dlDciPtr[dciIndex].scramblingId = reverseBytes16(pdcchInfo->dci[dciIndex].scramblingId);
+ dlDciPtr[dciIndex].scramblingRnti = reverseBytes16(pdcchInfo->dci[dciIndex].scramblingRnti);
+ dlDciPtr[dciIndex].pc_and_bform.numPrgs = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs);
+ dlDciPtr[dciIndex].pc_and_bform.prgSize = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize);
+ dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx);
+ dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0]);
+#else
dlDciPtr[dciIndex].rnti = pdcchInfo->dci[dciIndex].rnti;
dlDciPtr[dciIndex].scramblingId = pdcchInfo->dci[dciIndex].scramblingId;
dlDciPtr[dciIndex].scramblingRnti = pdcchInfo->dci[dciIndex].scramblingRnti;
- dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex;
- dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel;
dlDciPtr[dciIndex].pc_and_bform.numPrgs = pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs;
dlDciPtr[dciIndex].pc_and_bform.prgSize = pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize;
- dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces;
dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx;
dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0];
+#endif
+ dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex;
+ dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel;
+ dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces;
dlDciPtr[dciIndex].beta_pdcch_1_0 = pdcchInfo->dci[dciIndex].txPdcchPower.beta_pdcch_1_0;
dlDciPtr[dciIndex].powerControlOffsetSS = pdcchInfo->dci[dciIndex].txPdcchPower.powerControlOffsetSS;
if(dlDciPtr[dciIndex].payloadSizeBits % 8)
numBytes += 1;
+#ifdef OAI_TESTING
+ dlDciPtr[dciIndex].payloadSizeBits = reverseBytes16(dlDciPtr[dciIndex].payloadSizeBits);
+#endif
+
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
bwp = &pageAlloc->bwp;
fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg);
+#ifdef OAI_TESTING
+ /* Calculating PDU length. Considering only one dl dci pdu for now */
+ dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdcch_pdu_t));
+ dlTtiReqPdu->pduType = reverseBytes16(PDCCH_PDU_TYPE);
+ dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = reverseBytes16(bwp->freqAlloc.numPrb);
+ dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = reverseBytes16(bwp->freqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = reverseBytes16(pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex);
+ dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = reverseBytes16(1);
+#else
+ /* Calculating PDU length. Considering only one dl dci pdu for now */
dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
-
+ dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
+ dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1;
+
+ /* Filling Vendor message PDU */
+ dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
+ dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
+ dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
+ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
+ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
+#endif
dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pageAlloc->pageDlDci.cceRegMappingType;
dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
- dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity;
- dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1;
dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = CORESET_TYPE0;
- /* Calculating PDU length. Considering only one dl dci pdu for now */
- dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
- /* Filling Vendor message PDU */
- dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
- dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
- dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
- dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
- dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
}
}
return RFAILED;
}
- dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
- dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
- dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
+ /* Calculating PDU length. Considering only one dl dci pdu for now */
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdcch_pdu_t));
+ dlTtiReqPdu->pduType = reverseBytes16(PDCCH_PDU_TYPE);
+ dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = reverseBytes16(bwp->freqAlloc.numPrb);
+ dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = reverseBytes16(bwp->freqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = reverseBytes16(pdcchInfo->coresetCfg.shiftIndex);
+ dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = reverseBytes16(pdcchInfo->numDlDci);
+ memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, \
+ sizeof(uint8_t)*6);
+#else
+ dlTtiReqPdu->pduSize = (sizeof(fapi_dl_pdcch_pdu_t));
+ dlTtiReqPdu->pduType = (PDCCH_PDU_TYPE);
+ dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = (bwp->freqAlloc.numPrb);
+ dlTtiReqPdu->pdu.pdcch_pdu.bwpStart =(bwp->freqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = (pdcchInfo->coresetCfg.shiftIndex);
+ dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = (pdcchInfo->numDlDci);
+ convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
+ dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
+#endif
dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
- convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
- dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
- dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
- dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
- /* Calculating PDU length. Considering only one dl dci pdu for now */
- dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
+#ifndef OAI_TESTING
/* Filling Vendor message PDU */
dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_pdcch_to_ssb = 0;
dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_dmrs_to_ssb = 0;
}
+#endif
}
return ROK;
if(dlTtiReqPdu != NULLP)
{
- dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pduType = reverseBytes16(PDSCH_PDU_TYPE);
+ dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdsch_pdu_t));
+ dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = reverseBytes16(0); /* PTRS and CBG params are excluded */
+ dlTtiReqPdu->pdu.pdsch_pdu.rnti = reverseBytes16(P_RNTI);
+ dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = reverseBytes16(pduIndex);
+ dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = reverseBytes16(pageAlloc->bwp.freqAlloc.numPrb);
+ dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = reverseBytes16(pageAlloc->bwp.freqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = reverseBytes16(macCellCfg->cellCfg.phyCellId);
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = reverseBytes16(DL_DMRS_SYMBOL_POS);
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = reverseBytes16(macCellCfg->cellCfg.phyCellId);
+ dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = reverseBytes16(0x0001);
+ dlTtiReqPdu->pdu.pdsch_pdu.rbStart = reverseBytes16(pageAlloc->pageDlSch.freqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdsch_pdu.rbSize = reverseBytes16(pageAlloc->pageDlSch.freqAlloc.numPrb);
+#else
+ dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
+ dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */
dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI;
dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
+ dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
+#endif
dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing;
dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1;
for(idx = 0; idx < MAX_CODEWORDS ; idx++)
{
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0;
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = reverseBytes16(308);
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = reverseBytes32(pageAlloc->pageDlSch.tbInfo.tbSize);
+#else
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize;
+#endif
}
- dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1;
dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0;
dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0;
- dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType;
- dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
dlTtiReqPdu->pdu.pdsch_pdu.scid = 0;
dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1;
- dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1;
/* since we are using type-1, hence rbBitmap excluded */
- dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
- dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping;
dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0;
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0;
+#ifndef OAI_TESTING
dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pageAlloc->pageDlSch.timeAlloc.mappingType;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols;
dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
+#else
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = reverseBytes16(1);
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(0);
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(0);
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(0);
+#endif
- dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
/* DL TTI Request vendor message */
dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
if(dlTtiReqPdu != NULLP)
{
- dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pduType = reverseBytes16(PDSCH_PDU_TYPE);
+ dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdsch_pdu_t));
+ dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = reverseBytes16(pdschInfo->pduBitmap);
+ dlTtiReqPdu->pdu.pdsch_pdu.rnti = reverseBytes16(pdschInfo->rnti);
+ dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = reverseBytes16(pduIndex);
+ dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = reverseBytes16(bwp.freqAlloc.numPrb);
+ dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = reverseBytes16(bwp.freqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = reverseBytes16(pdschInfo->dataScramblingId);
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = reverseBytes16(pdschInfo->dmrs.dlDmrsSymbPos);
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = reverseBytes16(pdschInfo->dmrs.dlDmrsScramblingId);
+ dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = reverseBytes16(pdschInfo->dmrs.dmrsPorts);
+ dlTtiReqPdu->pdu.pdsch_pdu.rbStart = reverseBytes16(pdschInfo->pdschFreqAlloc.startPrb);
+ dlTtiReqPdu->pdu.pdsch_pdu.rbSize = reverseBytes16(pdschInfo->pdschFreqAlloc.numPrb);
+#else
+ dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
+ dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
+ dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
+ dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
+#endif
dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
for(idx = 0; idx < MAX_CODEWORDS ; idx++)
{
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = reverseBytes16(pdschInfo->codeword[idx].targetCodeRate);
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = reverseBytes32(pdschInfo->codeword[idx].tbSize);
+#else
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
+#endif
}
- dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
- dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
- dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
- dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
- dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
- pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
- dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
- beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
+#ifdef OAI_TESTING
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 1;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = reverseBytes16(0);
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(0);
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].pmIdx);
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].beamIdx[0]);
+ dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph=2;
+ dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes=reverseBytes32(57376);
+#else
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
+ dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
+#endif
- dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
-
+#ifndef OAI_TESTING
/* DL TTI Request vendor message */
dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
{
dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
}
+#endif
}
}
return count;
}
+uint8_t get_tlv_padding(uint16_t tlv_length)
+{
+ DU_LOG("\nDEBUG --> LWR_MAC: get_tlv_padding tlv_length %u = padding = %d\n",tlv_length, ((4 - (tlv_length % 4)) % 4));
+ return (4 - (tlv_length % 4)) % 4;
+}
+
/***********************************************************************
*
* @brief fills the SIB1 TX-DATA request message
uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
PdschCfg *pdschCfg)
{
+#ifndef OAI_TESTING
uint32_t payloadSize = 0;
uint8_t *sib1Payload = NULLP;
fapi_api_queue_elem_t *payloadElem = NULLP;
#else
pduDesc[pduIndex].tlvs[0].value = sib1Payload;
#endif
- pduDesc[pduIndex].pdu_length = payloadSize;
+ pduDesc[pduIndex].pdu_length = payloadSize;
-#ifdef INTEL_WLS_MEM
+#ifdef INTEL_WLS_MEM
addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
#else
LWR_MAC_FREE(sib1Payload, payloadSize);
#endif
+
+#else
+
+ uint8_t *sib1Payload = NULLP;
+ fapi_api_queue_elem_t *payloadElem = NULLP;
+#ifdef INTEL_WLS_MEM
+ void * wlsHdlr = NULLP;
+#endif
+ uint8_t tlvPaddingLen =get_tlv_padding(pdschCfg->codeword[0].tbSize);
+ uint16_t totalLen= pdschCfg->codeword[0].tbSize + 4;
+
+ pduDesc[pduIndex].pdu_length = totalLen;
+#ifdef OAI_TESTING
+ pduDesc[pduIndex].pdu_length = reverseBytes32(pduDesc[pduIndex].pdu_length);
+#endif
+ pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex);
+ pduDesc[pduIndex].num_tlvs = reverseBytes32(1);
+ pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(FAPI_TX_DATA_PAYLOAD);
+ pduDesc[pduIndex].tlvs[0].length = reverseBytes32(pdschCfg->codeword[0].tbSize);
+ memcpy(pduDesc[pduIndex].tlvs[0].value.direct, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, pdschCfg->codeword[0].tbSize);
+#endif
+
return ROK;
}
* ********************************************************************/
uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo)
{
+
+#ifndef OAI_TESTING
+#ifndef OAI_TESTING
uint32_t payloadSize = 0;
+#else
+ uint16_t payloadSize = 0;
+#endif
+
uint8_t *pagePayload = NULLP;
fapi_api_queue_elem_t *payloadElem = NULLP;
#ifdef INTEL_WLS_MEM
void * wlsHdlr = NULLP;
#endif
+ payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
+
+#ifndef OAI_TESTING
pduDesc[pduIndex].pdu_index = pduIndex;
pduDesc[pduIndex].num_tlvs = 1;
-
/* fill the TLV */
- payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
+#else
+ pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex);
+ pduDesc[pduIndex].num_tlvs = reverseBytes32(1);
+ /* fill the TLV */
+ pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_32);
+ pduDesc[pduIndex].tlvs[0].length = reverseBytes16((payloadSize & 0x0000ffff));
+#endif
+
LWR_MAC_ALLOC(pagePayload, payloadSize);
if(pagePayload == NULLP)
{
FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
pageAllocInfo->pageDlSch.dlPagePduLen);
memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen);
-
#ifdef INTEL_WLS_MEM
mtGetWlsHdl(&wlsHdlr);
pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
#else
pduDesc[pduIndex].tlvs[0].value = pagePayload;
#endif
+
pduDesc[pduIndex].pdu_length = payloadSize;
+#ifdef OAI_TESTING
+ pduDesc[pduIndex].pdu_length = reverseBytes16(pduDesc[pduIndex].pdu_length);
+#endif
#ifdef INTEL_WLS_MEM
addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
#else
LWR_MAC_FREE(pagePayload, payloadSize);
+#endif
#endif
return ROK;
* ********************************************************************/
uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
{
- uint16_t payloadSize;
+
+#ifndef OAI_TESTING
+ uint16_t payloadSize = 0;
uint8_t *rarPayload = NULLP;
fapi_api_queue_elem_t *payloadElem = NULLP;
#ifdef INTEL_WLS_MEM
void * wlsHdlr = NULLP;
#endif
+ payloadSize = pdschCfg->codeword[0].tbSize;
pduDesc[pduIndex].pdu_index = pduIndex;
pduDesc[pduIndex].num_tlvs = 1;
-
/* fill the TLV */
- payloadSize = pdschCfg->codeword[0].tbSize;
pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
+
LWR_MAC_ALLOC(rarPayload, payloadSize);
if(rarPayload == NULLP)
{
payloadElem = (fapi_api_queue_elem_t *)rarPayload;
FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
-
#ifdef INTEL_WLS_MEM
mtGetWlsHdl(&wlsHdlr);
pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
#else
LWR_MAC_FREE(rarPayload, payloadSize);
#endif
+
+#else
+
+ uint8_t tlvPaddingLen =get_tlv_padding(rarInfo->rarPduLen);
+ uint16_t totalLen= rarInfo->rarPduLen +tlvPaddingLen;
+ pduDesc[pduIndex].pdu_length = totalLen;
+ pduDesc[pduIndex].pdu_length = reverseBytes32(pduDesc[pduIndex].pdu_length);
+
+ pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex);
+ pduDesc[pduIndex].num_tlvs = reverseBytes32(1);
+ /* fill the TLV */
+ pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(FAPI_TX_DATA_PAYLOAD);
+ pduDesc[pduIndex].tlvs[0].length = reverseBytes32(rarInfo->rarPduLen);
+
+ memcpy(pduDesc[pduIndex].tlvs[0].value.direct, rarInfo->rarPdu, rarInfo->rarPduLen);
+
+#endif /* FAPI */
return ROK;
}
* ********************************************************************/
uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
{
+
+#ifndef OAI_TESTING
uint16_t payloadSize;
uint8_t *dlMsgPayload = NULLP;
fapi_api_queue_elem_t *payloadElem = NULLP;
void * wlsHdlr = NULLP;
#endif
- pduDesc[pduIndex].pdu_index = pduIndex;
- pduDesc[pduIndex].num_tlvs = 1;
+ payloadSize = pdschCfg->codeword[0].tbSize;
+#ifndef OAI_TESTING
+ pduDesc[pduIndex].pdu_index = pduIndex;
+ pduDesc[pduIndex].num_tlvs = 1;
+ /* fill the TLV */
+ pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
+ pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
+#else
+ pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex);
+ pduDesc[pduIndex].num_tlvs = reverseBytes32(1);
+ /* fill the TLV */
+ pduDesc[pduIndex].tlvs[0].tl.tag = reverseBytes16(FAPI_TX_DATA_PTR_TO_PAYLOAD_32);
+ pduDesc[pduIndex].tlvs[0].tl.length = reverseBytes16(payloadSize);
+#endif
+
+ LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
+ if(dlMsgPayload == NULLP)
+ {
+ return RFAILED;
+ }
+ payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
+ memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
+
+#ifdef INTEL_WLS_MEM
+ mtGetWlsHdl(&wlsHdlr);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
+#else
+ pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
+#endif
+
+ pduDesc[pduIndex].pdu_length = payloadSize;
+#ifdef OAI_TESTING
+ pduDesc[pduIndex].pdu_length = reverseBytes16(pduDesc[pduIndex].pdu_length);
+#endif
+
+#ifdef INTEL_WLS_MEM
+ addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
+#else
+ LWR_MAC_FREE(dlMsgPayload, payloadSize);
+#endif
+#endif /* FAPI */
+ return ROK;
+}
+
+#endif /* FAPI */
+
+/*******************************************************************
+ *
+ * @brief Sends DL TTI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillDlTtiReq
+ *
+ * Functionality:
+ * -Sends FAPI DL TTI req to PHY
+ *
+ * @params[in] timing info
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElemt)
+{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
+#endif
+
+#ifdef INTEL_FAPI
+#ifndef OAI_TESTING
+ uint8_t idx =0;
+ uint8_t nPdu = 0;
+ uint8_t numPduEncoded = 0;
+ uint8_t ueIdx;
+ uint16_t cellIdx =0;
+ uint16_t pduIndex = 0;
+
+ SlotTimingInfo dlTtiReqTimingInfo;
+ MacDlSlot *currDlSlot = NULLP;
+ MacCellCfg macCellCfg;
+ RntiType rntiType;
+ fapi_dl_tti_req_t *dlTtiReq = NULLP;
+ fapi_msg_header_t *msgHeader = NULLP;
+ p_fapi_api_queue_elem_t dlTtiElem;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t prevElem;
+
+ if(lwrMacCb.phyState == PHY_STATE_RUNNING)
+ {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ /* consider phy delay */
+ ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
+ dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
+ macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
+
+ /* Vendor Message */
+ fapi_vendor_msg_t *vendorMsg;
+ p_fapi_api_queue_elem_t vendorMsgQElem;
+ /* Allocte And fill Vendor msg */
+ LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ if(!vendorMsgQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
+ vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
+ fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
+
+ LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
+ if(dlTtiElem)
+ {
+ FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
+ sizeof(fapi_dl_tti_req_t));
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
+ LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 2;
+ msgHeader->handle = 0;
+
+ /* Fill Dl TTI Request */
+ dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
+ memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
+ fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
+
+ dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
+ dlTtiReq->slot = dlTtiReqTimingInfo.slot;
+ dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
+ nPdu = dlTtiReq->nPdus;
+
+ vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
+ vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
+
+ dlTtiReq->nGroup = 0;
+ if(dlTtiReq->nPdus > 0)
+ {
+ if(currDlSlot->dlInfo.isBroadcastPres)
+ {
+ if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
+ {
+ if(dlTtiReq->pdus != NULLP)
+ {
+ for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
+ currDlSlot, idx, dlTtiReq->sfn);
+ numPduEncoded++;
+ }
+ }
+ DU_LOG("\033[1;31m");
+ DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
+ DU_LOG("\033[0m");
+ }
+ if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
+ {
+ /* Filling SIB1 param */
+ if(numPduEncoded != nPdu)
+ {
+ if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
+ rntiType = SI_RNTI_TYPE;
+
+ /* PDCCH PDU */
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
+ numPduEncoded++;
+
+ /* PDSCH PDU */
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
+ currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp, pduIndex);
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+ if(currDlSlot->pageAllocInfo != NULLP)
+ {
+ /* Filling DL Paging Alloc param */
+ if(numPduEncoded != nPdu)
+ {
+ rntiType = P_RNTI_TYPE;
+
+ fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
+ currDlSlot->pageAllocInfo, &macCellCfg);
+ numPduEncoded++;
+
+ fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
+ DU_LOG("\033[0m");
+ }
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
+ {
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ /* Filling RAR param */
+ rntiType = RA_RNTI_TYPE;
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
+ {
+
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
+ numPduEncoded++;
+ MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
+ }
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp, pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+ DU_LOG("\033[1;32m");
+ DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \
+ {
+ rntiType = C_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
+ numPduEncoded++;
+ }
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
+ {
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+ DU_LOG("\033[1;32m");
+ if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status) && \
+ (*macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status == TRUE))
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
+ MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
+ }
+ else
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
+ }
+ DU_LOG("\033[0m");
+ }
+ }
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
+ /* else
+ {
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
+ }
+ */
+ }
+ }
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
+ dlTtiReq->nGroup++;
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+#endif
+ /* Intel L1 expects UL_TTI.request following DL_TTI.request */
+
+ fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
+ msgHeader->num_msg++;
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
+ msgHeader->num_msg++;
+ /* send Tx-DATA req message */
+ sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
+ if(dlTtiElem->p_next->p_next->p_next)
+ {
+ msgHeader->num_msg++;
+ prevElem = dlTtiElem->p_next->p_next->p_next;
+ }
+ else
+ prevElem = dlTtiElem->p_next->p_next;
+ }
+ else
+ {
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+#endif
+ /* Intel L1 expects UL_TTI.request following DL_TTI.request */
+ fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
+ msgHeader->num_msg++;
+
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- /* fill the TLV */
- payloadSize = pdschCfg->codeword[0].tbSize;
- pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
- pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
- LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
- if(dlMsgPayload == NULLP)
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
+ msgHeader->num_msg++;
+ prevElem = dlTtiElem->p_next->p_next;
+ }
+ if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
+ {
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
+ msgHeader->num_msg++;
+ macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
+ prevElem = prevElem->p_next;
+ }
+
+ prevElem->p_next = vendorMsgQElem;
+ LwrMacSendToL1(headerElem);
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return ROK;
+ }
+ else
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return RFAILED;
+ }
+ }
+ else
{
+ lwr_mac_procInvalidEvt(&currTimingInfo);
return RFAILED;
}
- payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
- FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
- memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
-
-#ifdef INTEL_WLS_MEM
- mtGetWlsHdl(&wlsHdlr);
- pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
-#else
- pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
-#endif
- pduDesc[pduIndex].pdu_length = payloadSize;
-#ifdef INTEL_WLS_MEM
- addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
#else
- LWR_MAC_FREE(dlMsgPayload, payloadSize);
-#endif
- return ROK;
-}
-
-#endif /* FAPI */
-
-/*******************************************************************
- *
- * @brief Sends DL TTI Request to PHY
- *
- * @details
- *
- * Function : fillDlTtiReq
- *
- * Functionality:
- * -Sends FAPI DL TTI req to PHY
- *
- * @params[in] timing info
- * @return ROK - success
- * RFAILED - failure
- *
- * ****************************************************************/
-uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
-{
-#ifdef CALL_FLOW_DEBUG_LOG
- DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
-#endif
-#ifdef INTEL_FAPI
uint8_t idx =0;
- uint8_t nPdu = 0;
+ uint8_t nPdus = 0;
uint8_t numPduEncoded = 0;
- uint8_t ueIdx;
+ uint8_t ueIdx =0;
+ uint8_t nGroup = 0;
uint16_t cellIdx =0;
uint16_t pduIndex = 0;
+ uint32_t msgLen= 0;
SlotTimingInfo dlTtiReqTimingInfo;
MacDlSlot *currDlSlot = NULLP;
p_fapi_api_queue_elem_t dlTtiElem;
p_fapi_api_queue_elem_t headerElem;
p_fapi_api_queue_elem_t prevElem;
+
if(lwrMacCb.phyState == PHY_STATE_RUNNING)
{
- GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
- /* consider phy delay */
- ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
- dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
-
- macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
-
- currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
-
- /* Vendor Message */
- fapi_vendor_msg_t *vendorMsg;
- p_fapi_api_queue_elem_t vendorMsgQElem;
- /* Allocte And fill Vendor msg */
- LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
- if(!vendorMsgQElem)
- {
- DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
- return RFAILED;
- }
- FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
- vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
- fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
-
- LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
- if(dlTtiElem)
- {
- FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
- sizeof(fapi_dl_tti_req_t));
- /* Fill message header */
- LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
- if(!headerElem)
- {
- DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
- LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
- return RFAILED;
- }
-
- FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
- sizeof(fapi_msg_header_t));
- msgHeader = (fapi_msg_header_t *)(headerElem + 1);
- msgHeader->num_msg = 2;
- msgHeader->handle = 0;
-
- /* Fill Dl TTI Request */
- dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
- memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
- fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
-
- dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
- dlTtiReq->slot = dlTtiReqTimingInfo.slot;
- dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
- nPdu = dlTtiReq->nPdus;
-
- vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
- vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
-
- dlTtiReq->nGroup = 0;
- if(dlTtiReq->nPdus > 0)
- {
- if(currDlSlot->dlInfo.isBroadcastPres)
- {
- if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
- {
- if(dlTtiReq->pdus != NULLP)
- {
- for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
- {
- fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
- currDlSlot, idx, dlTtiReq->sfn);
- numPduEncoded++;
- }
- }
- DU_LOG("\033[1;31m");
- DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
- DU_LOG("\033[0m");
- }
-
- if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
- {
- /* Filling SIB1 param */
- if(numPduEncoded != nPdu)
- {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ /* consider phy delay */
+ ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
+ dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
+ macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
+
+ nPdus = calcDlTtiReqPduCount(currDlSlot);
+
+ if(nPdus>0)
+ {
+ nGroup=1; /*As per 5G FAPI: PHY API spec v 222.10.02, section 3.4.2 DL_TTI.request, For SU-MIMO, one group includes one UE only */
+ }
+ else
+ {
+ //DU_LOG("\nINFO --> LWR_MAC: NO PDU to be scheduled in DL");
+ return ROK;
+ }
+ /* Below msg length is calculated based on the parameter present in fapi_dl_tti_req_t structure
+ * the prameters of fapi_dl_tti_req_t structure are ->
+ * header = sizeof(fapi_msg_t) , {sfn, slot} = 2*sizeof(uint16_t),
+ * {numPdus, nGroup} = 2 * sizeof(uint8_t), total number of pdu supproted = numPdus*sizeof(fapi_dl_tti_req_pdu_t)
+ * and number of Group supported = ngroup * sizeof(fapi_ue_info_t) */
+
+// msgLen=sizeof(fapi_msg_t)+ (2*sizeof(uint16_t)) + (2*sizeof(uint8_t)) + (nPdus*sizeof(fapi_dl_tti_req_pdu_t)) + (nGroup * sizeof(fapi_ue_info_t));
+
+ LWR_MAC_ALLOC(dlTtiReq, (sizeof(fapi_dl_tti_req_t)));
+ if(dlTtiReq)
+ {
+ memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
+ fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
+ dlTtiReq->sfn = reverseBytes16(dlTtiReqTimingInfo.sfn);
+ dlTtiReq->slot = reverseBytes16(dlTtiReqTimingInfo.slot);
+ dlTtiReq->nPdus = nPdus; /* get total Pdus */
+ dlTtiReq->nGroup = nGroup;
+
+ if(dlTtiReq->nPdus > 0)
+ {
+ if(currDlSlot->dlInfo.isBroadcastPres)
+ {
+ if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
+ {
+ if(dlTtiReq->pdus != NULLP)
+ {
+ for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
+ currDlSlot, idx, dlTtiReqTimingInfo.sfn);
+ numPduEncoded++;
+ }
+ }
+ DU_LOG("\033[1;31m");
+ DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
+ DU_LOG("\033[0m");
+ }
+ if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
+ {
+ /* Filling SIB1 param */
+ if(numPduEncoded != nPdus)
+ {
if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
rntiType = SI_RNTI_TYPE;
+ /* PDCCH PDU */
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
+
+ numPduEncoded++;
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
+ currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp, pduIndex);
+
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup-1].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+ if(currDlSlot->pageAllocInfo != NULLP)
+ {
+ /* Filling DL Paging Alloc param */
+ if(numPduEncoded != nPdus)
+ {
+ rntiType = P_RNTI_TYPE;
+ fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot->pageAllocInfo, &macCellCfg);
- /* PDCCH PDU */
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
- numPduEncoded++;
-
- /* PDSCH PDU */
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
- currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
- pduIndex);
- dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
- pduIndex++;
- numPduEncoded++;
- }
- DU_LOG("\033[1;34m");
- DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
- DU_LOG("\033[0m");
- }
- }
-
- if(currDlSlot->pageAllocInfo != NULLP)
- {
- /* Filling DL Paging Alloc param */
- if(numPduEncoded != nPdu)
- {
- rntiType = P_RNTI_TYPE;
- fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
- currDlSlot->pageAllocInfo, &macCellCfg);
- numPduEncoded++;
- fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
- dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
- pduIndex++;
- numPduEncoded++;
- }
- DU_LOG("\033[1;34m");
- DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
- DU_LOG("\033[0m");
- }
-
- for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
- {
- if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
- {
- /* Filling RAR param */
- rntiType = RA_RNTI_TYPE;
+ numPduEncoded++;
+ fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
+
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup-1].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
+ DU_LOG("\033[0m");
+ }
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
+ {
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ /* Filling RAR param */
+ rntiType = RA_RNTI_TYPE;
if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
{
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
- numPduEncoded++;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
+ numPduEncoded++;
MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
}
- if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
- {
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
- currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
- pduIndex);
- numPduEncoded++;
- pduIndex++;
-
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP,
+ currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp, pduIndex);
+ numPduEncoded++;
+ pduIndex++;
DU_LOG("\033[1;32m");
- DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
- DU_LOG("\033[0m");
- }
- }
-
- if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
- {
+ DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \
{
rntiType = C_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP,
currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
numPduEncoded++;
}
-
if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
{
if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
{
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
- currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
numPduEncoded++;
pduIndex++;
-
DU_LOG("\033[1;32m");
if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status) && \
(*macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status == TRUE))
}
DU_LOG("\033[0m");
}
-
}
MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
/* else
currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
}
*/
- }
- }
-
- dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
- dlTtiReq->nGroup++;
-
-#ifdef ODU_SLOT_IND_DEBUG_LOG
- DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
-#endif
-
- /* Intel L1 expects UL_TTI.request following DL_TTI.request */
- fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
- msgHeader->num_msg++;
-
- /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
- msgHeader->num_msg++;
-
- /* send Tx-DATA req message */
- sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
- if(dlTtiElem->p_next->p_next->p_next)
- {
- msgHeader->num_msg++;
- prevElem = dlTtiElem->p_next->p_next->p_next;
- }
- else
- prevElem = dlTtiElem->p_next->p_next;
- }
- else
- {
-#ifdef ODU_SLOT_IND_DEBUG_LOG
- DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
-#endif
- /* Intel L1 expects UL_TTI.request following DL_TTI.request */
- fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
- msgHeader->num_msg++;
-
- /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
- msgHeader->num_msg++;
-
- prevElem = dlTtiElem->p_next->p_next;
- }
-
- if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
- {
- /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
- msgHeader->num_msg++;
- macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
+ }
+ }
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup-1].nUe = MAX_NUM_UE_PER_TTI;
+
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+#endif
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+#endif
+ uint32_t bufferLen=0;
+ uint8_t mBuf[2500];
+ packDlTtiReq(dlTtiReq, mBuf, &bufferLen);
+ LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + bufferLen));
+ if(dlTtiElem==NULLP)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, bufferLen);
+
+ memcpy((uint8_t *)( dlTtiElem +1), mBuf, bufferLen);
+ prevElemt->p_next = dlTtiElem;
+ LWR_MAC_FREE(dlTtiReq, (sizeof(fapi_dl_tti_req_t)));
+ //LWR_MAC_FREE(mBuf, sizeof(fapi_dl_tti_req_t));
+ }
+ if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
+ {
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ lwr_mac_procStopReqEvt(currTimingInfo, prevElem, NULLP);
+
+ macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
prevElem = prevElem->p_next;
- }
- prevElem->p_next = vendorMsgQElem;
- LwrMacSendToL1(headerElem);
- memset(currDlSlot, 0, sizeof(MacDlSlot));
- return ROK;
- }
- else
- {
- DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
- memset(currDlSlot, 0, sizeof(MacDlSlot));
- return RFAILED;
- }
+ }
+
+ return ROK;
+ }
+ else
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return RFAILED;
+ }
}
else
{
- lwr_mac_procInvalidEvt(&currTimingInfo);
- return RFAILED;
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ return RFAILED;
}
+
+#endif
#endif
+
return ROK;
}
DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
#endif
+#ifndef OAI_TESTING
uint8_t nPdu = 0;
uint8_t ueIdx=0;
uint16_t cellIdx=0;
memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
- vendorTxDataReq->sym = 0;
-
- txDataReq->sfn = currTimingInfo.sfn;
- txDataReq->slot = currTimingInfo.slot;
+ vendorTxDataReq->sym = 0;
+
+ txDataReq->sfn = currTimingInfo.sfn;
+ txDataReq->slot = currTimingInfo.slot;
+ if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
+ {
+ fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
+ &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg);
+ pduIndex++;
+ MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
+ txDataReq->num_pdus++;
+ }
+ if(dlSlot->pageAllocInfo != NULLP)
+ {
+ fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen));
+ MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
+ }
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
+ {
+ if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
+ {
+ fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
+ dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
+ }
+ MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
+ }
+
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
+ {
+ fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
+ }
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
+ }
+ }
+
+ /* Fill message header */
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
+ prevElem->p_next = txDataElem;
+ }
+
+#else
+ uint8_t nPdu = 0;
+ uint8_t ueIdx=0;
+ uint16_t cellIdx=0;
+ uint16_t pduIndex = 0;
+ uint32_t MsgLen=0;
+
+ fapi_tx_data_req_t *txDataReq =NULLP;
+ p_fapi_api_queue_elem_t txDataElem = 0;
+
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+
+ /* send TX_Data request message */
+ nPdu = calcTxDataReqPduCount(dlSlot);
+ if(nPdu == 0)
+ {
+ return ROK;
+ }
+
+ /* Below msg length is calculated based on the parameter present in fapi_tx_data_req_t structure
+ * the prameters of fapi_tx_data_req_t structure are ->
+ * header = sizeof(fapi_msg_t) , ((sfn, slot, numpdu) = 3*sizeof(uint16_t)),
+ * total number of fapi_tx_pdu_desc_t supproted = numPdus*sizeof(fapi_tx_pdu_desc_t)*/
+
+ MsgLen = sizeof(fapi_msg_t)+ (3*sizeof(uint16_t)) + (nPdu*sizeof(fapi_tx_pdu_desc_t));
+ if(nPdu > 0)
+ {
+ LWR_MAC_ALLOC(txDataReq, (sizeof(fapi_tx_data_req_t)));
+ memset(txDataReq, 0, MsgLen);
+#if 0
+ LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + MsgLen));
+ if(txDataElem == NULLP)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
+ return RFAILED;
+ }
+
+ FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, MsgLen);
+ txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
+#endif
+ fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
+
+ txDataReq->sfn = reverseBytes16(currTimingInfo.sfn);
+ txDataReq->slot = reverseBytes16(currTimingInfo.slot);
if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
- fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
+ fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
&dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg);
pduIndex++;
MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
}
}
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request with total number pdu %u", txDataReq->num_pdus);
+ txDataReq->num_pdus= reverseBytes16(txDataReq->num_pdus);
+ DU_LOG("\nDEBUG --> LWR_MAC: After reversing total number pdu %u = ", txDataReq->num_pdus);
+
/* Fill message header */
- DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
+ uint32_t bufferLen=0;
+ uint8_t mBuf[2500];
+ packTxDataReqBuffer(txDataReq, mBuf, &bufferLen);
+ LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + bufferLen));
+ if(txDataElem == NULLP)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
+ return RFAILED;
+ }
+
+ FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, bufferLen);
+ memcpy((uint8_t *)( txDataElem +1), mBuf, bufferLen);
+
+
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request\n");
prevElem->p_next = txDataElem;
+ LWR_MAC_FREE(txDataReq, (sizeof(fapi_tx_data_req_t)));
+ // LWR_MAC_FREE(mBuf, (sizeof(fapi_tx_data_req_t)));
}
+#endif
#endif
return ROK;
}
uint8_t idx;
if(macCellCfg != NULLP)
{
- idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
+ idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
+#ifdef OAI_TESTING
+ *numCs = reverseBytes16(UnrestrictedSetNcsTable[idx]);
+#else
*numCs = UnrestrictedSetNcsTable[idx];
+#endif
}
#endif
}
{
if(ulTtiReqPdu != NULLP)
{
+#ifdef OAI_TESTING
+ ulTtiReqPdu->pduType = reverseBytes16(PRACH_PDU_TYPE);
+ ulTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_ul_prach_pdu_t));
+ ulTtiReqPdu->pdu.prach_pdu.physCellId = reverseBytes16(macCellCfg->cellCfg.phyCellId);
+ setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
+#else
ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
+ ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
+ setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
+#endif
ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
currUlSlot->ulSchInfo.prachSchInfo.numPrachOcas;
ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulSchInfo.prachSchInfo.numRa;
ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
currUlSlot->ulSchInfo.prachSchInfo.prachStartSymb;
- setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
+#ifdef OAI_TESTING
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = reverseBytes16(0);
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = reverseBytes16(0);
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = reverseBytes16(0);
+#else
ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
- ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
- ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
+#endif
}
}
{
if(ulTtiReqPdu != NULLP)
{
+// memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
+#ifdef OAI_TESTING
+ ulTtiReqPdu->pduType = reverseBytes16(PUSCH_PDU_TYPE);
+ ulTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_ul_pusch_pdu_t));
+ ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = reverseBytes16(1);
+ ulTtiReqPdu->pdu.pusch_pdu.rnti = reverseBytes16(puschInfo->crnti);
+ ulTtiReqPdu->pdu.pusch_pdu.handle = reverseBytes32(100);
+ /* TODO : Fill handle in raCb when scheduling pusch and access here */
+ ulTtiReqPdu->pdu.pusch_pdu.bwpSize = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.numPrb);
+ ulTtiReqPdu->pdu.pusch_pdu.bwpStart = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb);
+ ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = reverseBytes16(308);
+ ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = reverseBytes16(macCellCfg->cellId);
+ ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = reverseBytes16(4);
+ ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = reverseBytes16(macCellCfg->cellId);
+ ulTtiReqPdu->pdu.pusch_pdu.puschIdentity = reverseBytes16(0);
+ ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = reverseBytes16(0);
+ ulTtiReqPdu->pdu.pusch_pdu.rbStart = reverseBytes16(puschInfo->fdAlloc.resAlloc.type1.startPrb);
+ ulTtiReqPdu->pdu.pusch_pdu.rbSize = reverseBytes16(puschInfo->fdAlloc.resAlloc.type1.numPrb);
+ ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = reverseBytes16(0);
+#else
ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
- memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
+ ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
ulTtiReqPdu->pdu.pusch_pdu.rnti = puschInfo->crnti;
- /* TODO : Fill handle in raCb when scheduling pusch and access here */
ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
+ /* TODO : Fill handle in raCb when scheduling pusch and access here */
ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
+ ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId;
+ ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
+ ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId;
+ ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.rbStart = puschInfo->fdAlloc.resAlloc.type1.startPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.rbSize = puschInfo->fdAlloc.resAlloc.type1.numPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
+#endif
ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
macCellCfg->cellCfg.initialUlBwp.bwp.scs;
ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
- ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = puschInfo->tbInfo.qamOrder;
ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = puschInfo->tbInfo.mcs;
ulTtiReqPdu->pdu.pusch_pdu.mcsTable = puschInfo->tbInfo.mcsTable;
ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
- ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId;
ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
- ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
- ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId;
ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
- ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
puschInfo->fdAlloc.resAllocType;
- ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
- puschInfo->fdAlloc.resAlloc.type1.startPrb;
- ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
- puschInfo->fdAlloc.resAlloc.type1.numPrb;
ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
- ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
puschInfo->tdAlloc.startSymb;
ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
puschInfo->tdAlloc.numSymb;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
+ puschInfo->tbInfo.rv;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
+ puschInfo->harqProcId;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
+ puschInfo->tbInfo.ndi;
+#ifdef OAI_TESTING
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = reverseBytes32(puschInfo->tbInfo.tbSize);
+ /* numCb is 0 for new transmission */
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = reverseBytes16(0);
+#else
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = (puschInfo->tbInfo.tbSize);
+ /* numCb is 0 for new transmission */
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = (0);
#ifdef INTEL_FAPI
ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
puschInfo->dmrsMappingType;
ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
puschInfo->dmrsAddPos;
#endif
- ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
- puschInfo->tbInfo.rv;
- ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
- puschInfo->harqProcId;
- ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
- puschInfo->tbInfo.ndi;
- ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
- puschInfo->tbInfo.tbSize;
- /* numCb is 0 for new transmission */
- ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
-
- ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
-
/* UL TTI Vendor PDU */
ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
{
ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
}
+#endif
}
}
{
if(ulTtiReqPdu != NULLP)
{
- ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
+#ifdef OAI_TESTING
+ ulTtiReqPdu->pduType = reverseBytes16(PUCCH_PDU_TYPE);
+ ulTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_ul_pucch_pdu_t));
+ ulTtiReqPdu->pdu.pucch_pdu.rnti = reverseBytes16(pucchInfo->crnti);
+ /* TODO : Fill handle in raCb when scheduling pucch and access here */
+ ulTtiReqPdu->pdu.pucch_pdu.handle = reverseBytes32(100);
+ ulTtiReqPdu->pdu.pucch_pdu.bwpSize = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.numPrb);
+ ulTtiReqPdu->pdu.pucch_pdu.bwpStart = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb);
+ ulTtiReqPdu->pdu.pucch_pdu.prbStart = reverseBytes16(pucchInfo->fdAlloc.startPrb);
+ ulTtiReqPdu->pdu.pucch_pdu.prbSize = reverseBytes16(pucchInfo->fdAlloc.numPrb);
+ ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = reverseBytes16(pucchInfo->secondPrbHop);
+ ulTtiReqPdu->pdu.pucch_pdu.hoppingId = reverseBytes16(0);
+ ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = reverseBytes16(pucchInfo->initialCyclicShift);
+ ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = reverseBytes16(0); /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = reverseBytes16(pucchInfo->harqInfo.harqBitLength);
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = reverseBytes16(0); /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = reverseBytes16(0); /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = reverseBytes16(pucchInfo->beamPucchInfo.numPrgs);
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = reverseBytes16(pucchInfo->beamPucchInfo.prgSize);
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = reverseBytes16(pucchInfo->beamPucchInfo.prg[0].beamIdx[0]);
+#else
+ ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
+ ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
ulTtiReqPdu->pdu.pucch_pdu.rnti = pucchInfo->crnti;
/* TODO : Fill handle in raCb when scheduling pucch and access here */
ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop;
+ ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift;
+ ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength;
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0];
+#endif
ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pucch_pdu.formatType = pucchInfo->pucchFormat; /* Supporting PUCCH Format 0 */
ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
- ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb;
- ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = pucchInfo->tdAlloc.startSymb;
ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = pucchInfo->tdAlloc.numSymb;
ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = pucchInfo->intraFreqHop;
- ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop;
ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
- ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
-
- ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift;
-
- ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = pucchInfo->timeDomOCC;
ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = pucchInfo->occIdx; /* Valid for Format 4 only */
ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = pucchInfo->occLen; /* Valid for Format 4 only */
ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
ulTtiReqPdu->pdu.pucch_pdu.srFlag = pucchInfo->srFlag;
- ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength;
- ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
- ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs;
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize;
ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = pucchInfo->beamPucchInfo.digBfInterfaces;
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0];
- ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
/* UL TTI Vendor PDU */
ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
#endif
#ifdef INTEL_FAPI
+#ifndef OAI_TESTING
uint16_t cellIdx =0;
uint8_t pduIdx = -1;
uint8_t ueIdx = 0;
{
lwr_mac_procInvalidEvt(&currTimingInfo);
}
+
+#else
+
+ uint8_t pduIdx = -1;
+ uint8_t ueIdx = 0;
+ uint8_t nPdus = 0;
+ uint16_t cellIdx =0;
+ uint32_t msgLen = 0;
+
+ SlotTimingInfo ulTtiReqTimingInfo;
+ MacUlSlot *currUlSlot = NULLP;
+ MacCellCfg macCellCfg;
+ fapi_ul_tti_req_t *ulTtiReq = NULLP;
+ p_fapi_api_queue_elem_t ulTtiElem;
+
+ if(lwrMacCb.phyState == PHY_STATE_RUNNING)
+ {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
+
+ /* add PHY delta */
+ ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,gConfigInfo.gPhyDeltaUl, macCb.macCell[cellIdx]->numOfSlots);
+ currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
+
+ LWR_MAC_ALLOC(ulTtiReq, (sizeof(fapi_ul_tti_req_t)));
+ if(ulTtiReq)
+ {
+ memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
+
+ nPdus=getnPdus(ulTtiReq, currUlSlot);
+ if(nPdus == 0)
+ {
+ LWR_MAC_FREE(ulTtiReq, (sizeof(fapi_ul_tti_req_t)));
+ return ROK;
+ }
+
+ /* Below msg length is calculated based on the parameter present in fapi_ul_tti_req_t structure
+ * the prameters of fapi_ul_tti_req_t structure are ->
+ * header = sizeof(fapi_msg_t) , {sfn, slot} = 2*sizeof(uint16_t),
+ * {numPdus, rachPresent, nGroup, nUlsch, nUlcch} = 5 * sizeof(uint8_t), total number of pdu supproted = numPdus*sizeof(fapi_ul_tti_req_pdu_t)
+ * sizeof(fapi_ue_info_t) */
+
+ msgLen=sizeof(fapi_msg_t)+ (2*sizeof(uint16_t)) + (5*sizeof(uint8_t)) + (nPdus*sizeof(fapi_ul_tti_req_pdu_t)) + sizeof(fapi_ue_info_t);
+
+ fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
+ ulTtiReq->sfn = reverseBytes16(ulTtiReqTimingInfo.sfn);
+ ulTtiReq->slot = reverseBytes16(ulTtiReqTimingInfo.slot);
+ ulTtiReq->nPdus = nPdus;
+ ulTtiReq->nGroup = 0;
+
+ if(ulTtiReq->nPdus > 0)
+ {
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, datatype:%d, sfn/slot:%d/%d", currUlSlot->ulSchInfo.dataType, ulTtiReqTimingInfo.sfn, ulTtiReqTimingInfo.slot);
+#endif
+ /* Fill Prach Pdu */
+ if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
+ {
+ pduIdx++;
+ fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
+ ulTtiReq->rachPresent++;
+ }
+ for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
+ {
+ /* Fill PUSCH PDU */
+ if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
+ {
+ if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
+ {
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, PUSCH PDU ueId:%d", ueIdx);
+#endif
+ pduIdx++;
+ fillPuschPdu(&ulTtiReq->pdus[pduIdx], NULLP, &macCellCfg, &currUlSlot->ulSchInfo.schPuschInfo[ueIdx]);
+ ulTtiReq->nUlsch++;
+ }
+ }
+ /* Fill PUCCH PDU */
+ if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
+ {
+ if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
+ {
+ pduIdx++;
+ fillPucchPdu(&ulTtiReq->pdus[pduIdx], NULLP, &macCellCfg, &currUlSlot->ulSchInfo.schPucchInfo[ueIdx]);
+ ulTtiReq->nUlcch++;
+ }
+ }
+ }
+ ulTtiReq->ueGrpInfo[ulTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
+ ulTtiReq->nGroup++;
+ }
+ uint32_t bufferLen=0;
+ uint8_t mBuf[2500];
+ packUlTtiReq(ulTtiReq, mBuf, &bufferLen);
+ LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + bufferLen));
+ if(ulTtiElem==NULLP)
+ {
+
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, bufferLen);
+
+ memcpy((uint8_t *)( ulTtiElem +1), mBuf, bufferLen);
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
+#endif
+ prevElem->p_next = ulTtiElem;
+
+ LWR_MAC_FREE(ulTtiReq, (sizeof(fapi_ul_tti_req_t)));
+ memset(currUlSlot, 0, sizeof(MacUlSlot));
+ return ROK;
+
+ }
+ else
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
+ memset(currUlSlot, 0, sizeof(MacUlSlot));
+ return RFAILED;
+ }
+ }
+ else
+ {
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ }
+
+#endif
#endif
return ROK;
}
uint8_t puschTpcSize = 2;
uint8_t ul_SlIndSize = 1;
+#ifndef OAI_TESTING
ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
- ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
- ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
- ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
+#else
+ ulDciPtr->rnti = reverseBytes16(schDciInfo->dciInfo.rnti);
+ ulDciPtr->scramblingId = reverseBytes16(schDciInfo->dciInfo.scramblingId);
+ ulDciPtr->scramblingRnti = reverseBytes16(schDciInfo->dciInfo.scramblingRnti);
+ ulDciPtr->pc_and_bform.numPrgs = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.numPrgs);
+ ulDciPtr->pc_and_bform.prgSize = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.prgSize);
+ ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx);
+ ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0]);
+#endif
+ ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
+ ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
+ ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
if(ulDciPtr->payloadSizeBits % 8)
numBytes += 1;
+#ifdef OAI_TESTING
+ ulDciPtr->payloadSizeBits = reverseBytes16(ulDciPtr->payloadSizeBits);
+#endif
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
{
memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
+
+#ifndef OAI_TESTING
+ /* Calculating PDU length. Considering only one Ul dci pdu for now */
+ ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
+ ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
+ ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
+#else
+ /* Calculating PDU length. Considering only one Ul dci pdu for now */
+ ulDciReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdcch_pdu_t));
+ ulDciReqPdu->pduType = reverseBytes16(PDCCH_PDU_TYPE);
+ ulDciReqPdu->pdcchPduConfig.bwpSize = reverseBytes16(dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb);
+ ulDciReqPdu->pdcchPduConfig.bwpStart = reverseBytes16(dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb);
+ ulDciReqPdu->pdcchPduConfig.shiftIndex = reverseBytes16(dlInfo->ulGrant->coresetCfg.shiftIndex);
+ ulDciReqPdu->pdcchPduConfig.numDlDci = reverseBytes16(1);
+#endif
ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
- ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
- ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
- /* Calculating PDU length. Considering only one Ul dci pdu for now */
- ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
+#ifndef OAI_TESTING
/* Vendor UL DCI PDU */
vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
+#endif
}
return ROK;
}
uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
{
#ifdef INTEL_FAPI
+#ifndef OAI_TESTING
uint8_t cellIdx =0;
uint8_t numPduEncoded = 0;
SlotTimingInfo ulDciReqTimingInfo ={0};
memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
- LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
- if(ulDciElem)
- {
- FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
- sizeof(fapi_ul_dci_req_t));
- ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
- memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
- fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
-
- ulDciReq->sfn = ulDciReqTimingInfo.sfn;
- ulDciReq->slot = ulDciReqTimingInfo.slot;
- if(currDlSlot->dlInfo.ulGrant != NULLP)
- {
+ LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
+ if(ulDciElem)
+ {
+ FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
+ sizeof(fapi_ul_dci_req_t));
+ ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
+ memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
+ fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
+
+ ulDciReq->sfn = ulDciReqTimingInfo.sfn;
+ ulDciReq->slot = ulDciReqTimingInfo.slot;
+ if(currDlSlot->dlInfo.ulGrant != NULLP)
+ {
vendorUlDciReq->sym = 0;
ulDciReq->numPdus = 1; // No. of PDCCH PDUs
vendorUlDciReq->num_pdus = ulDciReq->numPdus;
/* Fill PDCCH configuration Pdu */
fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
numPduEncoded++;
- /* free UL GRANT at SCH */
- MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
+ /* free UL GRANT at SCH */
+ MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
}
#ifdef ODU_SLOT_IND_DEBUG_LOG
- DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
#endif
- }
- prevElem->p_next = ulDciElem;
+ }
+ prevElem->p_next = ulDciElem;
+ }
+ }
+ else
+ {
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ }
+#else
+ uint8_t cellIdx =0;
+ uint8_t numPdus =0;
+ uint8_t numPduEncoded = 0;
+ uint32_t msgLen=0;
+
+ SlotTimingInfo ulDciReqTimingInfo ={0};
+ MacDlSlot *currDlSlot = NULLP;
+ fapi_ul_dci_req_t *ulDciReq =NULLP;
+ p_fapi_api_queue_elem_t ulDciElem;
+
+ if(lwrMacCb.phyState == PHY_STATE_RUNNING)
+ {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
+
+ if(currDlSlot->dlInfo.ulGrant != NULLP)
+ {
+ numPdus = 1;
+ }
+ else
+ {
+ return ROK;
+ }
+
+ /* Below msg length is calculated based on the parameter present in fapi_ul_dci_req_t structure
+ * the prameters of fapi_ul_dci_req_t structure are ->
+ * header = sizeof(fapi_msg_t) ,sfn, slot = 2*sizeof(uint16_t),
+ * numPdus = sizeof(uint8_t) and total number of fapi_dci_pdu_t supproted = numPdus*sizeof(fapi_dci_pdu_t)*/
+
+ msgLen = sizeof(fapi_msg_t) + (2*sizeof(uint16_t)) + sizeof(uint8_t) + (numPdus*sizeof(fapi_dci_pdu_t));
+
+ LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + msgLen));
+ if(ulDciElem)
+ {
+ FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, msgLen);
+
+ ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
+ memset(ulDciReq, 0, msgLen);
+ fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, msgLen);
+
+ ulDciReq->sfn = reverseBytes16(ulDciReqTimingInfo.sfn);
+ ulDciReq->slot = reverseBytes16(ulDciReqTimingInfo.slot);
+ if(currDlSlot->dlInfo.ulGrant != NULLP)
+ {
+ ulDciReq->numPdus = 1; // No. of PDCCH PDUs
+ if(ulDciReq->numPdus > 0)
+ {
+ /* Fill PDCCH configuration Pdu */
+ fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], NULLP, &currDlSlot->dlInfo, CORESET_TYPE1);
+ numPduEncoded++;
+ /* free UL GRANT at SCH */
+ MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
+ }
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
+#endif
+ }
+ prevElem->p_next = ulDciElem;
}
}
else
{
- lwr_mac_procInvalidEvt(&currTimingInfo);
+ lwr_mac_procInvalidEvt(&currTimingInfo);
}
+
+#endif
#endif
return ROK;
}
+#ifdef OAI_TESTING
+uint8_t processTtiReq(SlotTimingInfo currTimingInfo)
+{
+ uint8_t step = 0;
+ uint16_t cellIdx=0;
+ MacDlSlot *currDlSlot = NULLP;
+ SlotTimingInfo dlTtiReqTimingInfo;
+ fapi_msg_header_t *msgHeader = NULLP;
+ p_fapi_api_queue_elem_t headerElem, current;
+
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, NULL, FAPI_VENDOR_MSG_HEADER_IND, 1, sizeof(fapi_msg_header_t));
+
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 1;
+ msgHeader->handle = 0;
+
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
+ dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
+
+ current=headerElem;
+ while (current != NULL)
+ {
+ switch (step)
+ {
+ case 0:
+ {
+ fillDlTtiReq(currTimingInfo, current);
+ break;
+ }
+ case 1:
+ {
+ fillUlTtiReq(currTimingInfo, current, NULLP);
+ break;
+ }
+
+ case 2:
+ {
+ fillUlDciReq(dlTtiReqTimingInfo, current, NULLP);
+ break;
+ }
+
+ case 3:
+ {
+ sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, current, NULLP);
+ break;
+ }
+
+ default:
+ current->p_next = NULLP;
+ break;
+ }
+ if(current->p_next)
+ {
+ msgHeader->num_msg++;
+ current = current->p_next;
+ }
+ if(step == 4)
+ break;
+ step++;
+ }
+
+ if(msgHeader->num_msg == 1)
+ {
+ LWR_MAC_FREE(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ }
+ else
+ {
+ LwrMacSendToL1(headerElem);
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ }
+ return ROK;
+}
+#endif
+
lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
{
{
--- /dev/null
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#ifndef _FAPI_INTERFACE_H_
+#define _FAPI_INTERFACE_H_
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include "stdint.h"
+
+#define FAPI_PARAM_REQUEST 0x00
+#define FAPI_PARAM_RESPONSE 0x01
+#define FAPI_CONFIG_REQUEST 0x02
+#define FAPI_CONFIG_RESPONSE 0x03
+#define FAPI_START_REQUEST 0x04
+#define FAPI_STOP_REQUEST 0x05
+#define FAPI_STOP_INDICATION 0x06
+#define FAPI_ERROR_INDICATION 0x07
+// Reserved 0x08 - 0x0F and 0x02 - 0x7f
+// 0x01 - 0x1F is used in vendor extension
+
+#define FAPI_DL_TTI_REQUEST 0x80
+#define FAPI_UL_TTI_REQUEST 0x81
+#define FAPI_SLOT_INDICATION 0x82
+#define FAPI_UL_DCI_REQUEST 0x83
+#define FAPI_TX_DATA_REQUEST 0x84
+#define FAPI_RX_DATA_INDICATION 0x85
+#define FAPI_CRC_INDICATION 0x86
+#define FAPI_UCI_INDICATION 0x87
+#define FAPI_SRS_INDICATION 0x88
+#define FAPI_RACH_INDICATION 0x89
+// Reserved 0x8a -0xff
+
+// Tags per 5G FAPI
+// Cell Parameters
+#define FAPI_RELEASE_CAPABILITY_TAG 0x0001
+#define FAPI_PHY_STATE_TAG 0x0002
+#define FAPI_SKIP_BLANK_DL_CONFIG_TAG 0x0003
+#define FAPI_SKIP_BLANK_UL_CONFIG_TAG 0x0004
+#define FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG 0x0005
+#define FAPI_CYCLIC_PREFIX_TAG 0x0006
+// PDCCH Parameters
+#define FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG 0x0007
+#define FAPI_SUPPORTED_BANDWIDTH_DL_TAG 0x0008
+#define FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG 0x0009
+#define FAPI_SUPPORTED_BANDWIDTH_UL_TAG 0x000A
+#define FAPI_CCE_MAPPING_TYPE_TAG 0x000B
+#define FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000c
+#define FAPI_PRECODER_GRANULARITY_CORESET_TAG 0x000d
+#define FAPI_PDCCH_MU_MIMO_TAG 0x000e
+#define FAPI_PDCCH_PRECODER_CYCLING_TAG 0x000f
+#define FAPI_MAX_PDCCHS_PER_SLOT_TAG 0x0010
+// PUCCH Parameters
+#define FAPI_PUCCH_FORMATS_TAG 0x0011
+#define FAPI_MAX_PUCCHS_PER_SLOT_TAG 0x0012
+// PDSCH Parameters
+#define FAPI_PDSCH_MAPPING_TYPE_TAG 0x0013
+#define FAPI_PDSCH_ALLOCATION_TYPES_TAG 0x0014
+#define FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015
+#define FAPI_PDSCH_CBG_TAG 0x0016
+#define FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017
+#define FAPI_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018
+#define FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019
+#define FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG 0x001a
+#define FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001b
+#define FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001c
+#define FAPI_MAX_MU_MIMO_USERS_DL_TAG 0x001d
+#define FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001e
+#define FAPI_PREMPTIONSUPPORT_TAG 0x001f
+#define FAPI_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020
+// PUSCH Parameters
+#define FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021
+#define FAPI_UCI_ONLY_PUSCH_TAG 0x0022
+#define FAPI_PUSCH_FREQUENCY_HOPPING_TAG 0x0023
+#define FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024
+#define FAPI_PUSCH_DMRS_MAX_LEN_TAG 0x0025
+#define FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026
+#define FAPI_PUSCH_CBG_TAG 0x0027
+#define FAPI_PUSCH_MAPPING_TYPE_TAG 0x0028
+#define FAPI_PUSCH_ALLOCATION_TYPES_TAG 0x0029
+#define FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002a
+#define FAPI_PUSCH_MAX_PTRS_PORTS_TAG 0x002b
+#define FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002c
+#define FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002d
+#define FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002e
+#define FAPI_MAX_MU_MIMO_USERS_UL_TAG 0x002f
+#define FAPI_DFTS_OFDM_SUPPORT_TAG 0x0030
+#define FAPI_PUSCH_AGGREGATION_FACTOR_TAG 0x0031
+// PRACH Parameters
+#define FAPI_PRACH_LONG_FORMATS_TAG 0x0032
+#define FAPI_PRACH_SHORT_FORMATS_TAG 0x0033
+#define FAPI_PRACH_RESTRICTED_SETS_TAG 0x0034
+#define FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035
+// Measurement Parameters
+#define FAPI_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036
+
+// CONFIG TLV TAGS per 5G FAPI
+// Carrier Configuration
+#define FAPI_DL_BANDWIDTH_TAG 0x1001
+#define FAPI_DL_FREQUENCY_TAG 0x1002
+#define FAPI_DL_K0_TAG 0x1003
+#define FAPI_DL_GRIDSIZE_TAG 0x1004
+#define FAPI_NUM_TX_ANT_TAG 0x1005
+#define FAPI_UPLINK_BANDWIDTH_TAG 0x1006
+#define FAPI_UPLINK_FREQUENCY_TAG 0x1007
+#define FAPI_UL_K0_TAG 0x1008
+#define FAPI_UL_GRID_SIZE_TAG 0x1009
+#define FAPI_NUM_RX_ANT_TAG 0x100a
+#define FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG 0x100b
+// Cell Configuration
+#define FAPI_PHY_CELL_ID_TAG 0x100c
+#define FAPI_FRAME_DUPLEX_TYPE_TAG 0x100d
+// SSB Configuration
+#define FAPI_SS_PBCH_POWER_TAG 0x100e
+#define FAPI_BCH_PAYLOAD_TAG 0x100f
+#define FAPI_SCS_COMMON_TAG 0x1010
+// PRACH Configuration
+#define FAPI_PRACH_SEQUENCE_LENGTH_TAG 0x1011
+#define FAPI_PRACH_SUBC_SPACING_TAG 0x1012
+#define FAPI_RESTRICTED_SET_CONFIG_TAG 0x1013
+#define FAPI_NUM_PRACH_FD_OCCASIONS_TAG 0x1014
+#define FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015
+#define FAPI_NUM_ROOT_SEQUENCES_TAG 0x1016
+#define FAPI_K1_TAG 0x1017
+#define FAPI_PRACH_ZERO_CORR_CONF_TAG 0x1018
+#define FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019
+#define FAPI_UNUSED_ROOT_SEQUENCES_TAG 0x101a
+#define FAPI_SSB_PER_RACH_TAG 0x101b
+#define FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101c
+// SSB Table
+#define FAPI_SSB_OFFSET_POINT_A_TAG 0x101d
+#define FAPI_BETA_PSS_TAG 0x101e
+#define FAPI_SSB_PERIOD_TAG 0x101f
+#define FAPI_SSB_SUBCARRIER_OFFSET_TAG 0x1020
+#define FAPI_MIB_TAG 0x1021
+#define FAPI_SSB_MASK_TAG 0x1022
+#define FAPI_BEAM_ID_TAG 0x1023
+#define FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024
+#define FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025
+// TDD Table
+#define FAPI_TDD_PERIOD_TAG 0x1026
+#define FAPI_SLOT_CONFIG_TAG 0x1027
+// Measurement Configuration
+#define FAPI_RSSI_MEASUREMENT_TAG 0x1028
+// Prach Configuration Index
+#define FAPI_PRACH_CONFIG_INDEX_TAG 0x1029
+// DMRS-TypeA Pos
+#define FAPI_DMRS_TYPE_A_POS_TAG 0x102A
+
+// Error Codes updated per 5G FAPI Table 3-31
+#define FAPI_MSG_OK 0x0
+#define FAPI_MSG_INVALID_STATE 0x1
+#define FAPI_MSG_INVALID_CONFIG 0x2
+#define FAPI_MSG_SFN_OUT_OF_SYNC 0x3
+#define FAPI_MSG_SLOT_ERR 0x4
+#define FAPI_MSG_BCH_MISSING 0x5
+#define FAPI_MSG_INVALID_SFN 0x6
+#define FAPI_MSG_UL_DCI_ERR 0x7
+#define FAPI_MSG_TX_ERR 0x8
+
+// 5G FAPI Definitions
+#define FAPI_NUMEROLOGIES 5
+#define FAPI_MAX_NUM_UNUSED_ROOT_SEQUENCES 63 // 38.331 page 383
+#define FAPI_MAX_NUM_PRACH_FD_OCCASIONS 64 // 38.331 page 383
+#define FAPI_MAX_NUM_OF_SYMBOLS_PER_SLOT 14
+#define FAPI_MAX_TDD_PERIODICITY 160 // 38.212 11.1 for u=4 and P=10 ms
+// m=p*q with p number of panels and q number of TxRU/RxRU per panel,
+// depends on the RF configuration, currently n=m=4, q=1, p=4 and k=21
+// (number of beams per pannel). n number of antenna ports
+#define FAPI_MAX_NUMBER_TX_RUS 4
+#define FAPI_MAX_NUMBER_OF_BEAMS 64 // Intel API Page 27
+#define FAPI_MAX_NUM_ANT_PORTS 8 // Based on current RF
+#define FAPI_MAX_NUM_LAYERS 8 // 38.211 Table 7.3.1.3-1
+#define FAPI_MAX_NUM_TLVS_CELL_PARMS 1505 // 5G FAPI Table 3-9 (A)
+#define FAPI_MAX_NUM_TLVS_CARRIER_PARMS 27 // 5G FAPI Table 3-10 (B)
+#define FAPI_MAX_NUM_TLVS_PDCCH_PARMS 6 // 5G FAPI Table 3-11 (C)
+#define FAPI_MAX_NUM_TLVS_PUCCH_PARMS 2 // 5G FAPI Table 3-12 (D)
+#define FAPI_MAX_NUM_TLVS_PDSCH_PARMS 14 // 5G FAPI Table 3-13 (E)
+#define FAPI_MAX_NUM_TLVS_PUSCH_PARMS 17 // 5G FAPI Table 3-14 (F)
+#define FAPI_MAX_NUM_TLVS_PRACH_PARMS 4 // 5G FAPI Table 3-15 (G)
+#define FAPI_MAX_NUM_TLVS_MEAS_PARMS 1 // 5G FAPI Table 3-16 (H)
+#define FAPI_MAX_NUM_TLVS_PARAMS 1576 // A+B+C+D+E+F+G+H + Padding
+// Carrier Table 11 + Cell Config 2 + SSB Config 3 + PRACH Config 414 + SSB
+// Table 71 + TDD Table 141 + Measurements 1
+#define FAPI_MAX_NUM_TLVS_CONFIG 1500
+
+#define FAPI_UL_DCI_REQUEST_PDCCH_PDU 0
+
+#define FAPI_MAX_NUMBER_UNSUPPORTED_TLVS 74
+#define FAPI_MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS 74
+#define FAPI_MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS 74
+#define FAPI_MAX_NUMBER_OF_MISSING_TLVS 74
+#define FAPI_MAX_NUM_DIGBFINTERFACES 4 // Based on RF, 5G FAPI says {0,255}
+#define FAPI_MAX_NUM_PRGS_PER_TTI 4 // Based on 38.214 5.1.2.3
+#define FAPI_DCI_PAYLOAD_BYTE_LEN 32 // Based on Intel API MAX_DCI_BIT_BYTE_LEN
+#define FAPI_MAX_NUMBER_DL_DCI 1 // Based on Intel API MAX_NUM_PDCCH
+#define FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU 2 // Based on MAX_DL_CODEWORD
+// Based on (MAX_NUM_PDSCH*MAX_DL_CODEWORD + MAX_NUM_PDCCH + MAX_NUM_SRS +
+// 1 PBCH/SLOT)
+#define FAPI_MAX_NUMBER_DL_PDUS_PER_TTI 15
+
+#define FAPI_MAX_NUMBER_OF_UES_PER_TTI 16 // Per common_ran_parameters.h
+// Based on Max Tb size of 1376264 bits + 24 crc over (8848-24) and O/H
+#define FAPI_MAX_NUM_CB_PER_TTI_IN_BYTES 192
+
+#define FAPI_MAX_NUM_PTRS_PORTS 2 // Per 3GPP 38.212 Table 7.3.1.1.2-21
+#define FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI 16 // FlexRAN API Table 33
+#define FAPI_MAX_NUMBER_UL_PDUS_PER_TTI 328 // (MAX_NUM_PUSCH+MAX_NUM_PUCCH+MAX_NUM_SRS+MAX_NUM_PRACH_DET)
+#define FAPI_MAX_NUMBER_DCI_PDUS_PER_TTI 32 // Based on MAX_NUM_PDCCH
+#define FAPI_MAX_NUMBER_OF_TLVS_PER_PDU 1 // one for each codeword
+#define FAPI_MAX_NUMBER_TX_PDUS_PER_TTI 129 // Same as FAPI_MAX_NUMBER_DL_PDUS_PER_TTI
+// Based on 38.214 5.1.3.4, the TBS is 1376264 bits and divided by 8 and
+// aligned to 64 bytes
+#define FAPI_MAX_PDU_LENGTH 172096
+#define FAPI_TX_DATA_PAYLOAD 0x00
+#define FAPI_TX_DATA_PTR_TO_PAYLOAD_32 0x01
+#define FAPI_TX_DATA_OFFSET_TO_PAYLOAD 0x02
+#define FAPI_TX_DATA_PTR_TO_PAYLOAD_64 0x03
+
+#define FAPI_MAX_NUMBER_OF_PDUS_PER_TTI 129 // Same as FAPI_MAX_NUMBER_DL_PDUS_PER_TTI
+#define FAPI_MAX_NUMBER_OF_ULSCH_PDUS_PER_SLOT 64 // NUM_PUSCH_CHAN*FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU
+#define FAPI_MAX_NUMBER_OF_CRCS_PER_SLOT 32 // Based on MAX_NUM_UL_CHAN
+#define FAPI_MAX_HARQ_INFO_LEN_BYTES 214 // Based on 5G FAPI Table 3-70
+#define FAPI_MAX_CSI_PART1_DATA_BYTES 214 // Based on 5G FAPI Table 3-71
+#define FAPI_MAX_CSI_PART2_DATA_BYTES 214 // Based on 5G FAPI Table 3-72
+#define FAPI_MAX_NUMBER_OF_HARQS_PER_IND 2 // Based on 5G FAPI Table 3-68
+#define FAPI_MAX_SR_PAYLOAD_SIZE 1 // Based on 5G FAPI Table 3-69
+#define FAPI_MAX_HARQ_PAYLOAD_SIZE 214 // Based on 5G FAPI Table 3-70
+#define FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT 200 // Based on MAX_NUM_PUCCH
+#define FAPI_MAX_NUMBER_RBS 273 // Based on MAX_NUM_OF_PRB_IN_FULL_BAND
+#define FAPI_MAX_NUMBER_OF_REP_SYMBOLS 4 // Based on 5g FAPI Table 3-73
+#define FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT 32 // Based on MAX_NUM_SRS
+#define FAPI_MAX_NUM_PREAMBLES_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET
+#define FAPI_MAX_NUMBER_RACH_PDUS_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET
+#define FAPI_MAX_PDUS_PER_SLOT 64
+#define FAPI_MAX_NUM_TLVS_START 3 // Based on Timer Mode requirement.
+#define FAPI_MAX_NUM_TLVS_SHUTDOWN 1 // Based on Timer Mode requirement.
+#define FAPI_MAX_UCI_BIT_BYTE_LEN 256
+
+ enum ul_tti_pdu_type_e {
+ FAPI_PRACH_PDU_TYPE = 0,
+ FAPI_PUSCH_PDU_TYPE,
+ FAPI_PUCCH_PDU_TYPE,
+ FAPI_SRS_PDU_TYPE,
+ FAPI_UL_TTI_PDU_TYPE_MAX
+ };
+
+ enum dl_tti_pdu_type_e {
+ FAPI_PDCCH_PDU_TYPE = 0,
+ FAPI_PDSCH_PDU_TYPE,
+ FAPI_CSIRS_PDU_TYPE,
+ FAPI_PBCH_PDU_TYPE,
+ FAPI_DL_TTI_PDU_TYPE_MAX
+ };
+
+//------------------------------------------------------------------------------------------------------------
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t num_msg;
+ // Can be used for Phy Id or Carrier Id 5G FAPI Table 3-2
+ uint8_t handle;
+ } __attribute__((packed)) fapi_msg_header_t, *p_fapi_msg_header_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t numMsg;
+ uint8_t opaque;
+ uint16_t msg_id;
+ uint32_t length; // Length of the message body in bytes 5G FAPI Table 3-3
+ } __attribute__((packed)) fapi_msg_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t tag;
+ uint16_t length; // 5G FAPI Table 3-7 Fixed part
+ } __attribute__((packed)) fapi_tl_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_tl_t tl;
+ uint8_t value; // TLV with byte value
+ uint8_t rsv[3]; // Per 5g FAPI 3.3.1.4 the lenght of the value parameter must be 32 bits
+ } __attribute__((packed)) fapi_uint8_tlv_t;
+
+ typedef struct {
+ fapi_tl_t tl;
+ uint8_t *value; // TLV with unsigned 32 bit value
+ } __attribute__((packed)) fapi_uint8_ptr_tlv_t;
+
+ typedef struct {
+ uint16_t tag;
+ uint32_t length; // 5G FAPI Table 3-7 Fixed part
+ union
+ {
+ uint32_t *ptr; // TLV with unsigned 32 bit value
+ uint32_t direct[1000]; // TLV with unsigned 32 bit value
+ }value;
+ } __attribute__((packed)) fapi_uint32_ptr_tlv_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_tl_t tl;
+ uint16_t value; // TLV with unsigned 16 bit value
+ uint8_t rsv[2]; // Per 5g FAPI 3.3.1.4 the lenght of the value parameter must be 32 bits
+ } __attribute__((packed)) fapi_uint16_tlv_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_tl_t tl;
+ int16_t value; // TLV with signed 16 bit value
+ uint8_t rsv[2]; // Per 5g FAPI 3.3.1.4 the lenght of the value parameter must be 32 bits
+ } __attribute__((packed)) fapi_int16_tlv_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_tl_t tl;
+ uint32_t value; // TLV with unsigned 32 bit value
+ } __attribute__((packed)) fapi_uint32_tlv_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t tag; // In 5G FAPI for Cell Params inside Table 3-9 under NumConfigTLVsToReport Loop
+ uint8_t length;
+ uint8_t value;
+ } __attribute__((packed)) fapi_config_tlv_t;
+
+ typedef struct {
+ fapi_tl_t tl;
+ uint16_t value[FAPI_NUMEROLOGIES];
+ uint16_t rsv; // To be 32-bit aligned, if FAPI_NUMEROLOGIES changes to some other value than 5 please ensure 32 bit alignment
+ } __attribute__((packed)) fapi_config_num_tlv_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header; // For PARAM.req message length in fapi_msg_t is zero per 5G FAPI 3.3.1.1
+ } __attribute__((packed)) fapi_param_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint16_tlv_t releaseCapability;
+ fapi_uint16_tlv_t phyState;
+ fapi_uint8_tlv_t skipBlankDlConfig;
+ fapi_uint8_tlv_t skipBlankUlConfig;
+ fapi_uint16_tlv_t numTlvsToReport;
+ fapi_config_tlv_t tlvStatus[FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-9
+ } __attribute__((packed)) fapi_cell_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t cyclicPrefix;
+ fapi_uint8_tlv_t supportedSubcarrierSpacingDl;
+ fapi_uint16_tlv_t supportedBandwidthDl;
+ fapi_uint8_tlv_t supportedSubcarrierSpecingsUl;
+ fapi_uint16_tlv_t supportedBandwidthUl; // 5G FAPI Table 3-10
+ } __attribute__((packed)) fapi_carrier_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t cceMappingType;
+ fapi_uint8_tlv_t coresetOutsideFirst3OfdmSymsOfSlot;
+ fapi_uint8_tlv_t precoderGranularityCoreset;
+ fapi_uint8_tlv_t pdcchMuMimo;
+ fapi_uint8_tlv_t pdcchPrecoderCycling;
+ fapi_uint8_tlv_t maxPdcchsPerSlot; // 5G FAPI Table 3-11
+ } __attribute__((packed)) fapi_pdcch_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t pucchFormats;
+ fapi_uint8_tlv_t maxPucchsPerSlot; // 5G FAPI Table 3-12
+ } __attribute__((packed)) fapi_pucch_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t pdschMappingType;
+ fapi_uint8_tlv_t pdschAllocationTypes;
+ fapi_uint8_tlv_t pdschVrbToPrbMapping;
+ fapi_uint8_tlv_t pdschCbg;
+ fapi_uint8_tlv_t pdschDmrsConfigTypes;
+ fapi_uint8_tlv_t pdschDmrsMaxLength;
+ fapi_uint8_tlv_t pdschDmrsAdditionalPos;
+ fapi_uint8_tlv_t maxPdschsTBsPerSlot;
+ fapi_uint8_tlv_t maxNumberMimoLayersPdsch;
+ fapi_uint8_tlv_t supportedMaxModulationOrderDl;
+ fapi_uint8_tlv_t maxMuMimoUsersDl;
+ fapi_uint8_tlv_t pdschDataInDmrsSymbols;
+ fapi_uint8_tlv_t premptionSupport;
+ fapi_uint8_tlv_t pdschNonSlotSupport; // 5G FAPI Table 3-13
+ } __attribute__((packed)) fapi_pdsch_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t uciMuxUlschInPusch;
+ fapi_uint8_tlv_t uciOnlyPusch;
+ fapi_uint8_tlv_t puschFrequencyHopping;
+ fapi_uint8_tlv_t puschDmrsConfigTypes;
+ fapi_uint8_tlv_t puschDmrsMaxLen;
+ fapi_uint8_tlv_t puschDmrsAdditionalPos;
+ fapi_uint8_tlv_t puschCbg;
+ fapi_uint8_tlv_t puschMappingType;
+ fapi_uint8_tlv_t puschAllocationTypes;
+ fapi_uint8_tlv_t puschVrbToPrbMapping;
+ fapi_uint8_tlv_t puschMaxPtrsPorts;
+ fapi_uint8_tlv_t maxPduschsTBsPerSlot;
+ fapi_uint8_tlv_t maxNumberMimoLayersNonCbPusch;
+ fapi_uint8_tlv_t supportedModulationOrderUl;
+ fapi_uint8_tlv_t maxMuMimoUsersUl;
+ fapi_uint8_tlv_t dftsOfdmSupport;
+ fapi_uint8_tlv_t puschAggregationFactor; // 5G FAPI Table 3-14
+ } __attribute__((packed)) fapi_pusch_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t prachLongFormats;
+ fapi_uint16_tlv_t prachShortFormats;
+ fapi_uint8_tlv_t prachRestrictedSets;
+ fapi_uint8_tlv_t maxPrachFdOccasionsInASlot; // 5G FAPI Table 3-15
+ } __attribute__((packed)) fapi_prach_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t rssiMeasurementSupport; // 5G FAPI Table 3-16
+ } __attribute__((packed)) fapi_meas_parms_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_cell_parms_t cell_parms;
+ fapi_carrier_parms_t carr_parms;
+ fapi_pdcch_parms_t pdcch_parms;
+ fapi_pucch_parms_t pucch_parms;
+ fapi_pdsch_parms_t pdsch_parms;
+ fapi_pusch_parms_t pusch_parms;
+ fapi_prach_parms_t prach_parms;
+ fapi_meas_parms_t meas_parms; // 5G FAPI Table 3-8
+ } __attribute__((packed)) fapi_params_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint8_t error_code;
+ uint8_t number_of_tlvs;
+ fapi_uint16_tlv_t tlvs[FAPI_MAX_NUM_TLVS_PARAMS]; // 5G FAPI Table 3-5
+ } __attribute__((packed)) fapi_param_resp_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint16_tlv_t dlBandwidth;
+ fapi_uint32_tlv_t dlFrequency;
+ fapi_config_num_tlv_t dlk0;
+ fapi_config_num_tlv_t dlGridSize;
+ fapi_uint16_tlv_t numTxAnt;
+ fapi_uint16_tlv_t uplinkBandwidth;
+ fapi_uint32_tlv_t uplinkFrequency;
+ fapi_config_num_tlv_t ulk0;
+ fapi_config_num_tlv_t ulGridSize;
+ fapi_uint16_tlv_t numRxAnt;
+ fapi_uint8_tlv_t frequencyShift7p5KHz; // 5G FAPI Table 3-21
+ } __attribute__((packed)) fapi_carrier_config_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t phyCellId;
+ fapi_uint8_tlv_t frameDuplexType; // 5G FAPI Table 3-22
+ } __attribute__((packed)) fapi_cell_config_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint32_tlv_t ssPbchPower;
+ fapi_uint8_tlv_t bchPayload;
+ fapi_uint8_tlv_t scsCommon; // 5G FAPI Table 3-23
+ } __attribute__((packed)) fapi_ssb_config_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint16_tlv_t prachRootSequenceIndex;
+ fapi_uint8_tlv_t numRootSequences;
+ fapi_uint16_tlv_t k1;
+ fapi_uint8_tlv_t prachZeroCorrConf;
+ fapi_uint16_tlv_t numUnusedRootSequences; // 5G FAPI Table 3-24 Subset
+ fapi_uint16_tlv_t unusedRootSequences[FAPI_MAX_NUM_UNUSED_ROOT_SEQUENCES];
+ } __attribute__((packed)) fapi_prachFdOccasion_t;
+
+// Updated per 5G FAPI_
+ typedef struct {
+ fapi_uint8_tlv_t prachSequenceLength;
+ fapi_uint8_tlv_t prachSubCSpacing;
+ fapi_uint8_tlv_t restrictedSetConfig;
+ fapi_uint8_tlv_t numPrachFdOccasions;
+ fapi_uint8_tlv_t prachConfigIndex;
+ fapi_prachFdOccasion_t prachFdOccasion[FAPI_MAX_NUM_PRACH_FD_OCCASIONS];
+ fapi_uint8_tlv_t ssbPerRach;
+ fapi_uint8_tlv_t prachMultipleCarriersInABand; // 5G FAPI Table 3-24
+ } __attribute__((packed)) fapi_prach_configuration_t;
+
+//Updated per 5G FAPI
+ typedef struct {
+ fapi_uint16_tlv_t ssbOffsetPointA;
+ fapi_uint8_tlv_t betaPss;
+ fapi_uint8_tlv_t ssbPeriod;
+ fapi_uint8_tlv_t ssbSubCarrierOffset;
+ fapi_uint32_tlv_t mib;
+ fapi_uint32_tlv_t ssbMask[2];
+ fapi_uint8_tlv_t beamId[64];
+ fapi_uint8_tlv_t ssPbchMultipleCarriersInABand;
+ fapi_uint8_tlv_t multipleCellsSsPbchInACarrier; // 5G FAPI Table 3-25
+ } __attribute__((packed)) fapi_ssb_table_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t slotConfig[FAPI_MAX_NUM_OF_SYMBOLS_PER_SLOT]; // 5G FAPI Table 3-26 Subset
+ } __attribute__((packed)) fapi_slotconfig_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t tddPeriod;
+ fapi_slotconfig_t slotConfig[FAPI_MAX_TDD_PERIODICITY]; // 5G FAPI Table 3-26
+ } __attribute__((packed)) fapi_tdd_table_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_uint8_tlv_t rssiMeasurement; // 5G FAPI Table 3-27
+ } __attribute__((packed)) fapi_meas_config_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ int16_t digBeamWeightRe;
+ int16_t digBeamWeightIm; // 5G FAPI Table 3-32 Subset
+ } __attribute__((packed)) fapi_dig_beam_weight_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t beamIdx;
+ fapi_dig_beam_weight_t digBeamWeight[FAPI_MAX_NUMBER_TX_RUS]; // 5G FAPI Table 3-32 Subset
+ } __attribute__((packed)) fapi_dig_beam_config_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t numDigBeams;
+ uint16_t numTxRus;
+ fapi_dig_beam_config_t digBeam[FAPI_MAX_NUMBER_OF_BEAMS]; // 5G FAPI Table 3-32
+ } __attribute__((packed)) fapi_beamforming_table_t;
+ typedef struct {
+ int16_t preCoderWeightRe;
+ int16_t preCoderWeightIm; // 5G FAPI Table 3-33 Subset
+ } __attribute__((packed)) fapi_precoderWeight_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_precoderWeight_t precoder_weight[FAPI_MAX_NUM_ANT_PORTS]; // 5G FAPI Table 3-33 Subset
+ } __attribute__((packed)) fapi_precoder_weight_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pmIdx;
+ uint16_t numLayers;
+ uint16_t numAntPorts;
+ fapi_precoder_weight_t precoderWeight[FAPI_MAX_NUM_LAYERS]; // 5G FAPI Table 3-33
+ } __attribute__((packed)) fapi_precoding_table_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_carrier_config_t carrierConfig;
+ fapi_cell_config_t cellConfig;
+ fapi_ssb_config_t ssbConfig;
+ fapi_prach_configuration_t prachConfig;
+ fapi_ssb_table_t ssbTable;
+ fapi_tdd_table_t tddTable;
+ fapi_meas_config_t measConfig;
+ fapi_beamforming_table_t beamformingTable;
+ fapi_precoding_table_t precodingTable; // 5G FAPI Table 3-20
+ } __attribute__((packed)) fapi_config_t;
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t number_of_tlvs;
+ fapi_uint32_tlv_t tlvs[FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-17
+ } __attribute__((packed)) fapi_config_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint8_t error_code;
+ uint8_t number_of_invalid_tlvs;
+ uint8_t number_of_inv_tlvs_idle_only;
+ uint8_t number_of_inv_tlvs_running_only;
+ uint8_t number_of_missing_tlvs;
+ fapi_uint16_tlv_t tlvs[4 * FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-18
+ // fapi_uint16_tlv_t unsupported_or_invalid_tlvs[FAPI_MAX_NUMBER_UNSUPPORTED_TLVS];
+ // fapi_uint16_tlv_t invalid_idle_only_tlvs[FAPI_MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS];
+ // fapi_uint16_tlv_t invalid_running_only_tlvs[FAPI_MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS];
+ // fapi_uint16_tlv_t missing_tlvs[FAPI_MAX_NUMBER_OF_MISSING_TLVS];
+ } __attribute__((packed)) fapi_config_resp_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ } __attribute__((packed)) fapi_start_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header; // Message Length is zero for STOP.request
+ } __attribute__((packed)) fapi_stop_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header; // Message Length is zero for STOP.indication
+ } __attribute__((packed)) fapi_stop_ind_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t message_id;
+ uint8_t error_code; // 5G FAPI Table 3-30
+ } __attribute__((packed)) fapi_error_ind_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot; // 5G FAPI Table 3-34
+ } __attribute__((packed)) fapi_slot_ind_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t beamidx; // 5G FAPI Table 3-43 subset
+ } __attribute__((packed)) fapi_bmi_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pmIdx;
+ fapi_bmi_t beamIdx[FAPI_MAX_NUM_DIGBFINTERFACES]; // 5G FAPI Table 3-43 subset
+ } __attribute__((packed)) fapi_pmi_bfi_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t numPrgs;
+ uint16_t prgSize;
+ uint8_t digBfInterfaces;
+ fapi_pmi_bfi_t pmi_bfi[FAPI_MAX_NUM_PRGS_PER_TTI]; // 5G FAPI Table 3-43
+ } __attribute__((packed)) fapi_precoding_bmform_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t rnti;
+ uint16_t scramblingId;
+ uint16_t scramblingRnti;
+ uint8_t cceIndex;
+ uint8_t aggregationLevel;
+ fapi_precoding_bmform_t pc_and_bform;
+ uint8_t beta_pdcch_1_0;
+ uint8_t powerControlOffsetSS;
+ uint16_t payloadSizeBits;
+ uint8_t payload[FAPI_DCI_PAYLOAD_BYTE_LEN]; // 5G FAPI Table 3-37
+ } __attribute__((packed)) fapi_dl_dci_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t bwpSize;
+ uint16_t bwpStart;
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix;
+ uint8_t startSymbolIndex;
+ uint8_t durationSymbols;
+ uint8_t freqDomainResource[6];
+ uint8_t cceRegMappingType;
+ uint8_t regBundleSize;
+ uint8_t interleaverSize;
+ uint8_t coreSetType;
+ uint16_t shiftIndex;
+ uint8_t precoderGranularity;
+ uint16_t numDlDci; // 5G FAPI Table 3-36
+ fapi_dl_dci_t dlDci[FAPI_MAX_NUMBER_DL_DCI];
+ } __attribute__((packed)) fapi_dl_pdcch_pdu_t;
+
+ // Updated per 5G FAPI
+ typedef struct {
+ uint16_t targetCodeRate;
+ uint8_t qamModOrder;
+ uint8_t mcsIndex;
+ uint8_t mcsTable;
+ uint8_t rvIndex;
+ uint32_t tbSize; // 5G FAPI Table 3-38 Subset
+ } __attribute__((packed)) fapi_codeword_pdu_t;
+
+ typedef struct
+ {
+ uint8_t ldpcBaseGraph;
+ uint32_t tbSizeLbrmBytes;
+ } __attribute__((packed))fapi_pdsch_maintenance_param_v3;
+
+ // Updated per 5G FAPI
+ typedef struct {
+ uint16_t pduBitMap;
+ uint16_t rnti;
+ uint16_t pdu_index;
+ uint16_t bwpSize;
+ uint16_t bwpStart;
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix;
+ uint8_t nrOfCodeWords;
+ fapi_codeword_pdu_t cwInfo[FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU];
+ uint16_t dataScramblingId;
+ uint8_t nrOfLayers;
+ uint8_t transmissionScheme;
+ uint8_t refPoint;
+ uint16_t dlDmrsSymbPos;
+ uint8_t dmrsConfigType;
+ uint16_t dlDmrsScramblingId;
+ uint8_t scid;
+ uint8_t numDmrsCdmGrpsNoData;
+ uint16_t dmrsPorts;
+ uint8_t resourceAlloc;
+ uint8_t rbBitmap[36];
+ uint16_t rbStart;
+ uint16_t rbSize;
+ uint8_t vrbToPrbMapping;
+ uint8_t startSymbIndex;
+ uint8_t nrOfSymbols;
+ uint8_t ptrsPortIndex;
+ uint8_t ptrsTimeDensity;
+ uint8_t ptrsFreqDensity;
+ uint8_t ptrsReOffset;
+ uint8_t nEpreRatioOfPdschToPtrs;
+ fapi_precoding_bmform_t preCodingAndBeamforming;
+ uint8_t powerControlOffset;
+ uint8_t powerControlOffsetSS;
+ uint8_t isLastCbPresent;
+ uint8_t isInlineTbCrc;
+ uint32_t dlTbCrc; // 5G FAPI Table 3-38
+ fapi_pdsch_maintenance_param_v3 maintParamV3;
+ } __attribute__((packed)) fapi_dl_pdsch_pdu_t;
+
+ // Updated per 5G FAPI
+ typedef struct {
+ uint16_t bwpSize;
+ uint16_t bwpStart;
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix;
+ uint16_t startRb;
+ uint16_t nrOfRbs;
+ uint8_t csiType;
+ uint8_t row;
+ uint16_t freqDomain;
+ uint8_t symbL0;
+ uint8_t symbL1;
+ uint8_t cdmType;
+ uint8_t freqDensity;
+ uint16_t scramId;
+ uint8_t powerControlOffset;
+ uint8_t powerControlOffsetSs;
+ fapi_precoding_bmform_t preCodingAndBeamforming; // 5G FAPI Table 3-39
+ } __attribute__((packed)) fapi_dl_csi_rs_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t dmrsTypeAPosition;
+ uint8_t pdcchConfigSib1;
+ uint8_t cellBarred;
+ uint8_t intraFreqReselection; // 5G FAPI Table 3-42
+ } __attribute__((packed)) fapi_phy_mib_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ union {
+ uint32_t bchPayload;
+ fapi_phy_mib_pdu_t phyMibPdu; // 5G FAPI Table 3-40 Subset
+ };
+ } __attribute__((packed)) fapi_bch_payload_t;
+
+ // Updated per 5G FAPI
+ typedef struct {
+ uint16_t physCellId;
+ uint8_t betaPss;
+ uint8_t ssbBlockIndex;
+ uint8_t ssbSubCarrierOffset;
+ uint16_t ssbOffsetPointA;
+ uint8_t bchPayloadFlag;
+ fapi_bch_payload_t bchPayload;
+ fapi_precoding_bmform_t preCodingAndBeamforming; // 5G FAPI Table 3-40
+ } __attribute__((packed)) fapi_dl_ssb_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pduType;
+ uint16_t pduSize;
+ union {
+ fapi_dl_pdcch_pdu_t pdcch_pdu;
+ fapi_dl_pdsch_pdu_t pdsch_pdu;
+ fapi_dl_csi_rs_pdu_t csi_rs_pdu;
+ fapi_dl_ssb_pdu_t ssb_pdu; // 5G FAPI Table 3-35 Subset
+ } pdu;
+ } __attribute__((packed)) fapi_dl_tti_req_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t nUe;
+ uint8_t pduIdx[FAPI_MAX_NUMBER_OF_UES_PER_TTI]; // 5G FAPI Subset Table 3-35 and Table 3-44
+ } __attribute__((packed)) fapi_ue_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t nPdus;
+ uint8_t nGroup;
+ fapi_dl_tti_req_pdu_t pdus[FAPI_MAX_PDUS_PER_SLOT]; // 5G FAPI Table 3-35
+ fapi_ue_info_t ue_grp_info[FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI];
+ } __attribute__((packed)) fapi_dl_tti_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t rvIndex;
+ uint8_t harqProcessId;
+ uint8_t newDataIndicator;
+ uint32_t tbSize;
+ uint16_t numCb; // 5G FAPI Table 3-47
+ uint8_t cbPresentAndPosition[2]; // Since the maximum number of Code Blocks per TCB in a CBG is 8 for 1 CW or 4 for 2CW and this is a bit field with pading to align to 32 bits
+ } __attribute__((packed)) fapi_pusch_data_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t harqAckBitLength;
+ uint16_t csiPart1BitLength;
+ uint16_t csiPart2BitLength;
+ uint8_t alphaScaling;
+ uint8_t betaOffsetHarqAck;
+ uint8_t betaOffsetCsi1;
+ uint8_t betaOffsetCsi2; // 5G FAPI Table 3-48
+ } __attribute__((packed)) fapi_pusch_uci_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t ptrsPortIndex;
+ uint8_t ptrsDmrsPort;
+ uint8_t ptrsReOffset; // 5G FAPI Table 3-49 Subset
+ } __attribute__((packed)) fapi_ptrs_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t numPtrsPorts;
+ fapi_ptrs_info_t ptrsInfo[FAPI_MAX_NUM_PTRS_PORTS];
+ uint8_t ptrsTimeDensity;
+ uint8_t ptrsFreqDensity; // 5G FAPI Table 3-49 Subset
+ uint8_t ulPtrsPower;
+ } __attribute__((packed)) fapi_pusch_ptrs_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t lowPaprGroupNumber;
+ uint16_t lowPaprSequenceNumber;
+ uint8_t ulPtrsSampleDensity;
+ uint8_t ulPtrsTimeDensityTransformPrecoding;
+ } __attribute__((packed)) fapi_dfts_ofdm_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_bmi_t beamIdx[FAPI_MAX_NUM_DIGBFINTERFACES];
+ } __attribute__((packed)) fapi_rx_bfi_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t trp_scheme;
+ uint16_t numPrgs;
+ uint16_t prgSize;
+ uint8_t digBfInterface;
+ fapi_rx_bfi_t rx_bfi[FAPI_MAX_NUM_PRGS_PER_TTI]; // 5G FAPI Table 3-53
+ } __attribute__((packed)) fapi_ul_rx_bmform_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t physCellId;
+ uint8_t numPrachOcas;
+ uint8_t prachFormat;
+ uint8_t numRa;
+ uint8_t prachStartSymbol;
+ uint16_t numCs;
+ fapi_ul_rx_bmform_pdu_t beamforming;
+ } __attribute__((packed)) fapi_ul_prach_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pduBitMap;
+ uint16_t rnti;
+ uint32_t handle;
+ uint16_t bwpSize;
+ uint16_t bwpStart;
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix;
+ uint16_t targetCodeRate;
+ uint8_t qamModOrder;
+ uint8_t mcsIndex;
+ uint8_t mcsTable;
+ uint8_t transformPrecoding;
+ uint16_t dataScramblingId;
+ uint8_t nrOfLayers;
+ uint16_t ulDmrsSymbPos;
+ uint8_t dmrsConfigType;
+ uint16_t ulDmrsScramblingId;
+ uint16_t puschIdentity; //ADDED as per : 55G FAPI: PHY API Version: 222.10.02
+ uint8_t scid;
+ uint8_t numDmrsCdmGrpsNoData;
+ uint16_t dmrsPorts;
+ uint8_t resourceAlloc;
+ uint8_t rbBitmap[36];
+ uint16_t rbStart;
+ uint16_t rbSize;
+ uint8_t vrbToPrbMapping;
+ uint8_t frequencyHopping;
+ uint16_t txDirectCurrentLocation;
+ uint8_t uplinkFrequencyShift7p5khz;
+ uint8_t startSymbIndex;
+ uint8_t nrOfSymbols;
+ fapi_pusch_data_t puschData;
+ fapi_pusch_uci_t puschUci;
+ fapi_pusch_ptrs_t puschPtrs;
+ fapi_dfts_ofdm_t dftsOfdm;
+ fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-46
+ fapi_pdsch_maintenance_param_v3 maintParamV3;
+ } __attribute__((packed)) fapi_ul_pusch_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t rnti;
+ uint32_t handle;
+ uint16_t bwpSize;
+ uint16_t bwpStart;
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix;
+ uint8_t formatType;
+ uint8_t multiSlotTxIndicator;
+ uint8_t pi2Bpsk;
+ uint16_t prbStart;
+ uint16_t prbSize;
+ uint8_t startSymbolIndex;
+ uint8_t nrOfSymbols;
+ uint8_t freqHopFlag;
+ uint16_t secondHopPrb;
+ uint8_t groupHopFlag;
+ uint8_t sequenceHopFlag;
+ uint16_t hoppingId;
+ uint16_t initialCyclicShift;
+ uint16_t dataScramblingId;
+ uint8_t timeDomainOccIdx;
+ uint8_t preDftOccIdx;
+ uint8_t preDftOccLen;
+ uint8_t addDmrsFlag;
+ uint16_t dmrsScramblingId;
+ uint8_t dmrsCyclicShift;
+ uint8_t srFlag;
+ uint16_t bitLenHarq;
+ uint16_t bitLenCsiPart1;
+ uint16_t bitLenCsiPart2;
+ fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-51
+ } __attribute__((packed)) fapi_ul_pucch_pdu_t;
+
+ typedef struct {
+ uint16_t srs_bandwidth_start;
+ uint8_t sequence_group;
+ uint8_t sequence_number;
+ } __attribute__((packed)) fapi_v4_srs_param_symbols_t;
+
+ typedef struct {
+ uint16_t srs_bandwidth_size;
+ fapi_v4_srs_param_symbols_t symbol_list[4];
+ uint32_t usage;
+ uint8_t report_type[4];
+ uint8_t singular_Value_representation;
+ uint8_t iq_representation;
+ uint16_t prg_size;
+ uint8_t num_total_ue_antennas;
+ uint32_t ue_antennas_in_this_srs_resource_set;
+ uint32_t sampled_ue_antennas;
+ uint8_t report_scope;
+ uint8_t num_ul_spatial_streams_ports;
+ uint8_t Ul_spatial_stream_ports[2];
+ } __attribute__((packed)) fapi_v4_srs_parameters_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t rnti;
+ uint32_t handle;
+ uint16_t bwpSize;
+ uint16_t bwpStart;
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix;
+ uint8_t numAntPorts;
+ uint8_t numSymbols;
+ uint8_t numRepetitions;
+ uint8_t timeStartPosition;
+ uint8_t configIndex;
+ uint16_t sequenceId;
+ uint8_t bandwidthIndex;
+ uint8_t combSize;
+ uint8_t combOffset;
+ uint8_t cyclicShift;
+ uint8_t frequencyPosition;
+ uint16_t frequencyShift;
+ uint8_t frequencyHopping;
+ uint8_t groupOrSequenceHopping;
+ uint8_t resourceType;
+ uint16_t tSrs;
+ uint16_t tOffset;
+ fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-52
+ fapi_v4_srs_parameters_t v4SrsParam;
+ } __attribute__((packed)) fapi_ul_srs_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pduType;
+ uint16_t pduSize;
+ union {
+ fapi_ul_prach_pdu_t prach_pdu;
+ fapi_ul_pusch_pdu_t pusch_pdu;
+ fapi_ul_pucch_pdu_t pucch_pdu;
+ fapi_ul_srs_pdu_t srs_pdu;
+ } pdu;
+ } __attribute__((packed)) fapi_ul_tti_req_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t nPdus;
+ uint8_t rachPresent;
+ uint8_t nUlsch;
+ uint8_t nUlcch;
+ uint8_t nGroup;
+ fapi_ul_tti_req_pdu_t pdus[FAPI_MAX_NUMBER_UL_PDUS_PER_TTI]; // 5G FAPI Table 3-44
+ fapi_ue_info_t ueGrpInfo[FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI];
+ } __attribute__((packed)) fapi_ul_tti_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pduType;
+ uint16_t pduSize;
+ fapi_dl_pdcch_pdu_t pdcchPduConfig; // 5G FAPI Table 3-54 Subset
+ } __attribute__((packed)) fapi_dci_pdu_t;
+
+ // Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t numPdus;
+ fapi_dci_pdu_t pdus[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT]; // 5G FAPI Table 3-54
+ } __attribute__((packed)) fapi_ul_dci_req_t;
+
+// Updated per 5G FAPI
+typedef struct {
+ uint32_t pdu_length;
+ uint16_t pdu_index;
+ uint32_t num_tlvs;
+ fapi_uint32_ptr_tlv_t tlvs[FAPI_MAX_NUMBER_OF_TLVS_PER_PDU]; // 5G FAPI Table 3-58 Subset
+ } __attribute__((packed)) fapi_tx_pdu_desc_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t num_pdus;
+ fapi_tx_pdu_desc_t pdu_desc[FAPI_MAX_NUMBER_DL_PDUS_PER_TTI]; // 5G FAPI Table 3-58
+ } __attribute__((packed)) fapi_tx_data_req_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t harqId;
+ uint32_t pdu_length;
+ uint8_t ul_cqi;
+ uint16_t timingAdvance;
+ uint16_t rssi;
+ void *pduData; // 5G FAPI Table 3-61 Subset
+ } __attribute__((packed)) fapi_pdu_ind_info_t;
+
+ // Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t numPdus;
+ fapi_pdu_ind_info_t pdus[FAPI_MAX_NUMBER_OF_ULSCH_PDUS_PER_SLOT]; // 5G FAPI Table 3-61
+ } __attribute__((packed)) fapi_rx_data_indication_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t harqId;
+ uint8_t tbCrcStatus;
+ uint16_t numCb;
+ uint8_t cbCrcStatus[FAPI_MAX_NUM_CB_PER_TTI_IN_BYTES]; // 5G FAPI Table 3-62 subset
+ uint8_t ul_cqi;
+ uint16_t timingAdvance;
+ uint16_t rssi;
+ } __attribute__((packed)) fapi_crc_ind_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t numCrcs;
+ fapi_crc_ind_info_t crc[FAPI_MAX_NUMBER_OF_CRCS_PER_SLOT]; // 5G FAPI Table 3-62
+ } __attribute__((packed)) fapi_crc_ind_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t harqCrc;
+ uint16_t harqBitLen;
+ uint8_t harqPayload[FAPI_MAX_HARQ_INFO_LEN_BYTES]; // 5G FAPI Table 3-70
+ } __attribute__((packed)) fapi_harq_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t csiPart1Crc;
+ uint16_t csiPart1BitLen;
+ uint8_t csiPart1Payload[FAPI_MAX_CSI_PART1_DATA_BYTES]; // 5G FAPI Table 3-71
+ } __attribute__((packed)) fapi_csi_p1_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t csiPart2Crc;
+ uint16_t csiPart2BitLen;
+ uint8_t csiPart2Payload[FAPI_MAX_CSI_PART2_DATA_BYTES]; // 5G FAPI Table 3-72
+ } __attribute__((packed)) fapi_csi_p2_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t pduBitmap;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t ul_cqi;
+ uint16_t timingAdvance;
+ uint16_t rssi; // 5G FAPI Table 3-64
+ fapi_harq_info_t harqInfo; // This is included if indicated by the pduBitmap
+ fapi_csi_p1_info_t csiPart1info; // This is included if indicated by the pduBitmap
+ fapi_csi_p2_info_t csiPart2info; // This is included if indicated by the pduBitmap
+ } __attribute__((packed)) fapi_uci_o_pusch_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t srIndication;
+ uint8_t srConfidenceLevel; // 5G FAPI Table 3-67
+ } __attribute__((packed)) fapi_sr_f0f1_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t numHarq;
+ uint8_t harqConfidenceLevel;
+ uint8_t harqValue[FAPI_MAX_NUMBER_OF_HARQS_PER_IND]; // 5G FAPI Table 3-68
+ } __attribute__((packed)) fapi_harq_f0f1_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t srBitlen;
+ uint8_t srPayload[FAPI_MAX_SR_PAYLOAD_SIZE + 1]; // 5G FAPI Table 3-69
+ } __attribute__((packed)) fapi_sr_f2f3f4_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t harqCrc;
+ uint16_t harqBitLen;
+ uint8_t harqPayload[FAPI_MAX_HARQ_PAYLOAD_SIZE + 2]; // 5G FAPI Table 3-70
+ } __attribute__((packed)) fapi_harq_f2f3f4_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t pduBitmap;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t pucchFormat;
+ uint8_t ul_cqi;
+ uint16_t timingAdvance;
+ uint16_t rssi; // 5G FAPI Table 3-66
+ fapi_sr_f2f3f4_info_t srF2F3F4Info; //ADDED as per : 55G FAPI: PHY API Version: 222.10.02
+ fapi_harq_f2f3f4_info_t harqF2F3F4Info;
+ fapi_csi_p1_info_t csiP1Info;
+ fapi_csi_p2_info_t csiP2Info;
+ } __attribute__((packed)) fapi_uci_o_pucch_f2f3f4_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t pduBitmap;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t pucchFormat;
+ uint8_t ul_cqi;
+ uint16_t timingAdvance;
+ uint16_t rssi; // 5G FAPI Table 3-65
+ fapi_sr_f0f1_info_t srInfo; // This is included if indicated by the pduBitmap
+ fapi_harq_f0f1_info_t harqInfo; // This is included if indicated by the pduBitmap
+ } __attribute__((packed)) fapi_uci_o_pucch_f0f1_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t pduType;
+ uint16_t pduSize;
+ union {
+ fapi_uci_o_pusch_t uciPusch;
+ fapi_uci_o_pucch_f0f1_t uciPucchF0F1;
+ fapi_uci_o_pucch_f2f3f4_t uciPucchF2F3F4; // 5G FAPI Table 3-63 subset
+ } uci;
+ } __attribute__((packed)) fapi_uci_pdu_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t numUcis; // 5G FAPI Table 3-63
+ fapi_uci_pdu_info_t uciPdu[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT];
+ } __attribute__((packed)) fapi_uci_indication_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t numRbs;
+ uint8_t rbSNR[FAPI_MAX_NUMBER_RBS]; // 5G FAPI Table 3-73 Subset
+ } __attribute__((packed)) fapi_symb_snr_t;
+
+ typedef struct
+ {
+ uint16_t tag;
+ uint32_t length;
+ uint32_t *value;
+ } __attribute__((packed)) fapi_srs_report_tlv_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint32_t handle;
+ uint16_t rnti;
+ uint16_t timingAdvance;
+ int16_t timingAdvanceOffsetNsec;
+ uint8_t srsUsage;
+ uint8_t reportType;
+ fapi_srs_report_tlv_t report_tlv;
+ } __attribute__((packed)) fapi_srs_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t controlLen;
+ uint8_t numPdus;
+ fapi_srs_pdu_t srsPdus[FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT]; // 5G FAPI Table 3-73
+ } __attribute__((packed)) fapi_srs_indication_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint8_t preambleIndex;
+ uint16_t timingAdvance;
+ uint32_t preamblePwr; // 5G FAPI Table 3-74 Subset
+ } __attribute__((packed)) fapi_preamble_info_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ uint16_t phyCellId;
+ uint8_t symbolIndex;
+ uint8_t slotIndex;
+ uint8_t freqIndex;
+ uint8_t avgRssi;
+ uint8_t avgSnr;
+ uint8_t numPreamble;
+ fapi_preamble_info_t preambleInfo[FAPI_MAX_NUM_PREAMBLES_PER_SLOT]; // 5G FAPI Table 3-74 Subset
+ } __attribute__((packed)) fapi_rach_pdu_t;
+
+// Updated per 5G FAPI
+ typedef struct {
+ fapi_msg_t header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t numPdus;
+ fapi_rach_pdu_t rachPdu[FAPI_MAX_NUMBER_RACH_PDUS_PER_SLOT]; // 5G FAPI Table 3-74
+ } __attribute__((packed)) fapi_rach_indication_t;
+
+//------------------------------------------------------------------------------
+
+#if defined(__cplusplus)
+}
+#endif
+#endif
Code Review / o-du / l2.git / commitdiff