msgHeader->num_msg++;
/* Intel L1 expects UL_DCI.request following DL_TTI.request */
- fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
msgHeader->num_msg++;
/* send Tx-DATA req message */
msgHeader->num_msg++;
/* Intel L1 expects UL_DCI.request following DL_TTI.request */
- fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
msgHeader->num_msg++;
prevElem = dlTtiElem->p_next->p_next;
numPduEncoded++;
/* free UL GRANT at SCH */
MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
- currDlSlot->dlInfo.ulGrant = NULLP;
}
#ifdef ODU_SLOT_IND_DEBUG_LOG
DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
uint8_t ueId = 0;
uint8_t lcIdx = 0;
uint8_t *txPdu = NULLP;
- uint8_t pdschSlot = 0;
uint8_t schInfoIdx = 0 ;
uint16_t cellIdx = 0, txPduLen = 0;
MacDlData macDlData;
Inst schInst = pst->dstInst-SCH_INST_START;
SchCellCb *cellCb = NULLP;
SchUeCb *ueCb = NULLP;
- uint8_t lcgIdx;
+ uint8_t lcgIdx = 0;
#ifdef CALL_FLOW_DEBUG_LOG
DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_SHORT_BSR\n");
cellCb = schCb[schInst].cells[schInst];
ueCb = schGetUeCb(cellCb, bsrInd->crnti);
+ ueCb->bsrRcvd = true;
/* store dataVolume per lcg in uecb */
for(lcgIdx = 0; lcgIdx < bsrInd->numLcg; lcgIdx++)
{
ueCb->bsrInfo[lcgIdx].priority = 1; //TODO: determining LCG priority?
ueCb->bsrInfo[lcgIdx].dataVol = bsrInd->dataVolInfo[lcgIdx].dataVol;
}
+
+ /* Adding UE Id to list of pending UEs to be scheduled */
+ addUeToBeScheduled(cellCb, ueCb->ueIdx);
return ROK;
}
if(uciInd->numSrBits)
{
ueCb->srRcvd = true;
+
+ /* Adding UE Id to list of pending UEs to be scheduled */
+ addUeToBeScheduled(cellCb, ueCb->ueIdx);
}
return ROK;
}
uint8_t pdcchUe; /*!< UE for which PDCCH is scheduled in this slot */
uint8_t pdschUe; /*!< UE for which PDSCH is scheduled in this slot */
RarAlloc *rarAlloc[MAX_NUM_UE]; /*!< RAR allocation per UE*/
+ DciInfo *ulGrant;
DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/
}SchDlSlotInfo;
SchUeState state;
SchCellCb *cellCb;
bool srRcvd;
+ bool bsrRcvd;
BsrInfo bsrInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
SchUlCb ulInfo;
SchDlCb dlInfo;
uint8_t schCalcPrachNumRb(SchCellCb *cell);
void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo prachOccasionTimingInfo);
uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti);
-uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo puschInfo, DciInfo *dciInfo);
-uint8_t schFillPuschAlloc(SchUeCb *ueCb, SlotTimingInfo pdcchSlotTime, uint32_t dataVol, SchPuschInfo *puschInfo);
+uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo *puschInfo, DciInfo *dciInfo);
+uint8_t schFillPuschAlloc(SchUeCb *ueCb, SlotTimingInfo puschTime, uint32_t dataVol, uint8_t k2, uint8_t startSymb, uint8_t symbLen);
uint8_t allocatePrbUl(SchCellCb *cell, SlotTimingInfo slotTime, uint8_t startSymbol, uint8_t symbolLength, \
uint16_t *startPrb, uint16_t numPrb);
+bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId);
/*Generic Functions*/
LcInfo* handleLcLList(CmLListCp *lcLL, uint8_t lcId, ActionTypeLcLL action);
cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
- cell->schUlSlotInfo[pucchTime.slot]->puschUe = ueId;
+ cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
cell->raCb[ueId-1].msg4recvd = FALSE;
return true;
}
+
+/*******************************************************************
+ *
+ * @brief sch Process pending Sr or Bsr Req
+ *
+ * @details
+ *
+ * Function : schProcessSrOrBsrReq
+ *
+ * Functionality:
+ * sch Process pending Sr or Bsr Req
+ *
+ * @params[in] SchCellCb *cell, SlotTimingInfo currTime
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ *******************************************************************/
+bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
+{
+ bool k2Found = FALSE;
+ uint8_t lcgIdx = 0;
+ uint8_t startSymb = 0, symbLen = 0;
+ uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
+ uint32_t totDataReq = 0; /* in bytes */
+ SchUeCb *ueCb;
+ SchPuschInfo *puschInfo;
+ DciInfo *dciInfo = NULLP;
+ SchK2TimingInfoTbl *k2InfoTbl=NULLP;
+ SlotTimingInfo dciTime, puschTime;
+
+ if(cell == NULL)
+ {
+ DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
+ return false;
+ }
+
+ ueCb = &cell->ueCb[ueId-1];
+
+ /* check for SR */
+ if(ueCb->srRcvd)
+ {
+ totDataReq = UL_GRANT_SIZE; /*fixing so that all control msgs can be handled in SR */
+ }
+ /* check for BSR */
+ if(ueCb->bsrRcvd == true)
+ {
+ for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
+ {
+ totDataReq+= ueCb->bsrInfo[lcgIdx].dataVol;
+ }
+ }
+
+ if(totDataReq > 0)
+ {
+ /* Calculating time frame to send DCI for SR */
+ ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
+#ifdef NR_TDD
+ if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
+#endif
+ {
+ if(ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
+ k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl;
+ else
+ k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
+
+ for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
+ {
+ k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
+
+ if(!ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
+ {
+ k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
+ startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
+ symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
+ }
+ else
+ {
+ k2Val = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
+ startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
+ symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
+ }
+
+ /* Calculating time frame to send PUSCH for SR */
+ ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val);
+#ifdef NR_TDD
+ if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
+ continue;
+#endif
+ if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
+ {
+ continue;
+ }
+ k2Found = true;
+ break;
+ }
+ }
+
+ if(k2Found == true)
+ {
+ SCH_ALLOC(dciInfo, sizeof(DciInfo));
+ if(!dciInfo)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
+ return false;
+ }
+ cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
+ memset(dciInfo,0,sizeof(DciInfo));
+
+ /* Update PUSCH allocation */
+ if(schFillPuschAlloc(ueCb, puschTime, totDataReq, k2Val, startSymb, symbLen) == ROK)
+ {
+ if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
+ {
+ puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
+ if(puschInfo != NULLP)
+ {
+ /* Fill DCI for UL grant */
+ schFillUlDci(ueCb, puschInfo, dciInfo);
+ memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
+ ueCb->srRcvd = false;
+ ueCb->bsrRcvd = false;
+ for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
+ {
+ ueCb->bsrInfo[lcgIdx].dataVol = 0;
+ }
+
+ cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
+ return true;
+ }
+ }
+ }
+ }
+ }
+ return false;
+}
/**********************************************************************
End of file
**********************************************************************/
ADD_DELTA_TO_TIME(slotInd, schSlotValue->broadcastTime, PHY_DELTA_DL + SCHED_DELTA);
ADD_DELTA_TO_TIME(slotInd, schSlotValue->rarTime, PHY_DELTA_DL + SCHED_DELTA);
ADD_DELTA_TO_TIME(slotInd, schSlotValue->dlMsgTime, PHY_DELTA_DL + SCHED_DELTA);
+ ADD_DELTA_TO_TIME(slotInd, schSlotValue->ulDciTime, PHY_DELTA_DL + SCHED_DELTA);
}
/*******************************************************************
* ****************************************************************/
uint8_t schProcessSlotInd(SlotTimingInfo *slotInd, Inst schInst)
{
- uint8_t ueId, ueIdx, lcgIdx, ret = ROK;
+ uint8_t ueId, ueIdx, ret = ROK;
uint16_t slot;
bool isRarPending = false, isRarScheduled = false;
bool isMsg4Pending = false, isMsg4Scheduled = false;
+ bool isUlGrantPending = false, isUlGrantScheduled = false;
+ bool isDlMsgPending = false, isDlMsgScheduled = false;
CmLList *pendingUeNode;
DlSchedInfo dlSchedInfo;
DlBrdcstAlloc *dlBrdcstAlloc = NULLP;
pendingUeNode = cell->ueToBeScheduled.first;
if(pendingUeNode)
{
- ueId = *(uint8_t *)(pendingUeNode->node);
-
- /* If RAR is pending for this UE, schedule PDCCH,PDSCH to send RAR and
- * PUSCH to receive MSG3 as per k0-k2 configuration*/
- if(cell->raReq[ueId-1] != NULLP)
+ if(pendingUeNode->node)
{
- isRarPending = true;
- isRarScheduled = schProcessRaReq(cell, *slotInd, ueId);
- }
+ ueId = *(uint8_t *)(pendingUeNode->node);
- /* If MSG4 is pending for this UE, schedule PDCCH,PDSCH to send MSG4 and
- * PUCCH to receive UL msg as per k0-k1 configuration */
- if(cell->raCb[ueId-1].msg4recvd)
- {
- isMsg4Pending = true;
- isMsg4Scheduled = schProcessMsg4Req(cell, *slotInd, ueId);
- }
+ /* If RAR is pending for this UE, schedule PDCCH,PDSCH to send RAR and
+ * PUSCH to receive MSG3 as per k0-k2 configuration*/
+ if(cell->raReq[ueId-1] != NULLP)
+ {
+ isRarPending = true;
+ isRarScheduled = schProcessRaReq(cell, *slotInd, ueId);
+ }
- if(isRarPending || isMsg4Pending)
- {
- /* If RAR or MSG is successfully scheduled then
- * remove UE from linked list since no pending msgs for this UE */
- if(isRarScheduled || isMsg4Scheduled)
+ /* If MSG4 is pending for this UE, schedule PDCCH,PDSCH to send MSG4 and
+ * PUCCH to receive UL msg as per k0-k1 configuration */
+ if(cell->raCb[ueId-1].msg4recvd)
{
- SCH_FREE(pendingUeNode->node, sizeof(uint8_t));
- deleteNodeFromLList(&cell->ueToBeScheduled, pendingUeNode);
+ isMsg4Pending = true;
+ isMsg4Scheduled = schProcessMsg4Req(cell, *slotInd, ueId);
+ }
+
+ if(isRarPending || isMsg4Pending)
+ {
+ /* If RAR or MSG is successfully scheduled then
+ * remove UE from linked list since no pending msgs for this UE */
+ if(isRarScheduled || isMsg4Scheduled)
+ {
+ SCH_FREE(pendingUeNode->node, sizeof(uint8_t));
+ deleteNodeFromLList(&cell->ueToBeScheduled, pendingUeNode);
+ }
+ /* If RAR/MSG4 is pending but couldnt be scheduled then,
+ * put this UE at the end of linked list to be scheduled later */
+ else
+ {
+ cmLListAdd2Tail(&cell->ueToBeScheduled, cmLListDelFrm(&cell->ueToBeScheduled, pendingUeNode));
+ }
+ }
+
+ if(cell->ueCb[ueId-1].srRcvd || cell->ueCb[ueId-1].bsrRcvd)
+ {
+ isUlGrantPending = true;
+ isUlGrantScheduled = schProcessSrOrBsrReq(cell, *slotInd, ueId);
+ }
+
+ if((cell->boIndBitMap) & (1<<ueId))
+ {
+ isDlMsgPending = true;
+ isDlMsgScheduled = schFillBoGrantDlSchedInfo(cell, *slotInd, ueId);
+ }
+ if(!isUlGrantPending && !isDlMsgPending)
+ {
+ /* No action required */
}
- /* If RAR/MSG4 is pending but couldnt be scheduled then,
- * put this UE at the end of linked list to be scheduled later */
- else
+ else if((isUlGrantPending && !isUlGrantScheduled) || (isDlMsgPending && !isDlMsgScheduled))
{
cmLListAdd2Tail(&cell->ueToBeScheduled, cmLListDelFrm(&cell->ueToBeScheduled, pendingUeNode));
}
- }
-
- if((cell->boIndBitMap) & (1<<ueId))
- {
- if(schFillBoGrantDlSchedInfo(cell, *slotInd, ueId) == true)
- {
- SCH_FREE(pendingUeNode->node, sizeof(uint8_t));
- deleteNodeFromLList(&cell->ueToBeScheduled, pendingUeNode);
- }
+ else
+ {
+ SCH_FREE(pendingUeNode->node, sizeof(uint8_t));
+ deleteNodeFromLList(&cell->ueToBeScheduled, pendingUeNode);
+ }
}
}
dlSchedInfo.rarAlloc[ueIdx] = cell->schDlSlotInfo[slot]->rarAlloc[ueIdx];
cell->schDlSlotInfo[slot]->rarAlloc[ueIdx] = NULLP;
}
-
+
/* If DL-Msg PDCCH/PDSCH is scheduled for a UE at this slot, fill
* specific interface structure to send to MAC */
if(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.dlMsgTime.slot]->dlMsgAlloc[ueIdx] != NULLP)
}
- /* Check if UL grant must be sent in this slot for a SR/BSR that had been received */
- for(ueIdx=0; ueIdx<cell->numActvUe; ueIdx++)
+ if(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.ulDciTime.slot]->ulGrant != NULLP)
{
- uint32_t totDataReq = 0; /* in bytes */
- DciInfo *dciInfo = NULLP;
- SchUeCb *ueCb = NULLP;
-
- ueCb = &cell->ueCb[ueIdx];
- /* check for SR */
- if(ueCb->srRcvd)
- {
- totDataReq = UL_GRANT_SIZE; /*fixing so that all control msgs can be handled in SR */
- ueCb->srRcvd = false;
- }
- /* check for BSR */
- for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
- {
- totDataReq+= ueCb->bsrInfo[lcgIdx].dataVol;
- ueCb->bsrInfo[lcgIdx].dataVol = 0;
- }
- if(totDataReq > 0) /* UL grant must be provided for this UE in this slot */
- {
- SchPuschInfo schPuschInfo;
- memset(&schPuschInfo, 0, sizeof(SchPuschInfo));
-
- SCH_ALLOC(dciInfo, sizeof(DciInfo));
- if(!dciInfo)
- {
- DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
- return RFAILED;
- }
- memset(dciInfo,0,sizeof(DciInfo));
-
- /* update the SFN and SLOT */
- memcpy(&dlSchedInfo.schSlotValue.ulDciTime, slotInd, sizeof(SlotTimingInfo));
-
- /* Update PUSCH allocation */
- schFillPuschAlloc(ueCb, dlSchedInfo.schSlotValue.ulDciTime, totDataReq, &schPuschInfo);
-
- /* Fill DCI for UL grant */
- schFillUlDci(ueCb, schPuschInfo, dciInfo);
- memcpy(&dciInfo->slotIndInfo, &dlSchedInfo.schSlotValue.ulDciTime, sizeof(SlotTimingInfo));
- dlSchedInfo.ulGrant = dciInfo;
- }
+ slot = dlSchedInfo.schSlotValue.ulDciTime.slot;
+ dlSchedInfo.ulGrant = cell->schDlSlotInfo[slot]->ulGrant;
+ cell->schDlSlotInfo[slot]->ulGrant = NULLP;
}
/* Send msg to MAC */
BuildK2InfoTable(ueCb->cellCb, ueCfg->spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList,\
ueCfg->spCellCfg.servCellCfg.initUlBwp.puschCfg.numTimeDomRsrcAlloc,\
NULLP, &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl);
+ ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt = true;
}
}
}
SET_ONE_BIT(ueCb->ueIdx, cellCb->actvUeBitMap);
ueCb->cellCb = cellCb;
ueCb->srRcvd = false;
+ ueCb->bsrRcvd = false;
for(lcIdx=0; lcIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcIdx++)
ueCb->bsrInfo[lcIdx].dataVol = 0;
* RFAILED - failure
*
* ****************************************************************/
-uint8_t schFillPuschAlloc(SchUeCb *ueCb, SlotTimingInfo pdcchSlotTime, uint32_t dataVol, SchPuschInfo *puschInfo)
+uint8_t schFillPuschAlloc(SchUeCb *ueCb, SlotTimingInfo puschTime, uint32_t dataVol, uint8_t k2, uint8_t startSymb, uint8_t symbLen)
{
uint16_t startRb = 0;
uint8_t numRb = 0;
uint16_t tbSize = 0;
uint8_t buffer = 5;
- uint8_t k2=0, startSymb=0 , symbLen=0;
SchCellCb *cellCb = ueCb->cellCb;
SchUlSlotInfo *schUlSlotInfo = NULLP;
- SlotTimingInfo puschTime;
+ SchPuschInfo puschInfo;
- /* TODO : Scheduler to decide on which slot PUSCH is to be scheduled based on K2 Index table */
- if(ueCb->ueCfg.spCellCfgPres == true)
- {
- k2 = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[0].k2;
- startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[0].startSymbol;
- symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[0].symbolLength;
- }
- ADD_DELTA_TO_TIME(pdcchSlotTime, puschTime, k2);
-
startRb = MAX_NUM_RB;
tbSize = schCalcTbSize(dataVol + buffer); /* 2 bytes header + some buffer */
numRb = schCalcNumPrb(tbSize, ueCb->ueCfg.ulModInfo.mcsIndex, symbLen);
allocatePrbUl(cellCb, puschTime, startSymb, symbLen, &startRb, numRb);
- puschInfo->crnti = ueCb->crnti;
- puschInfo->harqProcId = SCH_HARQ_PROC_ID;
- puschInfo->resAllocType = SCH_ALLOC_TYPE_1;
- puschInfo->fdAlloc.startPrb = startRb;
- puschInfo->fdAlloc.numPrb = numRb;
- puschInfo->tdAlloc.startSymb = startSymb;
- puschInfo->tdAlloc.numSymb = symbLen;
- puschInfo->tbInfo.qamOrder = ueCb->ueCfg.ulModInfo.modOrder;
- puschInfo->tbInfo.mcs = ueCb->ueCfg.ulModInfo.mcsIndex;
- puschInfo->tbInfo.mcsTable = ueCb->ueCfg.ulModInfo.mcsTable;
- puschInfo->tbInfo.ndi = 1; /* new transmission */
- puschInfo->tbInfo.rv = 0;
- puschInfo->tbInfo.tbSize = tbSize;
- puschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
- puschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
- puschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS;
+ puschInfo.crnti = ueCb->crnti;
+ puschInfo.harqProcId = SCH_HARQ_PROC_ID;
+ puschInfo.resAllocType = SCH_ALLOC_TYPE_1;
+ puschInfo.fdAlloc.startPrb = startRb;
+ puschInfo.fdAlloc.numPrb = numRb;
+ puschInfo.tdAlloc.startSymb = startSymb;
+ puschInfo.tdAlloc.numSymb = symbLen;
+ puschInfo.tbInfo.qamOrder = ueCb->ueCfg.ulModInfo.modOrder;
+ puschInfo.tbInfo.mcs = ueCb->ueCfg.ulModInfo.mcsIndex;
+ puschInfo.tbInfo.mcsTable = ueCb->ueCfg.ulModInfo.mcsTable;
+ puschInfo.tbInfo.ndi = 1; /* new transmission */
+ puschInfo.tbInfo.rv = 0;
+ puschInfo.tbInfo.tbSize = tbSize;
+ puschInfo.dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
+ puschInfo.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
+ puschInfo.dmrsAddPos = DMRS_ADDITIONAL_POS;
schUlSlotInfo = cellCb->schUlSlotInfo[puschTime.slot];
SCH_ALLOC(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
DU_LOG("\nERROR --> SCH: Memory allocation failed in schAllocMsg3Pusch");
return RFAILED;
}
- memcpy(schUlSlotInfo->schPuschInfo, puschInfo, sizeof(SchPuschInfo));
+ memcpy(schUlSlotInfo->schPuschInfo, &puschInfo, sizeof(SchPuschInfo));
return ROK;
}
* RFAILED - failure
*
* ****************************************************************/
-uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo puschInfo, DciInfo *dciInfo)
+uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo *puschInfo, DciInfo *dciInfo)
{
SchCellCb *cellCb = ueCb->cellCb;
SchControlRsrcSet coreset1 ;
/* fill bwp cfg */
dciInfo->bwpCfg.subcarrierSpacing = cellCb->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
dciInfo->bwpCfg.cyclicPrefix = cellCb->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
- dciInfo->bwpCfg.freqAlloc.startPrb = 0;
- dciInfo->bwpCfg.freqAlloc.numPrb = MAX_NUM_RB; /* whole of BW */
+ dciInfo->bwpCfg.freqAlloc.startPrb = cellCb->cellCfg.schInitialDlBwp.bwp.freqAlloc.startPrb;
+ dciInfo->bwpCfg.freqAlloc.numPrb = cellCb->cellCfg.schInitialDlBwp.bwp.freqAlloc.numPrb;
/*fill coreset cfg */
//Considering number of RBs in coreset1 is same as coreset0
dciInfo->formatType = FORMAT0_0;
/* fill UL grant */
- dciInfo->format.format0_0.resourceAllocType = puschInfo.resAllocType;
- dciInfo->format.format0_0.freqAlloc.startPrb = puschInfo.fdAlloc.startPrb;
- dciInfo->format.format0_0.freqAlloc.numPrb = puschInfo.fdAlloc.numPrb;
- dciInfo->format.format0_0.timeAlloc.startSymb = puschInfo.tdAlloc.startSymb;
- dciInfo->format.format0_0.timeAlloc.numSymb = puschInfo.tdAlloc.numSymb;
+ dciInfo->format.format0_0.resourceAllocType = puschInfo->resAllocType;
+ dciInfo->format.format0_0.freqAlloc.startPrb = puschInfo->fdAlloc.startPrb;
+ dciInfo->format.format0_0.freqAlloc.numPrb = puschInfo->fdAlloc.numPrb;
+ dciInfo->format.format0_0.timeAlloc.startSymb = puschInfo->tdAlloc.startSymb;
+ dciInfo->format.format0_0.timeAlloc.numSymb = puschInfo->tdAlloc.numSymb;
dciInfo->format.format0_0.rowIndex = 0; /* row Index */
- dciInfo->format.format0_0.mcs = puschInfo.tbInfo.mcs;
- dciInfo->format.format0_0.harqProcId = puschInfo.harqProcId;
+ dciInfo->format.format0_0.mcs = puschInfo->tbInfo.mcs;
+ dciInfo->format.format0_0.harqProcId = puschInfo->harqProcId;
dciInfo->format.format0_0.puschHopFlag = FALSE; /* disabled */
dciInfo->format.format0_0.freqHopFlag = FALSE; /* disabled */
- dciInfo->format.format0_0.ndi = puschInfo.tbInfo.ndi; /* new transmission */
- dciInfo->format.format0_0.rv = puschInfo.tbInfo.rv;
+ dciInfo->format.format0_0.ndi = puschInfo->tbInfo.ndi; /* new transmission */
+ dciInfo->format.format0_0.rv = puschInfo->tbInfo.rv;
dciInfo->format.format0_0.tpcCmd = 0; //Sphoorthi TODO: check
dciInfo->format.format0_0.sUlCfgd = FALSE; /* SUL not configured */
dciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0] = 0;
dciInfo->dciInfo.txPdcchPower.powerValue = 0;
dciInfo->dciInfo.txPdcchPower.powerControlOffsetSS = 0;
- dciInfo->dciInfo.pdschCfg = NULLP; /* No DL data being sent */
+ dciInfo->dciInfo.pdschCfg = NULL; /* No DL data being sent */
return ROK;
}
{
ueCb->cellCb = cellCb;
ueCb->srRcvd = false;
+ ueCb->bsrRcvd = false;
for(lcIdx=0; lcIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcIdx++)
ueCb->bsrInfo[lcIdx].dataVol = 0;
SchPucchCfg pucchCfg;
bool puschCfgPres;
SchPuschCfg puschCfg;
+ bool k2TblPrsnt;
SchK2TimingInfoTbl k2InfoTbl;
}SchInitialUlBwp;
#define PDSCH_MAPPING_TYPE_B 1
/* MACRO Define for PUSCH Configuration */
-#define PUSCH_K2_CFG1 3
-#define PUSCH_K2_CFG2 4
+#define PUSCH_K2_CFG1 1
+#define PUSCH_K2_CFG2 2
#define PUSCH_MSG3_DELTA_PREAMBLE 0
#define PUSCH_P0_NOMINAL_WITH_GRANT -70
/* MACRO Define for PUSCH Configuration */
#define MAX_UL_ALLOC 16
-#define PUSCH_K2_CFG1 3
-#define PUSCH_K2_CFG2 4
+#define PUSCH_K2_CFG1 4
+#define PUSCH_K2_CFG2 5
#define PUSCH_START_SYMBOL 3
#define PUSCH_LENGTH_SYMBOL 11
Code Review / o-du / l2.git / commitdiff