$cd l2/build/yang
$sysrepoctl -i o-ran-sc-odu-alarm-v1.yang
$sysrepoctl -i o-ran-sc-odu-interface-v1.yang
+ $sysrepoctl -i o-ran-sc-du-hello-world.yang
4. Configure the startup IP and Port configurations for DU, CU and RIC
$cd l2/build/config
- Open the netconfConfig.xml and edit the desired MAC address, IP, Port, Username and Password for VES PNF Registration.
+ Open the netconfConfig.json and edit the desired MAC address, IP, Port, Username and Password for VES PNF Registration.
6. Configure the VES server details to send VES Events
$cd l2/build/config
- Open the vesConfig.xml and edit the desired IP, Port, Username and Password to send VES Event.
+ Open the vesConfig.json and edit the desired IP, Port, Username and Password to send VES Event.
+
+ 7. Configure the nacm module to provide access to new user
+
+ $cd l2/build/config
+
+ Open the nacm_config.xml and edit the desired user-name to provide the access to that user.
+
+ $sysrepocfg --import=nacm_config.xml --datastore running --module ietf-netconf-acm
+
D. How to Clean and Build:
--------------------------
-1. Building ODU binary:
+1. Build commands:
+ a. odu - Builds all components of ODU
+ b. cu_stub - Builds all CU Stub
+ c. ric_stub - Builds all RIC_Stub
+ d. clean_odu - clean up ODU
+ e. clean_cu - clean up CU Stub
+ f. clean_ric - clean up RIC Stub
+ g. clean_all - cleanup everything
+ h. options:
+ i. MACHINE=BIT64/BIT32 - Specify underlying machine type. Default is BIT32
+ ii. NODE=TEST_STUB - Specify if it is a test node. Mandatory for cu_stub/ric_stub. Must not be used for odu
+ iii. MODE=FDD/TDD - Specify duplex mode. Default is FDD
+ iv. PHY=INTEL_L1 - Specify type of phy. If not specified, PHY stub is used
+ v. PHY_MODE=TIMER - Specify mode of phy. Used only if PHY=INTEL_L1. Default is radio mode
+ vi. O1_ENABLE=YES - Specify if O1 interface is enabled. If not specified, it is disabled
+
+2. Building ODU binary:
a. Build folder
cd l2/build/odu
b. Building ODU binary
- make odu MACHINE=BIT64 MODE=FDD
+ make odu MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
c. Cleaning ODU binary
- make clean_odu MACHINE=BIT64 MODE=FDD
+ make clean_odu MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
-2. Building CU Stub binary:
+3. Building CU Stub binary:
a. Build folder
cd l2/build/odu
b. Building CU Stub binary
- make cu_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD
+ make cu_stub NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
c. Cleaning CU Stub binary
- make clean_cu NODE=TEST_STUB MACHINE=BIT64 MODE=FDD
+ make clean_cu NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
-3. Building RIC Stub binary:
+4. Building RIC Stub binary:
a. Build folder
cd l2/build/odu
b. Building RIC Stub binary
- make ric_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD
+ make ric_stub NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
c. Cleaning RIC Stub binary
- make clean_ric NODE=TEST_STUB MACHINE=BIT64 MODE=FDD
+ make clean_ric NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
-4. Cleaning ODU, CU Stub and RIC Stub:
+5. Cleaning ODU, CU Stub and RIC Stub:
make clean_all
a. Build folder
cd l2/build/odu
b. Building ODU binary
- make odu MACHINE=BIT64 MODE=FDD O1_ENABLE=YES
+ make odu MACHINE=<refer section D.1.h> MODE=<refer section D.1.h> O1_ENABLE=<refer section D.1.h>
c. Cleaning ODU binary
- make clean_odu MACHINE=BIT64 MODE=FDD O1_ENABLE=YES
+ make clean_odu MACHINE=<refer section D.1.h> MODE=<refer section D.1.h> O1_ENABLE=<refer section D.1.h>
2. Building CU Stub binary:
a. Build folder
cd l2/build/odu
b. Building CU Stub binary
- make cu_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES
+ make cu_stub NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h> O1_ENABLE=<refer section D.1.h>
c. Cleaning CU Stub binary
- make clean_cu NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES
+ make clean_cu NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h> O1_ENABLE=<refer section D.1.h>
3. Building RIC Stub binary:
a. Build folder
cd l2/build/odu
b. Building RIC Stub binary
- make ric_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES
+ make ric_stub NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h> O1_ENABLE=<refer section D.1.h>
c. Cleaning RIC Stub binary
- make clean_ric NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES
+ make clean_ric NODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h> O1_ENABLE=<refer section D.1.h>
4. Cleaning ODU, CU Stub and RIC Stub:
make clean_all
c. Build folder
cd l2/build/odu
d. Build ODU Binary:
- make odu PHY=INTEL_L1 PHY_MODE=TIMER MACHINE=BIT64 MODE=FDD
+ make odu PHY=<refer section D.1.h> PHY_MODE=<refer section D.1.h> MACHINE=<refer section D.1.h> MODE=<refer section D.1.h>
2. Build CU Stub and RIC Stub:
- a. Execute steps in sections D.2 and D.3.
+ a. Execute steps in sections D.3 and D.4
II. Execution
- 1. Execute L1:
+ 1. Refer to below link for assumptions, dependencies, pre-requisites etc for ODU-Low execution
+ https://docs.o-ran-sc.org/projects/o-ran-sc-o-du-phy/en/latest/
+
+ 2. Execute L1:
a. Setup environment:
cd <intel_directory>/phy/
source ./setupenv.sh
b. Run L1 binary :
cd <intel_directory>/FlexRAN/l1/bin/nr5g/gnb/l1
- To run in timer mode : ./l1.sh -e
+ To run
+ i. In timer mode : ./l1.sh -e
+ ii. In radio mode : ./l1.sh -xran
L1 is up when console prints follow:
Non BBU threads in application
PHY>welcome to application console
- 2. Execute FAPI Translator:
+ 3. Execute FAPI Translator:
a. Setup environment:
cd <intel_directory>/phy/
source ./setupenv.sh
cd <intel_directory>/phy/fapi_5g/bin/
./oran_5g_fapi --cfg=oran_5g_fapi.cfg
- 3. Execute CU Stub and RIC Stub:
+ 4. Execute CU Stub and RIC Stub:
a. Run steps in sections E.1-E.3
- 4. Execute DU:
+ 5. Execute DU:
a. DU execution folder
cd l2/bin/odu
b. Export WLS library path
#ifdef O1_ENABLE
#include "AlarmInterface.h"
+ #include "ConfigInterface.h"
#endif
for(idx=0; idx< DEFAULT_CELLS; idx++)
{
DuCellCb *cell = NULLP;
- DU_ALLOC(cell, sizeof(DuCellCb))
+ DU_ALLOC(cell, sizeof(DuCellCb));
if(cell == NULLP)
{
- DU_LOG("\nERROR --> DU_APP : Memory Allocation failed in duProcCfgComplete");
- ret = RFAILED;
+ DU_LOG("\nERROR --> DU_APP : Memory Allocation failed in duProcCfgComplete");
+ ret = RFAILED;
}
else
{
- uint8_t idx1=0;
- memset(cell, 0, sizeof(DuCellCb));
- cell->cellId = ++cellId;
- memset(&cell->cellInfo.nrEcgi.plmn, 0, sizeof(Plmn));
- cell->cellInfo.nrEcgi.plmn.mcc[0] = PLMN_MCC0;
- cell->cellInfo.nrEcgi.plmn.mcc[1] = PLMN_MCC1;
- cell->cellInfo.nrEcgi.plmn.mcc[2] = PLMN_MCC2;
- cell->cellInfo.nrEcgi.plmn.mnc[0] = PLMN_MNC0;
- cell->cellInfo.nrEcgi.plmn.mnc[1] = PLMN_MNC1;
- cell->cellInfo.nrEcgi.cellId = NR_CELL_ID;
- cell->cellInfo.nrPci = NR_PCI;
- cell->cellInfo.fiveGsTac = DU_TAC;
- memset(&cell->cellInfo.plmn[idx1], 0, sizeof(Plmn));
- for(idx1=0; idx1<MAX_PLMN; idx1++)
- {
- cell->cellInfo.plmn[idx1].mcc[0] = PLMN_MCC0;
- cell->cellInfo.plmn[idx1].mcc[1] = PLMN_MCC1;
- cell->cellInfo.plmn[idx1].mcc[2] = PLMN_MCC2;
- cell->cellInfo.plmn[idx1].mnc[0] = PLMN_MNC0;
- cell->cellInfo.plmn[idx1].mnc[1] = PLMN_MNC1;
- }
- cell->cellInfo.maxUe = duCfgParam.maxUe;
- cell->cellStatus = CELL_OUT_OF_SERVICE;
-
- duCb.cfgCellLst[duCb.numCfgCells] = cell;
- duCb.numCfgCells++;
+ uint8_t idx1=0;
+ memset(cell, 0, sizeof(DuCellCb));
+ cell->cellId = ++cellId;
+ memset(&cell->cellInfo.nrEcgi.plmn, 0, sizeof(Plmn));
+ cell->cellInfo.nrEcgi.plmn.mcc[0] = PLMN_MCC0;
+ cell->cellInfo.nrEcgi.plmn.mcc[1] = PLMN_MCC1;
+ cell->cellInfo.nrEcgi.plmn.mcc[2] = PLMN_MCC2;
+ cell->cellInfo.nrEcgi.plmn.mnc[0] = PLMN_MNC0;
+ cell->cellInfo.nrEcgi.plmn.mnc[1] = PLMN_MNC1;
+ cell->cellInfo.nrEcgi.cellId = NR_CELL_ID;
+ cell->cellInfo.nrPci = NR_PCI;
+ cell->cellInfo.fiveGsTac = DU_TAC;
+ memset(&cell->cellInfo.plmn[idx1], 0, sizeof(Plmn));
+ for(idx1=0; idx1<MAX_PLMN; idx1++)
+ {
+ cell->cellInfo.plmn[idx1].mcc[0] = PLMN_MCC0;
+ cell->cellInfo.plmn[idx1].mcc[1] = PLMN_MCC1;
+ cell->cellInfo.plmn[idx1].mcc[2] = PLMN_MCC2;
+ cell->cellInfo.plmn[idx1].mnc[0] = PLMN_MNC0;
+ cell->cellInfo.plmn[idx1].mnc[1] = PLMN_MNC1;
+ }
+ cell->cellInfo.maxUe = duCfgParam.maxUe;
+ cell->cellStatus = CELL_OUT_OF_SERVICE;
+ gCellStatus = CELL_DOWN;
+
+ duCb.cfgCellLst[duCb.numCfgCells] = cell;
+ duCb.numCfgCells++;
}
}
if(ret != RFAILED)
* RFAILED - failure
*
* ****************************************************************/
-uint8_t duBuildAndSendMacCellStop()
+uint8_t duBuildAndSendMacCellStop(uint16_t cellId)
{
Pst pst;
- OduCellId *cellId = NULL;
-
+ uint16_t cellIdx=0;
+ OduCellId *oduCellId = NULL;
+
DU_LOG("\nINFO --> DU APP : Building and Sending cell stop request to MAC");
- /* Send Cell Stop Request to MAC */
- DU_ALLOC_SHRABL_BUF(cellId, sizeof(OduCellId));
- if(!cellId)
+ GET_CELL_IDX(cellId, cellIdx);
+ if(duCb.actvCellLst[cellIdx] != NULLP)
{
- DU_LOG("\nERROR --> DU APP : Memory alloc failed while building cell stop request");
- return RFAILED;
- }
- cellId->cellId = duCb.actvCellLst[0]->cellId;
+ /* Send Cell Stop Request to MAC */
+ DU_ALLOC_SHRABL_BUF(oduCellId, sizeof(OduCellId));
+ if(!oduCellId)
+ {
+ DU_LOG("\nERROR --> DU APP : duBuildAndSendMacCellStop(): Memory allocation failed ");
+ return RFAILED;
+ }
- /* Fill Pst */
- FILL_PST_DUAPP_TO_MAC(pst, EVENT_MAC_CELL_STOP);
+ oduCellId->cellId = duCb.actvCellLst[cellIdx]->cellId;
+
+ /* Fill Pst */
+ FILL_PST_DUAPP_TO_MAC(pst, EVENT_MAC_CELL_STOP);
- return (*packMacCellStopOpts[pst.selector])(&pst, cellId);
+ return (*packMacCellStopOpts[pst.selector])(&pst, oduCellId);
+ }
+ else
+ {
+ DU_LOG("\nERROR --> DU APP : duBuildAndSendMacCellStop(): cellId[%d] doesnot exists", cellId);
+ return RFAILED;
+ }
+ return ROK;
}
/*******************************************************************
#ifdef O1_ENABLE
DU_LOG("\nINFO --> DU APP : Raise cell down alarm for cell id=%d", cellId->cellId);
raiseCellAlrm(CELL_DOWN_ALARM_ID, cellId->cellId);
+ setCellOpState(cellId->cellId, DISABLED, INACTIVE);
#endif
}
Code Review / o-du / l2.git / commitdiff