--- /dev/null
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+
+# This is makefile for FAPI Convergence Layer
+
+include ../common/rsys_fancy.mak
+include ../common/env.mak
+COLOR=$(COLOR_RED)
+
+SRC_DIR=$(ROOT_DIR)/src/fapi_cl/
+C_SRCS=$(wildcard $(SRC_DIR)/*.c)
+C_OBJS=$(patsubst $(SRC_DIR)/%.c,$(OBJ_DIR)/%.o,$(C_SRCS))
+
+# prepare the list of common header files
+HDR_FILES+=$(wildcard $(CM_DIR)/env*.[hx])
+HDR_FILES+=$(wildcard $(CM_DIR)/gen*.[hx])
+HDR_FILES+=$(wildcard $(CM_DIR)/ssi*.[hx])
+HDR_FILES+=$(wildcard $(CM_DIR)/cm*.[hx])
+
+
+lib: $(LIB_DIR)/libfapicl.a
+include $(COM_BUILD_DIR)/compile.mak
+
+I_OPTS+=-I$(ROOT_DIR)/src/mt
+I_OPTS+=-I$(ROOT_DIR)/src/5gnrmac
+I_OPTS+=-I$(ROOT_DIR)/src/intel_fapi
+
+
+#-------------------------------------------------------------#
+#Linker macros
+#-------------------------------------------------------------#
+$(LIB_DIR)/libfapicl.a:$(C_OBJS)
+ @echo -e "Creating Archive $(COLOR) $@ $(REVERT_COLOR)"
+ $(Q)ar -cr $(LIB_DIR)/libfapicl.a $(C_OBJS)
+
+#-------------------------------------------------------------#
+#Clean macros
+#-------------------------------------------------------------#
+clean:
+ @echo $(OAM_ENABLE)
+ @echo -e "$(COLOR_RED)Cleaning FAPI CL$(REVERT_COLOR)"
+ @echo $(SRC_DIR) $(CM_DIR)
+ $(Q)\rm -f $(LIB_DIR)/libfapicl.a $(C_OBJS)
+
+#**********************************************************************
+# End of file
+#**********************************************************************
ifeq ($(MODE),TDD)
PLTFRM_FLAGS += -DNR_TDD
endif
+
ifeq ($(CA_ENABLE),YES)
PLTFRM_FLAGS += -DCA_ENABLE=YES
endif
ifeq ($(NODE),TEST_STUB)
PLTFRM_FLAGS+=-DODU_TEST_STUB
endif
+
ifeq ($(PHY), INTEL_L1)
PLTFRM_FLAGS+=-DSS_USE_WLS_MEM -DINTEL_WLS_MEM -DDEBUG_MODE -DINTEL_L1_V20_03_ONWARDS
ifeq ($(PHY_MODE),TIMER)
endif
endif
+ifeq ($(PHY), UE_SIM)
+ PLTFRM_FLAGS+=-DUE_SIM_TEST -DFAPI_222_10_03
+endif
+
ifeq ($(O1_ENABLE),YES)
PLTFRM_FLAGS+=-DO1_ENABLE
endif
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/mac.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/sch.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/mt.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
-
+
+ifneq ($(PHY), UE_SIM)
ifneq ($(PHY), INTEL_L1)
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/phy_stub.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
endif
+else
+ $(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/fapi_cl.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
+endif
+
ifeq ($(O1_ENABLE),YES)
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/o1.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CCPP1)'
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/ves.mak OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CCPP1)'
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/sch.mak clean OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/mt.mak clean OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
+ifneq ($(PHY), UE_SIM)
ifneq ($(PHY), INTEL_L1)
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/phy_stub.mak clean OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
endif
+else
+ $(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/fapi_cl.mak clean OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CC1)'
+endif
+
ifeq ($(O1_ENABLE),YES)
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/o1.mak clean OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CCPP1)'
$(Q)$(MAKE) -j -f $(COM_BUILD_DIR)/ves.mak clean OBJ_DIR=$(OBJ_ROOT)/odu LIB_DIR=$(LIB_ROOT)/odu LOG_DIR=$(LOG_ROOT)/odu CC='$(CCPP1)'
#ifndef INTEL_WLS_MEM\r
#include "lwr_mac_phy_stub_inf.h"\r
#endif\r
+#ifdef UE_SIM_TEST\r
+#include "lwr_mac_fapi_cl_inf.h"\r
+#endif\r
\r
/**************************************************************************\r
* @brief Task Initiation callback function. \r
}\r
#endif\r
\r
+#ifdef UE_SIM_TEST\r
+ case ENTFAPICL:\r
+ {\r
+ switch(pst->event)\r
+ {\r
+ case EVT_FAPI_CL_SLOT_IND:\r
+ {\r
+ fapi_slot_ind_t *slotIndMsg;\r
+\r
+ CMCHKUNPK(oduUnpackPointer, (PTR *)&slotIndMsg, mBuf);\r
+ ODU_PUT_MSG_BUF(mBuf);\r
+\r
+ procPhyMessages(slotIndMsg->header.msg_id, sizeof(fapi_slot_ind_t), (void*)slotIndMsg);\r
+ MAC_FREE_SHRABL_BUF(pst->region, pst->pool, slotIndMsg, sizeof(fapi_slot_ind_t));\r
+ break;\r
+ }\r
+\r
+ case EVT_FAPI_CL_STOP_IND:\r
+ {\r
+ fapi_stop_ind_t *stopIndMsg;\r
+ CMCHKUNPK(oduUnpackPointer, (PTR *)&stopIndMsg, mBuf);\r
+ ODU_PUT_MSG_BUF(mBuf);\r
+\r
+ procPhyMessages(stopIndMsg->header.msg_id, sizeof(fapi_stop_ind_t), (void*)stopIndMsg);\r
+ MAC_FREE_SHRABL_BUF(pst->region, pst->pool, stopIndMsg, sizeof(fapi_stop_ind_t));\r
+ break;\r
+ }\r
+\r
+ default:\r
+ {\r
+ DU_LOG("\nERROR --> LWR_MAC: Invalid event %d received from PHY STUB", pst->event);\r
+ }\r
+ }\r
+ break;\r
+ }\r
+#endif\r
+\r
default:\r
{\r
ODU_PUT_MSG_BUF(mBuf);\r
sizeof(fapi_msg_header_t));
msgHeader = (fapi_msg_header_t *)(headerElem + 1);
msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
- msgHeader->handle = 0;
+ msgHeader->handle = macCfgParams.cellId;
DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
LwrMacSendToL1(headerElem);
configRsp = (fapi_config_resp_t *)msg;
DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
- lwrMacCb.phyState);
+ lwrMacCb.phyState);
if(configRsp != NULL)
{
if(configRsp->error_code == MSG_OK)
{
- DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
- lwrMacCb.phyState = PHY_STATE_CONFIGURED;
- lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
- /* TODO :
- * Store config response into an intermediate struture and send to MAC
- * Support LC and LWLC for sending config rsp to MAC
- */
- fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
+ DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
+ lwrMacCb.phyState = PHY_STATE_CONFIGURED;
+ lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
+ /* TODO :
+ * Store config response into an intermediate struture and send to MAC
+ * Support LC and LWLC for sending config rsp to MAC
+ */
+ fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
}
else
{
- DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
- return RFAILED;
+ DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
+ return RFAILED;
}
}
else
sizeof(fapi_msg_header_t));
msgHeader = (fapi_msg_header_t *)(headerElem + 1);
msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
- msgHeader->handle = 0;
+ msgHeader->handle = ((OduCellId *)msg)->cellId;
/* Send to PHY */
DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 16;
- dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
+ dlDciPtr->rnti = 100; //rarPdcchInfo->dci.rnti; //17017; //rarPdcchInfo->dci.rnti;;
dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
#ifdef INTEL_WLS_MEM
addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
-#else
+#elif (!defined(UE_SIM_TEST))
LWR_MAC_FREE(sib1Payload, payloadSize);
#endif
#ifdef INTEL_WLS_MEM
addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
-#else
+#elif (!defined(UE_SIM_TEST))
LWR_MAC_FREE(pagePayload, payloadSize);
#endif
#ifdef INTEL_WLS_MEM
addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
-#else
+#elif (!defined(UE_SIM_TEST))
LWR_MAC_FREE(rarPayload, payloadSize);
#endif
return ROK;
#ifdef INTEL_WLS_MEM
addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
-#else
+#elif (!defined(UE_SIM_TEST))
LWR_MAC_FREE(dlMsgPayload, payloadSize);
#endif
return ROK;
sizeof(fapi_msg_header_t));
msgHeader = (fapi_msg_header_t *)(headerElem + 1);
msgHeader->num_msg = 2;
- msgHeader->handle = 0;
+ msgHeader->handle = macCellCfg.cellId;
/* Fill Dl TTI Request */
dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
pduIndex);
- numPduEncoded++;
+ //dlTtiReq->pdus[numPduEncoded].pdu.pdsch_pdu.rnti = 17017;
+ dlTtiReq->pdus[numPduEncoded].pdu.pdsch_pdu.rnti = 100;
+ numPduEncoded++;
pduIndex++;
DU_LOG("\033[1;32m");
ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pusch and access here */
- ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
+ ulTtiReqPdu->pdu.pusch_pdu.handle = macCellCfg->cellId;
ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pucch and access here */
- ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
+ ulTtiReqPdu->pdu.pucch_pdu.handle = macCellCfg->cellId;
ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
{
pduIdx++;
fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
+ DU_LOG("\nDEBUG --> LWR_MAC: PRACH PDU");
ulTtiReq->rachPresent++;
}
{
pduIdx++;
fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
+ DU_LOG("\nDEBUG --> LWR_MAC: PUSCH PDU");
ulTtiReq->nUlsch++;
}
/* Fill PUCCH PDU */
{
pduIdx++;
fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
+ DU_LOG("\nDEBUG --> LWR_MAC: PUCCH PDU");
ulTtiReq->nUlcch++;
}
}
crcIndInfo->harqId = fapiCrcInd->crc[crcInfoIdx].harqId;
crcIndInfo->tbCrcStatus = fapiCrcInd->crc[crcInfoIdx].tbCrcStatus;
crcIndInfo->numCb = fapiCrcInd->crc[crcInfoIdx].numCb;
- for(crcStatusIdx = 0; crcStatusIdx < crcIndInfo->numCb; crcStatusIdx++)
+ for(crcStatusIdx = 0; crcStatusIdx < ceil(crcIndInfo->numCb/8); crcStatusIdx++)
{
- crcIndInfo->cbCrcStatus[crcStatusIdx] = \
- fapiCrcInd->crc[crcInfoIdx].cbCrcStatus[crcStatusIdx];
+ crcIndInfo->cbCrcStatus[crcStatusIdx] = \
+ fapiCrcInd->crc[crcInfoIdx].cbCrcStatus[crcStatusIdx];
}
crcIndInfo->ul_cqi = fapiCrcInd->crc[crcInfoIdx].ul_cqi;
crcIndInfo->timingAdvance = fapiCrcInd->crc[crcInfoIdx].timingAdvance;
uint8_t rgClHndlCfgReq ARGS((void *msg));
void l1ProcessFapiRequest ARGS((uint8_t msgType, uint32_t msgLen, void *msg));
+void fapiClProcessFapiMsg(void *msg);
#ifdef INTEL_WLS_MEM
{
while(true)
{
- numMsgToGet = WLS_Wait(wlsHdlr);
- if(numMsgToGet == 0)
- {
- continue;
- }
+ numMsgToGet = WLS_Wait(wlsHdlr);
+ if(numMsgToGet == 0)
+ {
+ continue;
+ }
- while(numMsgToGet--)
- {
- currElem = NULLP;
- l1Msg = (uint64_t)NULLP;
- l1MsgPtr = NULLP;
- l1Msg = WLS_Get(wlsHdlr, &msgSize, &msgType, &flag);
- if(l1Msg)
- {
- l1MsgPtr = WLS_PA2VA(wlsHdlr, l1Msg);
- currElem = (p_fapi_api_queue_elem_t) l1MsgPtr;
- if(currElem->msg_type != FAPI_VENDOR_MSG_HEADER_IND)
- {
- procPhyMessages(currElem->msg_type, 0, (void *)(currElem + 1));
- }
- WLS_MEM_FREE(currElem, LWR_MAC_WLS_BUF_SIZE);
- }
- }
- LwrMacEnqueueWlsBlock();
+ while(numMsgToGet--)
+ {
+ currElem = NULLP;
+ l1Msg = (uint64_t)NULLP;
+ l1MsgPtr = NULLP;
+ l1Msg = WLS_Get(wlsHdlr, &msgSize, &msgType, &flag);
+ if(l1Msg)
+ {
+ l1MsgPtr = WLS_PA2VA(wlsHdlr, l1Msg);
+ currElem = (p_fapi_api_queue_elem_t) l1MsgPtr;
+ if(currElem->msg_type != FAPI_VENDOR_MSG_HEADER_IND)
+ {
+ procPhyMessages(currElem->msg_type, 0, (void *)(currElem + 1));
+ }
+ WLS_MEM_FREE(currElem, LWR_MAC_WLS_BUF_SIZE);
+ }
+ }
+ LwrMacEnqueueWlsBlock();
}
}
#endif
addWlsBlockToFree(currMsg, msgLen, (lwrMacCb.phySlotIndCntr-1));
if(currMsg->p_next == NULLP)
{
- DU_LOG("\nERROR --> LWR MAC : There cannot be only one block to send");
- return RFAILED;
+ DU_LOG("\nERROR --> LWR MAC : There cannot be only one block to send");
+ return RFAILED;
}
/* Sending first block */
ret = WLS_Put(wlsHdlr, WLS_VA2PA(wlsHdlr, currMsg), msgLen, currMsg->msg_type, WLS_SG_FIRST);
if(ret != 0)
{
- DU_LOG("\nERROR --> LWR MAC : Failure in sending message to PHY");
- return RFAILED;
+ DU_LOG("\nERROR --> LWR MAC : Failure in sending message to PHY");
+ return RFAILED;
}
currMsg = currMsg->p_next;
while(currMsg)
{
- /* Sending the next msg */
- msgLen = currMsg->msg_len + sizeof(fapi_api_queue_elem_t);
- addWlsBlockToFree(currMsg, msgLen, (lwrMacCb.phySlotIndCntr-1));
- if(currMsg->p_next != NULLP)
- {
- ret = WLS_Put(wlsHdlr, WLS_VA2PA(wlsHdlr, currMsg), msgLen, currMsg->msg_type, WLS_SG_NEXT);
- if(ret != 0)
- {
- DU_LOG("\nERROR --> LWR MAC : Failure in sending message to PHY");
- return RFAILED;
- }
- currMsg = currMsg->p_next;
- }
- else
- {
- /* Sending last msg */
- ret = WLS_Put(wlsHdlr, WLS_VA2PA(wlsHdlr, currMsg), msgLen, currMsg->msg_type, WLS_SG_LAST);
- if(ret != 0)
- {
- DU_LOG("\nERROR --> LWR MAC : Failure in sending message to PHY");
- return RFAILED;
- }
- currMsg = NULLP;
- }
+ /* Sending the next msg */
+ msgLen = currMsg->msg_len + sizeof(fapi_api_queue_elem_t);
+ addWlsBlockToFree(currMsg, msgLen, (lwrMacCb.phySlotIndCntr-1));
+ if(currMsg->p_next != NULLP)
+ {
+ ret = WLS_Put(wlsHdlr, WLS_VA2PA(wlsHdlr, currMsg), msgLen, currMsg->msg_type, WLS_SG_NEXT);
+ if(ret != 0)
+ {
+ DU_LOG("\nERROR --> LWR MAC : Failure in sending message to PHY");
+ return RFAILED;
+ }
+ currMsg = currMsg->p_next;
+ }
+ else
+ {
+ /* Sending last msg */
+ ret = WLS_Put(wlsHdlr, WLS_VA2PA(wlsHdlr, currMsg), msgLen, currMsg->msg_type, WLS_SG_LAST);
+ if(ret != 0)
+ {
+ DU_LOG("\nERROR --> LWR MAC : Failure in sending message to PHY");
+ return RFAILED;
+ }
+ currMsg = NULLP;
+ }
}
}
-#else
+#elif !defined(UE_SIM_TEST)
p_fapi_api_queue_elem_t nextMsg = NULLP;
/* FAPI header and vendor specific msgs are freed here. Only
nextMsg = currMsg->p_next;
msgLen = currMsg->msg_len + sizeof(fapi_api_queue_elem_t);
if((currMsg->msg_type != FAPI_VENDOR_MSG_HEADER_IND) && \
- (currMsg->msg_type != FAPI_VENDOR_MESSAGE))
+ (currMsg->msg_type != FAPI_VENDOR_MESSAGE))
{
- l1ProcessFapiRequest(currMsg->msg_type, msgLen, currMsg);
+ l1ProcessFapiRequest(currMsg->msg_type, msgLen, currMsg);
}
else
{
- LWR_MAC_FREE(currMsg, msgLen);
+ LWR_MAC_FREE(currMsg, msgLen);
}
currMsg = nextMsg;
}
+#else
+ fapiClProcessMac2UeSimFapiMsg(msg);
#endif
#endif
return ret;
#define SI_RNTI 0xFFFF
#define P_RNTI 0xFFFE
-#define MAC_LCID_CCCH 0
+#define MAC_LCID_DL_CCCH 0
+#define MAC_LCID_UL_CCCH_64BIT 0
#define MAC_LCID_MIN 1
#define MAC_LCID_MAX 32
#define MAC_LCID_RESERVED_MIN 33
#define MAC_LCID_RESERVED_MAX 51
-#define MAC_LCID_CCCH_48BIT 52
+#define MAC_LCID_UL_CCCH_48BIT 52
#define MAC_LCID_BIT_RATE_QUERY 53
#define MAC_LCID_MULT_PHR_FOUR_OCT 54
#define MAC_LCID_CFG_GRANT_CFM 55
pdu = NULLP;
switch(lcId)
{
- case MAC_LCID_CCCH :
- {
- pduLen--;
-
- /* for UL CCCH,fixed length of MAC SDU */
- length = 6;
-
- /* Allocating sharable memory to send ul ccch msg to du app*/
- MAC_ALLOC_SHRABL_BUF(pdu, length);
- if(!pdu)
- {
- DU_LOG("\nERROR --> MAC : UL CCCH PDU memory allocation failed");
- return RFAILED;
- }
- rxPduIdx++;
- memcpy(pdu, &rxDataPdu[rxPduIdx], length);
- pduLen -= length;
- rxPduIdx = rxPduIdx + length;
-
- /* store msg3 pdu in macRaCb for CRI value */
- memcpy(macCb.macCell[cellIdx]->macRaCb[ueIdx].msg3Pdu, pdu, length);
-
- /* Send UL-CCCH Indication to DU APP */
- ret = macProcUlCcchInd(macCb.macCell[cellIdx]->cellId, rxDataIndPdu->rnti, length, pdu);
- break;
- }
+ case MAC_LCID_UL_CCCH_64BIT :
+ break;
case MAC_LCID_MIN ... MAC_LCID_MAX :
{
case MAC_LCID_RESERVED_MIN ... MAC_LCID_RESERVED_MAX :
break;
- case MAC_LCID_CCCH_48BIT :
- break;
+ case MAC_LCID_UL_CCCH_48BIT :
+ {
+ pduLen--;
+
+ /* for UL CCCH,fixed length of MAC SDU */
+ length = 6;
+
+ /* Allocating sharable memory to send ul ccch msg to du app*/
+ MAC_ALLOC_SHRABL_BUF(pdu, length);
+ if(!pdu)
+ {
+ DU_LOG("\nERROR --> MAC : UL CCCH PDU memory allocation failed");
+ return RFAILED;
+ }
+ rxPduIdx++;
+ memcpy(pdu, &rxDataPdu[rxPduIdx], length);
+ pduLen -= length;
+ rxPduIdx = rxPduIdx + length;
+
+ /* store msg3 pdu in macRaCb for CRI value */
+ memcpy(macCb.macCell[cellIdx]->macRaCb[ueIdx].msg3Pdu, pdu, length);
+
+ /* Send UL-CCCH Indication to DU APP */
+ ret = macProcUlCcchInd(macCb.macCell[cellIdx]->cellId, rxDataIndPdu->rnti, length, pdu);
+ break;
+ }
case MAC_LCID_BIT_RATE_QUERY :
break;
crcIndInfo.crnti = crcInd->crcInfo[0].rnti;
crcIndInfo.timingInfo.sfn = crcInd->timingInfo.sfn;
crcIndInfo.timingInfo.slot = crcInd->timingInfo.slot;
- crcIndInfo.numCrcInd = crcInd->crcInfo[0].numCb;
+ crcIndInfo.numCrcInd = crcInd->numCrc;
crcIndInfo.crcInd[0] = crcInd->crcInfo[0].cbCrcStatus[0];
MAC_FREE_SHRABL_BUF(pst->region, pst->pool, crcInd, sizeof(CrcInd));
* RFAILED - failure
*
* ****************************************************************/
-uint8_t buildAndSendHarqInd(HarqInfoF0F1 *harqInfo, uint8_t crnti, uint16_t cellIdx, SlotTimingInfo *slotInd)
+uint8_t buildAndSendHarqInd(HarqInfoF0F1 *harqInfo, uint16_t crnti, uint16_t cellIdx, SlotTimingInfo *slotInd)
{
uint16_t harqCounter=0;
Pst pst;
* RFAILED - failure
*
* ****************************************************************/
-uint8_t buildAndSendSrInd(UciInd *macUciInd, uint8_t crnti)
+uint8_t buildAndSendSrInd(UciInd *macUciInd, uint16_t crnti)
{
uint16_t cellIdx;
Pst pst;
void fillMsg4DlData(MacDlData *dlData, uint16_t msg4PduLen, uint8_t *msg4Pdu)
{
- dlData->pduInfo[dlData->numPdu].lcId = MAC_LCID_CCCH;
+ dlData->pduInfo[dlData->numPdu].lcId = MAC_LCID_DL_CCCH;
dlData->pduInfo[dlData->numPdu].pduLen = msg4PduLen;
memcpy(dlData->pduInfo[dlData->numPdu].dlPdu, msg4Pdu, msg4PduLen);
dlData->numPdu++;
lcid = dlData->pduInfo[pduIdx].lcId;
switch(lcid)
{
- case MAC_LCID_CCCH:
+ case MAC_LCID_DL_CCCH:
case MAC_LCID_MIN ... MAC_LCID_MAX :
{
lenField = dlData->pduInfo[pduIdx].pduLen;
#define ODU_SELECTOR_TC 1
#define ODU_SELECTOR_LWLC 2
-#define ODU_START_CRNTI 100
-#define ODU_END_CRNTI 500
+#define ODU_START_CRNTI 17017
+#define ODU_END_CRNTI 17020
/* LCID */
#define SRB0_LCID 0
#define MAX_SFN 1024
+#define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
+
/* Defining macros for common utility functions */
#define ODU_GET_MSG_BUF SGetMsg
#define ODU_PUT_MSG_BUF SPutMsg
#define ODU_ADD_PRE_MSG_MULT SAddPreMsgMult
#define ODU_ADD_PRE_MSG_MULT_IN_ORDER SAddPreMsgMultInOrder
+#define ODU_ADD_POST_MSG SAddPstMsg
#define ODU_ADD_POST_MSG_MULT SAddPstMsgMult
#define ODU_START_TASK SStartTask
#define ODU_STOP_TASK SStopTask
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+#ifdef UE_SIM_TEST
+#define EVT_FAPI_CL_SLOT_IND 1
+#define EVT_FAPI_CL_STOP_IND 2
+#endif
+
+/**********************************************************************
+ End of file
+***********************************************************************/
#define QPSK_MODULATION 2
#define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
-#define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
#define UL_TX_BUFFER_SIZE 5
#define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/
#define ENTPX 0xe2 /* LTE PDCP Data User */
+#ifdef UE_SIM_TEST
+#define ENTFAPICL 0xe3 /* FAPI Convergence Layer */
+#endif
+
#ifdef SS_FAP
/* ssi_h_001.main_128: Entity for FAP is added */
/*ssi_h_001.main_145-FAP specific aditions*/
*****************************************************************/
uint8_t duHandleSlotInd(Pst *pst, SlotTimingInfo *slotIndInfo)
{
+ static uint16_t count = 0;
uint8_t cellIdx = 0, ret = ROK;
DuCellCb *duCellCb = NULLP;
DU_LOG("\nERROR --> DU APP : Recevied null pointer from MAC");
ret = RFAILED;
}
+ //if(count == 3000)
+ // BuildAndSendDUConfigUpdate(SERV_CELL_TO_DELETE);
+ //count++;
return(ret);
}
/*******************************************************************
uint8_t macActvInit (Ent, Inst, Region, Reason);
uint8_t lwrMacActvTsk(Pst *, Buffer *);
uint8_t lwrMacActvInit(Ent, Inst, Region, Reason);
-#ifndef INTEL_WLS_MEM
+#if (!defined(INTEL_WLS_MEM) && !defined(UE_SIM_TEST))
uint8_t phyStubActvTsk(Pst *, Buffer *);
uint8_t phyStubActvInit(Ent, Inst, Region, Reason);
#endif
+#ifdef UE_SIM_TEST
+uint8_t fapiClRecvrActvTsk(Pst *, Buffer *);
+uint8_t fapiClRecvrActvInit(Ent, Inst, Region, Reason);
+uint8_t fapiClSlotIndActvTsk(Pst *, Buffer *);
+uint8_t fapiClSlotIndActvInit(Ent, Inst, Region, Reason);
+#endif
/* Global variable */
DuCfgParams duCfgParam;
return ROK;
}
-#ifndef INTEL_WLS_MEM
+#if (!defined(INTEL_WLS_MEM) && !defined(UE_SIM_TEST))
/*******************************************************************
*
* @brief Initializes Phy stub slot indication generator task
}
#endif
+#ifdef UE_SIM_TEST
+/*******************************************************************
+ *
+ * @brief Initializes FAPI CL TAPA tasks
+ *
+ * @details
+ *
+ * Function : fapiClRecvrInit
+ *
+ * Functionality:
+ * - Registers and attaches TAPA tasks for FAPI CL
+ *
+ * @params[in] system task ID
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t fapiClRecvrInit(SSTskId sysTskId)
+{
+ /* Register FAPI CL slot indication TAPA Task */
+ if(ODU_REG_TTSK((Ent)ENTFAPICL, (Inst)0, (Ttype)TTNORM, (Prior)PRIOR0,
+ fapiClRecvrActvInit, (ActvTsk)fapiClRecvrActvTsk) != ROK)
+ {
+ return RFAILED;
+ }
+ /* Attach FAPI CL slot indication TAPA Task */
+ if (ODU_ATTACH_TTSK((Ent)ENTFAPICL, (Inst)0, sysTskId)!= ROK)
+ {
+ return RFAILED;
+ }
+
+ DU_LOG("\nINFO --> DU_APP : FAPI CL Receiver TAPA task created and registered to %d sys task",
+ sysTskId);
+ return ROK;
+}
+
+/*******************************************************************
+ *
+ * @brief Initializes FAPI CL TAPA tasks
+ *
+ * @details
+ *
+ * Function : fapiClSlotIndInit
+ *
+ * Functionality:
+ * - Registers and attaches TAPA tasks for FAPI CL
+ *
+ * @params[in] system task ID
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t fapiClSlotIndInit(SSTskId sysTskId)
+{
+ /* Register FAPI CL slot indication TAPA Task */
+ if(ODU_REG_TTSK((Ent)ENTFAPICL, (Inst)1, (Ttype)TTNORM, (Prior)PRIOR0,
+ fapiClSlotIndActvInit, (ActvTsk)fapiClSlotIndActvTsk) != ROK)
+ {
+ return RFAILED;
+ }
+ /* Attach FAPI CL slot indication TAPA Task */
+ if (ODU_ATTACH_TTSK((Ent)ENTFAPICL, (Inst)1, sysTskId)!= ROK)
+ {
+ return RFAILED;
+ }
+
+ DU_LOG("\nINFO --> DU_APP : FAPI CL Slot Indicarion TAPA task created and registered to %d sys task",
+ sysTskId);
+ return ROK;
+}
+#endif
+
/*******************************************************************
*
* @brief Initializes system and TAPA tasks
{
/* Declare system task Ids */
SSTskId du_app_stsk, egtp_stsk, sctp_stsk, rlc_ul_stsk, rlc_mac_cl_stsk, lwr_mac_stsk, phy_stub_slot_ind_stsk;
+#ifdef UE_SIM_TEST
+ SSTskId fapi_cl_slot_ind_stsk, fapi_cl_recvr_stsk;
+#endif
pthread_attr_t attr;
}
ODU_SET_THREAD_AFFINITY(&lwr_mac_stsk, SS_AFFINITY_MODE_EXCL, 21, 0);
-#ifndef INTEL_WLS_MEM
+#if (!defined(INTEL_WLS_MEM) && !defined(UE_SIM_TEST))
/* system task for phy stub's slot indication generator thread */
if(ODU_CREATE_TASK(PRIOR0, &phy_stub_slot_ind_stsk) != ROK)
{
return RFAILED;
}
+#endif
+#ifdef UE_SIM_TEST
+ /* system task for FAPI CL's slot indication generator thread */
+ if(ODU_CREATE_TASK(PRIOR0, &fapi_cl_recvr_stsk) != ROK)
+ {
+ DU_LOG("\nERROR --> DU_APP : System Task creation for FAPI CL receiver failed. MAX STSK [%d]", SS_MAX_STSKS);
+ return RFAILED;
+ }
+
+ if(ODU_CREATE_TASK(PRIOR0, &fapi_cl_slot_ind_stsk) != ROK)
+ {
+ DU_LOG("\nERROR --> DU_APP : System Task creation for FAPI CL slot indication generator failed. MAX STSK [%d]", SS_MAX_STSKS);
+ return RFAILED;
+ }
#endif
/* Create TAPA tasks */
return RFAILED;
}
-#ifndef INTEL_WLS_MEM
+#if (!defined(INTEL_WLS_MEM) && !defined(UE_SIM_TEST))
if(phyStubInit(phy_stub_slot_ind_stsk) != ROK)
{
DU_LOG("\nERROR --> DU_APP : PHY stub slot indication Tapa Task initialization failed");
}
#endif
+#ifdef UE_SIM_TEST
+ if(fapiClRecvrInit(fapi_cl_recvr_stsk) != ROK)
+ {
+ DU_LOG("\nERROR --> DU_APP : FAPI CL receiver Tapa Task initialization failed");
+ return RFAILED;
+ }
+
+ if(fapiClSlotIndInit(fapi_cl_slot_ind_stsk) != ROK)
+ {
+ DU_LOG("\nERROR --> DU_APP : FAPI CL slot indication Tapa Task initialization failed");
+ return RFAILED;
+ }
+#endif
return ROK;
}
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+#define SELF_IP "192.168.130.71"
+#define SELF_PORT 6789
+#define UE_SIM_IP "172.24.100.56"
+#define UE_SIM_PORT 9876
+
+#define FAPI_CL_INST_0 0
+#define FAPI_CL_INST_1 1
+
+#define MAX_BUF_LEN 110000
+#define MAX_PDU_SIZE 16000
+
+#define EVT_FAPI_CL_START_SLOT_IND 1
+#define EVT_FAPI_CL_START_RECEIVER 2
+#define EVT_RECP_REQUEST 4
+#define EVT_DATA_REQUEST 12
+#define EVT_CNTL_REQUEST 15
+
+#define FILL_PARAM(_src, _dst, _idx) \
+{ \
+ _dst = _src; \
+ _idx += sizeof(_dst); \
+}
+
+typedef enum
+{
+ UCI_PUSCH,
+ UCI_PUCCH_F0_F1,
+ UCI_PUCCH_F2_F3_F4,
+}uciType;
+
+typedef struct slotIndInfo
+{
+ bool slotIndicationStarted;
+ uint16_t currSfn;
+ uint16_t currSlot;
+}SlotIndInfo;
+
+typedef struct socketInfo
+{
+ uint32_t sockfd;
+ struct sockaddr_in srcAddr;
+ struct sockaddr_in dstAddr;
+}SocketInfo;
+
+typedef struct clCb
+{
+ bool configured;
+ SlotIndInfo slotIndInfo;
+ SocketInfo socket;
+}ClCb;
+
+ClCb clCb;
+
+void configureFapiCl();
+void* generateTicks();
+void sendMsgToUeSim(uint8_t event, Data *msg, uint16_t msgLen);
+void recvMsgFromUeSim();
+void fapiClProcessUeSim2MacFapiMsg(Data *msg);
+void fapiClProcessMac2UeSimFapiMsg(void *msg);
+
+/**********************************************************************
+ End of file
+ **********************************************************************/
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+/* This file sends/receives FAPI messages to/from UE Sim/PHY */
+
+#include "common_def.h"
+#include "fapi_cl.h"
+#include "fapi_cl_utils.h"
+
+/*******************************************************************
+ *
+ * @brief Receives message from UE simulator
+ *
+ * @details
+ *
+ * Function : recvMsgFromUeSim
+ *
+ * Functionality:
+ * - Receives message from UE simulator
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void recvMsgFromUeSim()
+{
+ struct sockaddr remSockAddr;
+ uint32_t remAddrLen = 0;
+ ssize_t recvLen = 0;
+ uint8_t buf[MAX_BUF_LEN];
+
+ while(true)
+ {
+ recvLen = 0;
+ remAddrLen = sizeof(remSockAddr);
+ memset((uint8_t*)&remSockAddr, 0, sizeof(remSockAddr));
+
+ /*read the data from socket*/
+ if((recvLen = recvfrom(clCb.socket.sockfd, buf, sizeof(buf), 0, (struct sockaddr *)&remSockAddr, \
+ (socklen_t *)&remAddrLen)) == -1)
+ {
+ DU_LOG("\nERROR --> FAPI CL: recvfrom() error\n");
+ continue;
+ }
+ else if(recvLen != 0)
+ {
+ fapiClProcessUeSim2MacFapiMsg(buf);
+ memset(buf, 0, MAX_BUF_LEN * sizeof(uint8_t));
+ }
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Start receiver thread
+ *
+ * @details
+ *
+ * Function : sendStartReceiverReq
+ *
+ * Functionality:
+ * - Start a thread to receive messages from UE simulator
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void sendStartReceiverReq()
+{
+ Pst pst;
+ Buffer *mBuf = NULLP;
+
+ DU_LOG("\nINFO --> FAPI_CL: Sending start receiving event to self");
+ memset(&pst, 0, sizeof(Pst));
+ FILL_PST_CL_TO_CL(pst, FAPI_CL_INST_0, FAPI_CL_INST_0, EVT_FAPI_CL_START_RECEIVER);
+ ODU_GET_MSG_BUF(pst.region, pst.pool, &mBuf);
+ ODU_POST_TASK(&pst, mBuf);
+}
+
+/*******************************************************************
+ *
+ * @brief Configure FAPI CL
+ *
+ * @details
+ *
+ * Function : configureFapiCl
+ *
+ * Functionality:
+ * - Configure FAPI CL
+ *
+ * @params[in] void
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void configureFapiCl()
+{
+ if(clCb.configured == false)
+ {
+ if((clCb.socket.sockfd = socket(AF_INET, SOCK_DGRAM, 0)) == -1)
+ DU_LOG("\nERROR --> FAPI CL: Socket creation [Failure]");
+ else
+ DU_LOG("\nINFO --> FAPI CL: Socket creation [Success]");
+
+ memset((uint8_t *)&clCb.socket.srcAddr, 0, sizeof(clCb.socket.srcAddr));
+ clCb.socket.srcAddr.sin_family = AF_INET;
+ clCb.socket.srcAddr.sin_port = htons(SELF_PORT);
+ clCb.socket.srcAddr.sin_addr.s_addr = inet_addr((const char *)SELF_IP);
+ if(bind(clCb.socket.sockfd, (struct sockaddr *)&clCb.socket.srcAddr, sizeof(struct sockaddr)) == -1)
+ DU_LOG("\nERROR --> FAPI CL: Socket bind [Failure]");
+ else
+ DU_LOG("\nINFO --> FAPI CL: Socket bind [Success]");
+
+ memset((uint8_t *)&clCb.socket.dstAddr, 0, sizeof(clCb.socket.dstAddr));
+ clCb.socket.dstAddr.sin_family = AF_INET;
+ clCb.socket.dstAddr.sin_port = htons(UE_SIM_PORT);
+ clCb.socket.dstAddr.sin_addr.s_addr = inet_addr((const char *)UE_SIM_IP);
+
+ clCb.configured = true;
+ sendStartReceiverReq();
+ DU_LOG("\nINFO --> FAPI_CL: Configuration complete");
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Sends message to UE simulator
+ *
+ * @details
+ *
+ * Function : sendMsgToUeSim
+ *
+ * Functionality:
+ * - Sends message to UE simulator
+ *
+ * @params[in] Event
+ * Message pointer
+ * Message length
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void sendMsgToUeSim(uint8_t event, Data *msg, uint16_t msgLen)
+{
+ uint8_t ret = ROK;
+ Buffer *mBuf = NULLP;
+
+ ODU_GET_MSG_BUF(DFLT_REGION, DFLT_POOL, &mBuf);
+ if(mBuf == NULLP)
+ {
+ DU_LOG("\nERROR --> FAPI CL: Failure in allocating memory for mBuf");
+ return;
+ }
+
+ ret = ODU_ADD_POST_MSG((Data )event, mBuf);
+ if(ret != ROK)
+ {
+ DU_LOG("\nERROR --> FAPI CL: Failed to pack event into buffer");
+ }
+
+ ret = ODU_ADD_POST_MSG_MULT(msg, msgLen, mBuf);
+ if(ret == ROK)
+ {
+ uint8_t sendBuf[MAX_BUF_LEN];
+ MsgLen cpMsgLen; /* copied message length */
+ MsgLen bufLen; /* send buffer length */
+
+ ret = ODU_GET_MSG_LEN(mBuf, &bufLen);
+ if (ret != ROK)
+ {
+ DU_LOG("ERROR --> FAPI CL: Failed to find buffer length");
+ return;
+ }
+
+ if (bufLen >= MAX_BUF_LEN)
+ {
+ DU_LOG("\nERROR --> FAPI CL: Length Buffer to be copied [%d] bytes is more than MAX buffer length supported [%d] bytes",\
+ bufLen, MAX_BUF_LEN);
+ return;
+ }
+
+ ret = ODU_COPY_MSG_TO_FIX_BUF(mBuf, 0, bufLen, sendBuf, &cpMsgLen);
+ if ((ret != ROK) || (cpMsgLen != bufLen))
+ {
+ DU_LOG("\nERROR --> FAPI CL: Failed to copy buffer into fixed message");
+ return;
+ }
+ if(sendto(clCb.socket.sockfd, sendBuf, bufLen, 0, (struct sockaddr *)&clCb.socket.dstAddr, sizeof(clCb.socket.dstAddr)) == -1)
+ DU_LOG("\nERROR --> FAPI CL: Sending message over UDP socket [Failure]");
+
+ ODU_PUT_MSG_BUF(mBuf);
+ }
+}
+
+/**********************************************************************
+ End of file
+ **********************************************************************/
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+#include "common_def.h"
+#include "fapi_cl.h"
+
+/*******************************************************************
+*
+* @brief Initializes FAPI CL receiver task
+*
+* @details
+*
+* Function : fapiClRecvrActvInit
+*
+* Functionality:
+* - Initializes FAPI CL Receiver task
+*
+* @params[in]
+* @return ROK - success
+* RFAILED - failure
+*
+* ****************************************************************/
+uint8_t fapiClRecvrActvInit(Ent ent, Inst inst, Region reg, Reason reason)
+{
+ memset(&clCb, 0, sizeof(ClCb));
+ return ROK;
+}
+
+/*******************************************************************
+*
+* @brief Receives messages for FAPI CL REceiver task
+*
+* @details
+*
+* Function : fapiClRecvrActvTsk
+*
+* Functionality:
+* - Receives messages for fapi cl receiver task
+*
+* @params[in]
+* @return ROK - success
+* RFAILED - failure
+*
+* ****************************************************************/
+uint8_t fapiClRecvrActvTsk(Pst *pst, Buffer *mBuf)
+{
+ DU_LOG("\nINFO --> FAPI_CL: Received Event [%d]", pst->event);
+
+ switch(pst->srcEnt)
+ {
+ case ENTFAPICL:
+ {
+ switch(pst->event)
+ {
+ case EVT_FAPI_CL_START_RECEIVER:
+ {
+ ODU_PUT_MSG_BUF(mBuf);
+ recvMsgFromUeSim();
+ break;
+ }
+ default:
+ DU_LOG("\nERROR --> FAPI_CL: Invalid Event");
+ }
+ }
+ }
+ return ROK;
+}
+
+/*******************************************************************
+*
+* @brief Initializes FAPI CL slot indication generator task
+*
+* @details
+*
+* Function : fapiClSlotIndActvInit
+*
+* Functionality:
+* - Initializes FAPI CL slot indication generator task
+*
+* @params[in]
+* @return ROK - success
+* RFAILED - failure
+*
+* ****************************************************************/
+uint8_t fapiClSlotIndActvInit(Ent ent, Inst inst, Region reg, Reason reason)
+{
+ memset(&clCb, 0, sizeof(ClCb));
+ return ROK;
+}
+
+/*******************************************************************
+*
+* @brief Receives messages for FAPI CL slot indication generator task
+*
+* @details
+*
+* Function : fapiClSlotIndActvTsk
+*
+* Functionality:
+* - Receives messages for fapi cl slot indication generator task
+*
+* @params[in]
+* @return ROK - success
+* RFAILED - failure
+*
+* ****************************************************************/
+uint8_t fapiClSlotIndActvTsk(Pst *pst, Buffer *mBuf)
+{
+ DU_LOG("\nINFO --> FAPI_CL: Received Event [%d]", pst->event);
+
+ switch(pst->srcEnt)
+ {
+ case ENTFAPICL:
+ {
+ switch(pst->event)
+ {
+ case EVT_FAPI_CL_START_SLOT_IND:
+ {
+ ODU_PUT_MSG_BUF(mBuf);
+ generateTicks();
+ break;
+ }
+ default:
+ DU_LOG("\nERROR --> FAPI_CL: Invalid Event");
+ }
+ }
+ }
+ return ROK;
+}
+
+/**********************************************************************
+ End of file
+ **********************************************************************/
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+/* This file converts FAPI messages sent from MAC to UE simulator/PHY */
+
+#include "common_def.h"
+#include "fapi_cl.h"
+#include "fapi_cl_utils.h"
+#include "fapi_interface_ue_sim.h"
+#include "fapi_interface.h"
+#include "fapi_vendor_extension.h"
+
+/*******************************************************************
+ *
+ * @brief Converts START.Request
+ *
+ * @details
+ *
+ * Function : convertStartRequest
+ *
+ * Functionality:
+ * - Converts START.request from MAC's FAPI version to
+ * UE Simulator's FAPI version.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertStartRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ p_fapi_api_queue_elem_t startReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_start_req_t *macStartReq = (fapi_start_req_t *)(startReqElem +1);
+ fapi_start_req_t_ue_sim ueSimStartReq;
+
+ DU_LOG("\nDEBUG --> FAPI_CL: Received START.request from MAC");
+
+ memset(&ueSimStartReq, 0, sizeof(fapi_start_req_t_ue_sim));
+ ueSimStartReq.header.numberOfMessagesIncluded = 1;
+ ueSimStartReq.header.handle = handle;
+ ueSimStartReq.header.msg_details.message_type_id = macStartReq->header.msg_id;
+ ueSimStartReq.header.msg_details.length = sizeof(fapi_start_req_t_ue_sim) - sizeof(fapi_msg_header_t_ue_sim);
+
+ FAPI_CL_FREE(msg, msgLen);
+
+ sendMsgToUeSim(EVT_CNTL_REQUEST, (Data *)&ueSimStartReq, sizeof(fapi_start_req_t_ue_sim));
+}
+
+/*******************************************************************
+ *
+ * @brief Converts CONFIG.Request
+ *
+ * @details
+ *
+ * Function : convertConfigRequest
+ *
+ * Functionality:
+ * - Converts CONFIG.request from MAC's FAPI version to
+ * UE Simulator's FAPI version.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertConfigRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ uint8_t idx = 0;
+ p_fapi_api_queue_elem_t configReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_config_req_t *macConfigReq = (fapi_config_req_t *)(configReqElem +1);
+ fapi_config_req_t_ue_sim ueSimConfigReq;
+
+ DU_LOG("\nDEBUG --> FAPI_CL: Received CONFIG.request from MAC");
+
+ /* Before processing CONFIG.request msg, configure FAPI CL to communicate
+ * with UE simulator */
+ configureFapiCl();
+
+ memset(&ueSimConfigReq, 0, sizeof(fapi_config_req_t_ue_sim));
+ ueSimConfigReq.header.numberOfMessagesIncluded = 1;
+ ueSimConfigReq.header.handle = handle;
+ ueSimConfigReq.header.msg_details.message_type_id = macConfigReq->header.msg_id;
+ ueSimConfigReq.header.msg_details.length = sizeof(fapi_config_req_t_ue_sim) - sizeof(fapi_msg_header_t_ue_sim);
+ ueSimConfigReq.number_of_tlvs = macConfigReq->number_of_tlvs;
+
+ /* Copying all TLVs
+ * Issues:
+ * a. DL Frequency value gets truncated when copied to a uint16_t TLV
+ * b. UL Frequency value gets truncated when copied to a uint16_t TLV
+ * c. UE simulator FAPI interface file does not support DMRS_Type_A_Pos tag
+ */
+ for(idx = 0; idx < ueSimConfigReq.number_of_tlvs; idx++)
+ {
+ ueSimConfigReq.tlvs[idx].tl.tag = macConfigReq->tlvs[idx].tl.tag;
+ ueSimConfigReq.tlvs[idx].tl.length = macConfigReq->tlvs[idx].tl.length;
+ ueSimConfigReq.tlvs[idx].value = macConfigReq->tlvs[idx].value;
+ }
+
+ FAPI_CL_FREE(msg, msgLen);
+
+ sendMsgToUeSim(EVT_CNTL_REQUEST, (Data *)&ueSimConfigReq, sizeof(fapi_config_req_t_ue_sim));
+}
+
+/*******************************************************************
+ *
+ * @brief Converts codeword Info structure
+ *
+ * @details
+ *
+ * Function : convertCodewordInfo
+ *
+ * Functionality:
+ * - Converts codeword info from MAC's FAPI version to
+ * UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's Codeword info
+ * UE sim's codeword info
+ * Offset of codeword info struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertCodewordInfo(fapi_codeword_pdu_t macCwInfo, fapi_codeword_pdu_t_ue_sim *cwInfo, uint16_t *pduIdx)
+{
+ uint16_t cwIdx = 0;
+
+ FILL_PARAM(macCwInfo.targetCodeRate, cwInfo->target_code_rate, cwIdx)
+ FILL_PARAM(macCwInfo.qamModOrder, cwInfo->qam_mod_order, cwIdx)
+ FILL_PARAM(macCwInfo.mcsIndex, cwInfo->mcs_index, cwIdx)
+ FILL_PARAM(macCwInfo.mcsTable, cwInfo->mcs_table, cwIdx)
+ FILL_PARAM(macCwInfo.rvIndex, cwInfo->rv_index, cwIdx)
+ FILL_PARAM(macCwInfo.tbSize, cwInfo->tb_size, cwIdx)
+
+ *pduIdx += cwIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts Precoding and Beamforming struct
+ *
+ * @details
+ *
+ * Function : convertPreCodingAndBeamforming
+ *
+ * Functionality:
+ * - Converts Precondig and beamforming struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's Precoding and beamforming struct
+ * UE sim's Precoding and beamforming struct
+ * Offset of precoding and beamforming struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertPreCodingAndBeamforming(fapi_precoding_bmform_t macPcAndBf, fapi_precoding_bmform_t_ue_sim *pcAndBf, uint16_t *pduIdx)
+{
+ uint16_t pcBfIdx = 0, itr = 0;
+ fapi_bmi_t_ue_sim *bmi = NULLP;
+
+ FILL_PARAM(macPcAndBf.numPrgs, pcAndBf->num_prgs, pcBfIdx);
+ FILL_PARAM(macPcAndBf.prgSize, pcAndBf->prg_size, pcBfIdx);
+ FILL_PARAM(macPcAndBf.digBfInterfaces, pcAndBf->dig_bf_interfaces, pcBfIdx);
+ FILL_PARAM(macPcAndBf.pmi_bfi[0].pmIdx, pcAndBf->pmi_bfi[0].pm_idx, pcBfIdx);
+
+ for(itr = 0; itr < macPcAndBf.digBfInterfaces; itr++)
+ {
+ bmi = (void *)pcAndBf + pcBfIdx;
+ FILL_PARAM(macPcAndBf.pmi_bfi[0].beamIdx[itr].beamidx, bmi->beamidx, pcBfIdx);
+ }
+ *pduIdx += pcBfIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts DL DCI struct
+ *
+ * @details
+ *
+ * Function : convertDlDci
+ *
+ * Functionality:
+ * - Converts DL DCI struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's DL DCI struct
+ * UE sim's DCI struct
+ * Offset of DL DCI struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlDci(fapi_dl_dci_t macDlDci, fapi_dl_dci_t_ue_sim *dlDci, uint16_t *pduIdx)
+{
+ uint8_t itr = 0, dlDciPayloadSizeBytes = 0;
+ uint8_t *dlDciPayloadByte = NULLP;
+ uint16_t dlDciIdx = 0;
+
+ FILL_PARAM(macDlDci.rnti, dlDci->rnti, dlDciIdx);
+ FILL_PARAM(macDlDci.scramblingId, dlDci->nIdPdcchData, dlDciIdx);
+ FILL_PARAM(macDlDci.scramblingRnti, dlDci->nRntiPdcchData, dlDciIdx);
+ FILL_PARAM(macDlDci.cceIndex, dlDci->cce_index, dlDciIdx);
+ FILL_PARAM(macDlDci.aggregationLevel, dlDci->aggregation_level, dlDciIdx);
+
+ convertPreCodingAndBeamforming(macDlDci.pc_and_bform, &dlDci->pc_and_bform, &dlDciIdx);
+
+ FILL_PARAM(macDlDci.beta_pdcch_1_0, dlDci->tx_power_info.beta_pdcch_1_0, dlDciIdx);
+ FILL_PARAM(macDlDci.powerControlOffsetSS, dlDci->tx_power_info.powerControlOffsetSSProfileNR, dlDciIdx);
+
+ FILL_PARAM(macDlDci.payloadSizeBits, dlDci->payload_size_bits, dlDciIdx);
+ if(dlDci->payload_size_bits % 8 == 0)
+ dlDciPayloadSizeBytes = (dlDci->payload_size_bits/8);
+ else
+ dlDciPayloadSizeBytes = (dlDci->payload_size_bits/8)+1;
+
+ for(itr = 0; itr < dlDciPayloadSizeBytes; itr++)
+ {
+ dlDciPayloadByte = (void *)dlDci + dlDciIdx;
+ FILL_PARAM(macDlDci.payload[itr], *dlDciPayloadByte, dlDciIdx);
+ }
+
+ *pduIdx += dlDciIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts PDCCH PDU
+ *
+ * @details
+ *
+ * Function : convertDlPdcchPdu
+ *
+ * Functionality:
+ * - Converts PDCCH PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's PDCCH PDU struct
+ * UE sim's PDCCH PDU struct
+ * Offset of PDCCH PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlPdcchPdu(fapi_dl_pdcch_pdu_t macPdcchPdu, fapi_dl_pdcch_pdu_t_ue_sim *pdcchPdu, uint16_t *pduIndex)
+{
+ uint8_t itr = 0;
+ uint16_t pdcchPduIdx = 0;
+ fapi_dl_dci_t_ue_sim *dlDci = NULLP;
+
+ FILL_PARAM(macPdcchPdu.bwpSize, pdcchPdu->bwp.bwp_size, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.bwpStart, pdcchPdu->bwp.bwp_start, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.subCarrierSpacing, pdcchPdu->bwp.sub_carrier_spacing, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.cyclicPrefix, pdcchPdu->bwp.cyclic_prefix, pdcchPduIdx);
+
+ FILL_PARAM(macPdcchPdu.startSymbolIndex, pdcchPdu->coreset.start_symbol_index, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.durationSymbols, pdcchPdu->coreset.duration_symbols, pdcchPduIdx);
+ for(itr = 0; itr < FAPI_MAX_FREQ_DOMAIN_RES; itr++)
+ FILL_PARAM(macPdcchPdu.freqDomainResource[itr], pdcchPdu->coreset.freq_domain_resource[itr], pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.cceRegMappingType, pdcchPdu->coreset.cce_reg_mapping_type, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.regBundleSize, pdcchPdu->coreset.reg_bundle_size, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.interleaverSize, pdcchPdu->coreset.interleaver_size, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.coreSetType, pdcchPdu->coreset.core_set_type, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.shiftIndex, pdcchPdu->coreset.shift_index, pdcchPduIdx);
+ FILL_PARAM(macPdcchPdu.precoderGranularity, pdcchPdu->coreset.precoder_granularity, pdcchPduIdx);
+
+ FILL_PARAM(macPdcchPdu.numDlDci, pdcchPdu->num_dl_dci, pdcchPduIdx);
+ for(itr = 0; itr <macPdcchPdu.numDlDci; itr++)
+ {
+ dlDci = (void *)pdcchPdu + pdcchPduIdx;
+ convertDlDci(macPdcchPdu.dlDci[itr], dlDci, &pdcchPduIdx);
+ }
+
+ //unused in UE sim : pdcchPdu->pdcchMntParms
+ pdcchPduIdx += sizeof(fapi_pdcch_mnt_parms_t);
+
+ *pduIndex += pdcchPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts PDSCH PDU
+ *
+ * @details
+ *
+ * Function : convertDlTtiPdschPdu
+ *
+ * Functionality:
+ * - Converts PDSCH PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's PDSCH PDU struct
+ * UE sim's PDSCH PDU struct
+ * Offset of PDSCH PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlTtiPdschPdu(fapi_dl_pdsch_pdu_t macPdschPdu, fapi_dl_pdsch_pdu_t_ue_sim *pdschPdu, uint16_t *pduIndex)
+{
+ uint8_t itr = 0;
+ uint16_t pdschPduIdx = 0;
+
+ FILL_PARAM(macPdschPdu.pduBitMap, pdschPdu->pdu_bit_map, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.rnti, pdschPdu->rnti, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.pdu_index, pdschPdu->pdu_index, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.bwpSize, pdschPdu->bwp.bwp_size, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.bwpStart, pdschPdu->bwp.bwp_start, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.subCarrierSpacing, pdschPdu->bwp.sub_carrier_spacing, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.cyclicPrefix, pdschPdu->bwp.cyclic_prefix, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.nrOfCodeWords, pdschPdu->nr_of_code_words, pdschPduIdx);
+ for(itr = 0; itr < pdschPdu->nr_of_code_words; itr++)
+ convertCodewordInfo(macPdschPdu.cwInfo[itr], &pdschPdu->cw_info[itr], &pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.dataScramblingId, pdschPdu->nIdPdsch, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.nrOfLayers, pdschPdu->nr_of_layers, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.transmissionScheme, pdschPdu->transmission_scheme, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.refPoint, pdschPdu->ref_point, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.dlDmrsSymbPos, pdschPdu->dmrs.dl_dmrs_symb_pos, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.dmrsConfigType, pdschPdu->dmrs.dmrs_config_type, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.dlDmrsScramblingId, pdschPdu->dmrs.dl_dmrs_scrambling_id, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.scid, pdschPdu->dmrs.scid, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.numDmrsCdmGrpsNoData, pdschPdu->dmrs.num_dmrs_cdm_grps_no_data, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.dmrsPorts, pdschPdu->dmrs.dmrs_ports, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.resourceAlloc, pdschPdu->pdsch_freq_dom_alloc.resource_alloc, pdschPduIdx);
+ memcpy(pdschPdu->pdsch_freq_dom_alloc.rb_bitmap, macPdschPdu.rbBitmap, 36*sizeof(uint8_t));
+ pdschPduIdx += 36*sizeof(uint8_t);
+ FILL_PARAM(macPdschPdu.rbStart, pdschPdu->pdsch_freq_dom_alloc.rb_start, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.rbSize, pdschPdu->pdsch_freq_dom_alloc.rb_size, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.vrbToPrbMapping, pdschPdu->pdsch_freq_dom_alloc.vrb_to_prb_mapping, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.startSymbIndex, pdschPdu->pdsch_time_dom_alloc.start_symb_index, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.nrOfSymbols, pdschPdu->pdsch_time_dom_alloc.nr_of_symbols, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.ptrsPortIndex, pdschPdu->pdsch_ptrs_info.ptrs_port_index, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.ptrsTimeDensity, pdschPdu->pdsch_ptrs_info.ptrs_time_density, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.ptrsFreqDensity, pdschPdu->pdsch_ptrs_info.ptrs_freq_density, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.ptrsReOffset, pdschPdu->pdsch_ptrs_info.ptrs_re_offset, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.nEpreRatioOfPdschToPtrs, pdschPdu->pdsch_ptrs_info.n_epre_ratio_of_pdsch_to_ptrs, pdschPduIdx);
+
+ convertPreCodingAndBeamforming(macPdschPdu.preCodingAndBeamforming, &pdschPdu->pre_coding_and_beamforming, &pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.powerControlOffset, pdschPdu->tx_pwr_info.powerControlOffsetProfileNR, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.powerControlOffsetSS, pdschPdu->tx_pwr_info.powerControlOffsetSSProfileNR, pdschPduIdx);
+
+ FILL_PARAM(macPdschPdu.isLastCbPresent, pdschPdu->cbg_info.is_last_cb_present, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.isInlineTbCrc, pdschPdu->cbg_info.is_inline_tb_crc, pdschPduIdx);
+ FILL_PARAM(macPdschPdu.dlTbCrc, pdschPdu->cbg_info.dlTbCrc[0], pdschPduIdx);
+ FILL_PARAM(macPdschPdu.dlTbCrc, pdschPdu->cbg_info.dlTbCrc[0], pdschPduIdx);
+
+ // unsused fapi_dl_pdsch_mnt_parms_t dlPdschMntparms;
+ pdschPduIdx += sizeof(fapi_dl_pdsch_mnt_parms_t);
+ // unused fapi_dl_pdsch_ptrs_mnt_parms_t dlPdschPtrsMntParms;
+ pdschPduIdx += sizeof(fapi_dl_pdsch_ptrs_mnt_parms_t);
+ // unused fapi_dl_rel16_pdsch_parms_t rel16PdschParms;
+ pdschPduIdx += sizeof(fapi_dl_rel16_pdsch_parms_t);
+
+ *pduIndex += pdschPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts PBCH PDU
+ *
+ * @details
+ *
+ * Function : convertDlTtiPbchPdu
+ *
+ * Functionality:
+ * - Converts PBCH PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's PBCH PDU struct
+ * UE sim's PBCH PDU struct
+ * Offset of PBCH PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlTtiPbchPdu(fapi_dl_ssb_pdu_t macSsbPdu, fapi_dl_ssb_pdu_t_ue_sim *ssbPdu, uint16_t *pduIndex)
+{
+ uint16_t ssbPduIdx = 0;
+
+ FILL_PARAM(macSsbPdu.physCellId, ssbPdu->phys_cell_id, ssbPduIdx);
+ FILL_PARAM(macSsbPdu.betaPss, ssbPdu->betaPssProfileNR, ssbPduIdx);
+ FILL_PARAM(macSsbPdu.ssbBlockIndex, ssbPdu->ssb_block_index, ssbPduIdx);
+ FILL_PARAM(macSsbPdu.ssbSubCarrierOffset, ssbPdu->ssb_sub_carrier_offset, ssbPduIdx);
+ FILL_PARAM(macSsbPdu.ssbOffsetPointA, ssbPdu->ssb_offset_point_a, ssbPduIdx);
+ FILL_PARAM(macSsbPdu.bchPayloadFlag, ssbPdu->bch_payload_flag, ssbPduIdx);
+ FILL_PARAM(macSsbPdu.bchPayload.bchPayload, ssbPdu->bch_payload.u.bch_payload, ssbPduIdx);
+ convertPreCodingAndBeamforming(macSsbPdu.preCodingAndBeamforming, &ssbPdu->pre_coding_and_beamforming, &ssbPduIdx);
+
+ // unused fapi_dl_ssb_pbch_mnt_parms_t ssbPbchMntParms;
+ ssbPduIdx += sizeof(fapi_dl_ssb_pbch_mnt_parms_t);
+ *pduIndex += ssbPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts CSI-RS PDU
+ *
+ * @details
+ *
+ * Function : convertDlTtiCsiRsPdu
+ *
+ * Functionality:
+ * - Converts CSI-RS PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's CSI-RS PDU struct
+ * UE sim's CSI-RS PDU struct
+ * Offset of CSI-RS PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlTtiCsiRsPdu(fapi_dl_csi_rs_pdu_t macCsiRsPdu, fapi_dl_csi_rs_pdu_t_ue_sim *csiRsPdu, uint16_t *pduIndex)
+{
+ uint16_t csiRsIdx = 0;
+
+ FILL_PARAM(macCsiRsPdu.subCarrierSpacing, csiRsPdu->subCarrierSpacing, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.cyclicPrefix, csiRsPdu->cyclicPrefix, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.startRb, csiRsPdu->start_rb, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.nrOfRbs, csiRsPdu->nr_of_rbs, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.csiType, csiRsPdu->csi_type, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.row, csiRsPdu->row, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.freqDomain, csiRsPdu->freq_domain, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.symbL0, csiRsPdu->symb_l0, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.symbL1, csiRsPdu->symb_l1, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.cdmType, csiRsPdu->cdm_type, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.freqDensity, csiRsPdu->freq_density, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.scramId, csiRsPdu->scram_id, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.powerControlOffset, csiRsPdu->tx_pwr_info.powerControlOffsetProfileNR, csiRsIdx);
+ FILL_PARAM(macCsiRsPdu.powerControlOffsetSs, csiRsPdu->tx_pwr_info.powerControlOffsetSSProfileNR, csiRsIdx);
+ convertPreCodingAndBeamforming(macCsiRsPdu.preCodingAndBeamforming, &csiRsPdu->pre_coding_and_beamforming, &csiRsIdx);
+ //unused fapi_dl_csi_rs_mnt_parms_t csiRsMntParms;
+ csiRsIdx += sizeof(fapi_dl_csi_rs_mnt_parms_t);
+
+ *pduIndex += csiRsIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts DL TTI PDU
+ *
+ * @details
+ *
+ * Function : convertDlTtiPdu
+ *
+ * Functionality:
+ * - Converts DL TTI PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's DL TTI PDU struct
+ * UE sim's DL TTI PDU struct
+ * Offset of DL TTI PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlTtiPdu(fapi_dl_tti_req_pdu_t macDlTtiPdu, fapi_dl_tti_req_pdu_t_ue_sim *dlTtiPdu, uint16_t *index)
+{
+ uint16_t pduIndex = 0;
+
+ FILL_PARAM(macDlTtiPdu.pduType, dlTtiPdu->pdu_type, pduIndex);
+ pduIndex += sizeof(dlTtiPdu->pdu_size);
+ switch(macDlTtiPdu.pduType)
+ {
+ case FAPI_PDCCH_PDU_TYPE:
+ convertDlPdcchPdu(macDlTtiPdu.pdu.pdcch_pdu, &dlTtiPdu->u.pdcch_pdu, &pduIndex);
+ break;
+ case FAPI_PDSCH_PDU_TYPE:
+ convertDlTtiPdschPdu(macDlTtiPdu.pdu.pdsch_pdu, &dlTtiPdu->u.pdsch_pdu, &pduIndex);
+ break;
+ case FAPI_CSIRS_PDU_TYPE:
+ convertDlTtiCsiRsPdu(macDlTtiPdu.pdu.csi_rs_pdu, &dlTtiPdu->u.csi_rs_pdu, &pduIndex);
+ break;
+ case FAPI_PBCH_PDU_TYPE:
+ convertDlTtiPbchPdu(macDlTtiPdu.pdu.ssb_pdu, &dlTtiPdu->u.ssb_pdu, &pduIndex);
+ break;
+ }
+ dlTtiPdu->pdu_size = pduIndex;
+ *index += pduIndex;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UE Group Info
+ *
+ * @details
+ *
+ * Function : convertUeGrpInfo
+ *
+ * Functionality:
+ * - Converts UE group info struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UE group info PDU struct
+ * UE sim's UE group info PDU struct
+ * Offset of UE group info struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUeGrpInfo(fapi_ue_info_t macUeInfo, fapi_ue_info_t_ue_sim *ueInfo, uint16_t *pduIndex)
+{
+ uint8_t idx = 0, *pduIdx = NULLP;
+ uint16_t ueInfoIdx = 0;
+
+ FILL_PARAM(macUeInfo.nUe, ueInfo->n_ue, ueInfoIdx);
+ for(idx = 0; idx < macUeInfo.nUe; idx++)
+ {
+ pduIdx = (void *)ueInfo + ueInfoIdx;
+ FILL_PARAM(macUeInfo.pduIdx[idx], *pduIdx, ueInfoIdx);
+ }
+
+ *pduIndex += ueInfoIdx;
+}
+
+/*****************************************************************
+ * @brief Converts DL_TTI.Request
+ *
+ * @details
+ *
+ * Function : convertDlTtiRequest
+ *
+ * Functionality:
+ * - Converts DL_TTI.request from MAC's FAPI version to
+ * UE Simulator's FAPI version.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertDlTtiRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ uint8_t idx = 0;
+ uint16_t index = 0, totalLength = 0;
+ p_fapi_api_queue_elem_t dlTtiReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_dl_tti_req_t *macDlTtiReq = (fapi_dl_tti_req_t *)(dlTtiReqElem +1);
+ fapi_dl_tti_req_t_ue_sim *dlTtiReq = NULLP;
+ fapi_dl_tti_req_pdu_t_ue_sim *dlTtiPdu = NULLP;
+ fapi_ue_info_t_ue_sim *ueInfo = NULLP;
+
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> FAPI_CL: Received DL_TTI.request from MAC");
+#endif
+
+ FAPI_CL_ALLOC(dlTtiReq, MAX_PDU_SIZE);
+ if(!dlTtiReq)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Memory allocation failed for DL_TTI.request");
+ FAPI_CL_FREE(msg, msgLen);
+ }
+
+ memset(dlTtiReq, 0, MAX_PDU_SIZE);
+ FILL_PARAM(1, dlTtiReq->header.numberOfMessagesIncluded, index);
+ FILL_PARAM(handle, dlTtiReq->header.handle, index);
+ FILL_PARAM(macDlTtiReq->header.msg_id, dlTtiReq->header.msg_details.message_type_id, index);
+ index += sizeof(dlTtiReq->header.msg_details.length);
+
+ FILL_PARAM(macDlTtiReq->sfn, dlTtiReq->sfn, index);
+ FILL_PARAM(macDlTtiReq->slot, dlTtiReq->slot, index);
+ FILL_PARAM(macDlTtiReq->nPdus, dlTtiReq->n_pdus, index);
+ FILL_PARAM(MAX_NDLTYPES_DL_TTI_REQ, dlTtiReq->nDlTypes, index);
+ for(idx=0; idx < dlTtiReq->nDlTypes; idx++)
+ FILL_PARAM(0, dlTtiReq->nPDUsOfEachType[idx], index);
+ FILL_PARAM(macDlTtiReq->nGroup, dlTtiReq->n_group, index);
+
+ for(idx = 0; idx < macDlTtiReq->nPdus; idx++)
+ {
+ dlTtiPdu = (void *)dlTtiReq + index;
+ convertDlTtiPdu(macDlTtiReq->pdus[idx], dlTtiPdu, &index);
+ }
+ for(idx = 0; idx < macDlTtiReq->nGroup; idx++)
+ {
+ ueInfo = (void *)dlTtiReq + index;
+ convertUeGrpInfo(macDlTtiReq->ue_grp_info[idx], ueInfo, &index);
+ }
+ totalLength = index;
+ dlTtiReq->header.msg_details.length = totalLength - sizeof(fapi_msg_header_t_ue_sim);
+
+ sendMsgToUeSim(EVT_CNTL_REQUEST, (Data *)dlTtiReq, totalLength);
+ FAPI_CL_FREE(msg, msgLen);
+ FAPI_CL_FREE(dlTtiReq, MAX_PDU_SIZE);
+}
+
+/*******************************************************************
+ *
+ * @brief Convert UL Beamforming PDU
+ *
+ * @details
+ *
+ * Function : convertUlRxBfPdu
+ *
+ * Functionality:
+ * - Converts UL Rx Beamforming PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL Rx Beamformimg PDU struct
+ * UE sim's UL Baemforming struct
+ * Offset of UL Beamforming struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlRxBfPdu(fapi_ul_rx_bmform_pdu_t macBfPdu, fapi_bmform_t *bfPdu, uint16_t *pduIdx)
+{
+ uint8_t itr = 0;
+ uint16_t bfIdx = 0, *beamIdx = NULLP;
+
+ FILL_PARAM(macBfPdu.numPrgs, bfPdu->num_prgs, bfIdx);
+ FILL_PARAM(macBfPdu.prgSize, bfPdu->prg_size, bfIdx);
+ FILL_PARAM(macBfPdu.digBfInterface, bfPdu->dig_bf_interfaces, bfIdx);
+ for(itr = 0; itr < bfPdu->num_prgs; itr++)
+ {
+ beamIdx = (void *)bfPdu + bfIdx;
+ FILL_PARAM(macBfPdu.rx_bfi[itr].beamIdx[0].beamidx, *beamIdx, bfIdx);
+ }
+
+ *pduIdx += bfIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UL TTI PRACH PDU
+ *
+ * @details
+ *
+ * Function : convertUlPrachTtiPdu
+ *
+ * Functionality:
+ * - Converts UL TTI PRACH PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL TTI PRACH PDU struct
+ * UE sim's UL TTI PRACH PDU struct
+ * Offset of UL TTI PRACH PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlTtiPrachPdu(fapi_ul_prach_pdu_t macPrachPdu, fapi_ul_prach_pdu_t_ue_sim *prachPdu, uint16_t *pduIndex)
+{
+ uint16_t prachPduIdx = 0;
+
+ FILL_PARAM(macPrachPdu.physCellId, prachPdu->phys_cell_id, prachPduIdx);
+ FILL_PARAM(macPrachPdu.numPrachOcas, prachPdu->num_prach_ocas, prachPduIdx);
+ FILL_PARAM(macPrachPdu.prachFormat, prachPdu->prach_format, prachPduIdx);
+ FILL_PARAM(macPrachPdu.numRa, prachPdu->indexFdRa, prachPduIdx);
+ FILL_PARAM(macPrachPdu.prachStartSymbol, prachPdu->prach_start_symbol, prachPduIdx);
+ FILL_PARAM(macPrachPdu.numCs, prachPdu->num_cs, prachPduIdx);
+ convertUlRxBfPdu(macPrachPdu.beamforming, &prachPdu->beamforming, &prachPduIdx);
+ //unused fapi_pRACH_Mntnc_param_t pRACH_Mntnc;
+ prachPduIdx += sizeof(fapi_pRACH_Mntnc_param_t);
+
+ *pduIndex += prachPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UL TTI PUSCH PDU
+ *
+ * @details
+ *
+ * Function : convertUlTtiPusch Pdu
+ *
+ * Functionality:
+ * - Converts UL TTI PUSCH PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL TTI PDU struct
+ * UE sim's UL TTI PUSCH PDU struct
+ * Offset of UL TTI PUSCH PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlTtiPuschPdu(fapi_ul_pusch_pdu_t macPuschPdu, fapi_ul_pusch_pdu_t_ue_sim *puschPdu, uint16_t *pduIndex)
+{
+ uint16_t puschPduIdx = 0;
+
+ FILL_PARAM(macPuschPdu.pduBitMap, puschPdu->pdu_bitmap, puschPduIdx);
+ FILL_PARAM(macPuschPdu.rnti, puschPdu->rnti, puschPduIdx);
+ FILL_PARAM(macPuschPdu.handle, puschPdu->handle, puschPduIdx);
+ FILL_PARAM(macPuschPdu.bwpSize, puschPdu->bwp_size, puschPduIdx);
+ FILL_PARAM(macPuschPdu.bwpStart, puschPdu->bwp_start, puschPduIdx);
+ FILL_PARAM(macPuschPdu.subCarrierSpacing, puschPdu->sub_carrier_spacing, puschPduIdx);
+ FILL_PARAM(macPuschPdu.cyclicPrefix, puschPdu->cyclic_prefix, puschPduIdx);
+ FILL_PARAM(macPuschPdu.targetCodeRate, puschPdu->target_code_rate, puschPduIdx);
+ FILL_PARAM(macPuschPdu.qamModOrder, puschPdu->qam_mod_order, puschPduIdx);
+ FILL_PARAM(macPuschPdu.mcsIndex, puschPdu->mcs_index, puschPduIdx);
+ FILL_PARAM(macPuschPdu.mcsTable, puschPdu->mcs_table, puschPduIdx);
+ FILL_PARAM(macPuschPdu.transformPrecoding, puschPdu->transform_precoding, puschPduIdx);
+ FILL_PARAM(macPuschPdu.dataScramblingId, puschPdu->nIdPusch, puschPduIdx);
+ FILL_PARAM(macPuschPdu.nrOfLayers, puschPdu->nr_of_layers, puschPduIdx);
+ FILL_PARAM(macPuschPdu.ulDmrsSymbPos, puschPdu->ul_dmrs_symb_pos, puschPduIdx);
+ FILL_PARAM(macPuschPdu.dmrsConfigType, puschPdu->dmrs_config_type, puschPduIdx);
+ FILL_PARAM(macPuschPdu.ulDmrsScramblingId, puschPdu->ul_dmrs_scrambling_id, puschPduIdx);
+ FILL_PARAM(macPuschPdu.nTpPuschId, puschPdu->pusch_identity, puschPduIdx);
+ FILL_PARAM(macPuschPdu.scid, puschPdu->nScid, puschPduIdx);
+ FILL_PARAM(macPuschPdu.numDmrsCdmGrpsNoData, puschPdu->num_dmrs_cdm_grps_no_data, puschPduIdx);
+ FILL_PARAM(macPuschPdu.dmrsPorts, puschPdu->dmrs_ports, puschPduIdx);
+ FILL_PARAM(macPuschPdu.resourceAlloc, puschPdu->resource_alloc, puschPduIdx);
+ memcpy(puschPdu->rb_bitmap, macPuschPdu.rbBitmap, 36*sizeof(uint8_t));
+ puschPduIdx += 36*sizeof(uint8_t);
+ FILL_PARAM(macPuschPdu.rbStart, puschPdu->rb_start, puschPduIdx);
+ FILL_PARAM(macPuschPdu.rbSize, puschPdu->rb_size, puschPduIdx);
+ FILL_PARAM(macPuschPdu.vrbToPrbMapping, puschPdu->vrb_to_prb_mapping, puschPduIdx);
+ FILL_PARAM(macPuschPdu.frequencyHopping, puschPdu->IntraSlotFrequencyHopping, puschPduIdx);
+ FILL_PARAM(macPuschPdu.txDirectCurrentLocation, puschPdu->tx_direct_current_location, puschPduIdx);
+ FILL_PARAM(macPuschPdu.uplinkFrequencyShift7p5khz, puschPdu->uplink_frequency_shift7p5khz, puschPduIdx);
+ FILL_PARAM(macPuschPdu.startSymbIndex, puschPdu->start_symb_index, puschPduIdx);
+ FILL_PARAM(macPuschPdu.nrOfSymbols, puschPdu->nr_of_symbols, puschPduIdx);
+
+ /* PUSCH Data Info */
+ FILL_PARAM(macPuschPdu.puschData.rvIndex, puschPdu->pusch_data.rv_index, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschData.harqProcessId, puschPdu->pusch_data.harq_process_id, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschData.newDataIndicator, puschPdu->pusch_data.new_data_indicator, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschData.tbSize, puschPdu->pusch_data.tb_size, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschData.numCb, puschPdu->pusch_data.num_cb, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschData.cbPresentAndPosition[0], puschPdu->pusch_data.cb_present_and_position[0], puschPduIdx);
+
+ /* PUSCH UCI */
+ FILL_PARAM(macPuschPdu.puschUci.harqAckBitLength, puschPdu->pusch_uci.harq_ack_bit_length, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschUci.csiPart1BitLength, puschPdu->pusch_uci.csi_part1_bit_length, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschUci.csiPart2BitLength, puschPdu->pusch_uci.flagCsiPart2, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschUci.alphaScaling, puschPdu->pusch_uci.alpha_scaling, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschUci.betaOffsetHarqAck, puschPdu->pusch_uci.beta_offset_harq_ack, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschUci.betaOffsetCsi1, puschPdu->pusch_uci.beta_offset_csi1, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschUci.betaOffsetCsi2, puschPdu->pusch_uci.beta_offset_csi2, puschPduIdx);
+
+ /* PUSCH PTRS */
+ FILL_PARAM(macPuschPdu.puschPtrs.numPtrsPorts, puschPdu->pusch_ptrs.num_ptrs_ports, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsInfo[0].ptrsPortIndex, puschPdu->pusch_ptrs.ptrs_info[0].ptrs_port_index, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsInfo[0].ptrsDmrsPort, puschPdu->pusch_ptrs.ptrs_info[0].ptrs_dmrs_port, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsInfo[0].ptrsReOffset, puschPdu->pusch_ptrs.ptrs_info[0].ptrs_re_offset, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsInfo[1].ptrsPortIndex, puschPdu->pusch_ptrs.ptrs_info[1].ptrs_port_index, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsInfo[1].ptrsDmrsPort, puschPdu->pusch_ptrs.ptrs_info[1].ptrs_dmrs_port, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsInfo[1].ptrsReOffset, puschPdu->pusch_ptrs.ptrs_info[1].ptrs_re_offset, puschPduIdx);
+ puschPduIdx += 10* sizeof(fapi_ptrs_info_t);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsTimeDensity, puschPdu->pusch_ptrs.ptrs_time_density, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ptrsFreqDensity, puschPdu->pusch_ptrs.ptrs_freq_density, puschPduIdx);
+ FILL_PARAM(macPuschPdu.puschPtrs.ulPtrsPower, puschPdu->pusch_ptrs.ul_ptrs_power, puschPduIdx);
+
+ /* DFTS OFDM */
+ FILL_PARAM(macPuschPdu.dftsOfdm.lowPaprGroupNumber, puschPdu->dfts_ofdm.low_papr_group_number, puschPduIdx);
+ FILL_PARAM(macPuschPdu.dftsOfdm.lowPaprSequenceNumber, puschPdu->dfts_ofdm.low_papr_sequence_number, puschPduIdx);
+ FILL_PARAM(macPuschPdu.dftsOfdm.ulPtrsSampleDensity, puschPdu->dfts_ofdm.ul_ptrs_sample_density, puschPduIdx);
+ FILL_PARAM(macPuschPdu.dftsOfdm.ulPtrsTimeDensityTransformPrecoding, puschPdu->dfts_ofdm.ul_ptrs_time_density_transform_precoding, puschPduIdx);
+
+ /* Beamforming */
+ convertUlRxBfPdu(macPuschPdu.beamforming, &puschPdu->beamforming, &puschPduIdx);
+
+ //Unused fapi_pusch_mnt_parms_t puschMntParms;
+ puschPduIdx += sizeof(fapi_pusch_mnt_parms_t);
+ //Unsued fapi_optional_pusch_uci_t optionalPuschUci
+ puschPduIdx += sizeof(fapi_optional_pusch_uci_t);
+
+ *pduIndex += puschPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UL TTI PUCCH PDU
+ *
+ * @details
+ *
+ * Function : convertUlTtiPucchPdu
+ *
+ * Functionality:
+ * - Converts UL TTI PUCCH PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL TTI PUCCH PDU struct
+ * UE sim's UL TTI PUCCH PDU struct
+ * Offset of UL TTI PUCCH PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlTtiPucchPdu(fapi_ul_pucch_pdu_t macPucchPdu, fapi_ul_pucch_pdu_t_ue_sim *pucchPdu, uint16_t *pduIndex)
+{
+ uint16_t pucchPduIdx = 0;
+
+ FILL_PARAM(macPucchPdu.rnti, pucchPdu->rnti, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.handle, pucchPdu->handle, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.bwpSize, pucchPdu->bwp_size, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.bwpStart, pucchPdu->bwp_start, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.subCarrierSpacing, pucchPdu->sub_carrier_spacing, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.cyclicPrefix, pucchPdu->cyclic_prefix, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.formatType, pucchPdu->format_type, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.multiSlotTxIndicator, pucchPdu->multi_slot_tx_indicator, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.pi2Bpsk, pucchPdu->pi2_bpsk, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.prbStart, pucchPdu->prb_start, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.prbSize, pucchPdu->prb_size, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.startSymbolIndex, pucchPdu->start_symbol_index, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.nrOfSymbols, pucchPdu->nr_of_symbols, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.freqHopFlag, pucchPdu->intraSlotFrequencyHopping, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.secondHopPrb, pucchPdu->second_hop_prb, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.groupHopFlag, pucchPdu->pucchGroupHopping, pucchPduIdx);
+ //Obsolete 8 bit
+ pucchPduIdx += sizeof(uint8_t);
+ FILL_PARAM(macPucchPdu.hoppingId, pucchPdu->nIdPucchHopping, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.initialCyclicShift, pucchPdu->initial_cyclic_shift, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.dataScramblingId, pucchPdu->nIdPucchScrambling, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.timeDomainOccIdx, pucchPdu->time_domain_occ_idx, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.preDftOccIdx, pucchPdu->pre_dft_occ_idx, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.preDftOccLen, pucchPdu->pre_dft_occ_len, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.addDmrsFlag, pucchPdu->add_dmrs_flag, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.dmrsScramblingId, pucchPdu->dmrs_scrambling_id, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.dmrsCyclicShift, pucchPdu->dmrs_cyclic_shift, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.srFlag, pucchPdu->sr_flag, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.bitLenHarq, pucchPdu->bit_len_harq, pucchPduIdx);
+ FILL_PARAM(macPucchPdu.bitLenCsiPart1, pucchPdu->csiPart1BitLength, pucchPduIdx);
+
+ convertUlRxBfPdu(macPucchPdu.beamforming, &pucchPdu->beamforming, &pucchPduIdx);
+
+ //Unsued fapi_pucch_mntnnc_params_t pucch_basicextension
+ pucchPduIdx += sizeof(fapi_pucch_mntnnc_params_t);
+ //Unused fapi_uci_part1_part2_t uci_part1_part2;
+ pucchPduIdx += sizeof(fapi_uci_part1_part2_t);
+
+ *pduIndex += pucchPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UL TTI SRS PDU
+ *
+ * @details
+ *
+ * Function : convertUlTtiSrsPdu
+ *
+ * Functionality:
+ * - Converts UL TTI SRS PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL TTI SRS PDU struct
+ * UE sim's UL TTI SRS PDU struct
+ * Offset of SRS PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlTtiSrsPdu(fapi_ul_srs_pdu_t macSrsPdu, fapi_ul_srs_pdu_t_ue_sim *srsPdu, uint16_t *pduIndex)
+{
+ uint16_t srsPduIdx = 0;
+
+ FILL_PARAM(macSrsPdu.rnti, srsPdu->rnti, srsPduIdx);
+ FILL_PARAM(macSrsPdu.handle, srsPdu->handle, srsPduIdx);
+ FILL_PARAM(macSrsPdu.bwpSize, srsPdu->bwp_size, srsPduIdx);
+ FILL_PARAM(macSrsPdu.bwpStart, srsPdu->bwp_start, srsPduIdx);
+ FILL_PARAM(macSrsPdu.subCarrierSpacing, srsPdu->sub_carrier_spacing, srsPduIdx);
+ FILL_PARAM(macSrsPdu.cyclicPrefix, srsPdu->cyclic_prefix, srsPduIdx);
+ FILL_PARAM(macSrsPdu.numAntPorts, srsPdu->num_ant_ports, srsPduIdx);
+ FILL_PARAM(macSrsPdu.numSymbols, srsPdu->num_symbols, srsPduIdx);
+ FILL_PARAM(macSrsPdu.numRepetitions, srsPdu->num_repetitions, srsPduIdx);
+ FILL_PARAM(macSrsPdu.timeStartPosition, srsPdu->time_start_position, srsPduIdx);
+ FILL_PARAM(macSrsPdu.configIndex, srsPdu->config_index, srsPduIdx);
+ FILL_PARAM(macSrsPdu.sequenceId, srsPdu->sequence_id, srsPduIdx);
+ FILL_PARAM(macSrsPdu.bandwidthIndex, srsPdu->bandwidth_index, srsPduIdx);
+ FILL_PARAM(macSrsPdu.combSize, srsPdu->comb_size, srsPduIdx);
+ FILL_PARAM(macSrsPdu.combOffset, srsPdu->comb_offset, srsPduIdx);
+ FILL_PARAM(macSrsPdu.cyclicShift, srsPdu->cyclic_shift, srsPduIdx);
+ FILL_PARAM(macSrsPdu.frequencyPosition, srsPdu->frequency_position, srsPduIdx);
+ FILL_PARAM(macSrsPdu.frequencyShift, srsPdu->frequency_shift, srsPduIdx);
+ FILL_PARAM(macSrsPdu.frequencyHopping, srsPdu->frequency_hopping, srsPduIdx);
+ FILL_PARAM(macSrsPdu.groupOrSequenceHopping, srsPdu->group_or_sequence_hopping, srsPduIdx);
+ FILL_PARAM(macSrsPdu.resourceType, srsPdu->resource_type, srsPduIdx);
+ FILL_PARAM(macSrsPdu.tSrs, srsPdu->t_srs, srsPduIdx);
+ FILL_PARAM(macSrsPdu.tOffset, srsPdu->t_offset, srsPduIdx);
+
+ convertUlRxBfPdu(macSrsPdu.beamforming, &srsPdu->beamforming, &srsPduIdx);
+
+ *pduIndex += srsPduIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UL TTI PDU
+ *
+ * @details
+ *
+ * Function : convertUlTtiPdu
+ *
+ * Functionality:
+ * - Converts UL TTI PDU struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL TTI PDU struct
+ * UE sim's UL TTI PDU struct
+ * Offset of UL TTI PDU struct in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlTtiPdu(fapi_ul_tti_req_pdu_t macUlTtiPdu, fapi_ul_tti_req_pdu_t_ue_sim *ulTtiPdu, uint16_t *index)
+{
+ uint16_t pduIndex = 0;
+
+ FILL_PARAM(macUlTtiPdu.pduType, ulTtiPdu->pdu_type, pduIndex);
+ pduIndex += sizeof(ulTtiPdu->pdu_size);
+ switch(macUlTtiPdu.pduType)
+ {
+ case FAPI_PRACH_PDU_TYPE:
+ convertUlTtiPrachPdu(macUlTtiPdu.pdu.prach_pdu, &ulTtiPdu->u.prach_pdu, &pduIndex);
+ break;
+ case FAPI_PUSCH_PDU_TYPE:
+ convertUlTtiPuschPdu(macUlTtiPdu.pdu.pusch_pdu, &ulTtiPdu->u.pusch_pdu, &pduIndex);
+ break;
+ case FAPI_PUCCH_PDU_TYPE:
+ convertUlTtiPucchPdu(macUlTtiPdu.pdu.pucch_pdu, &ulTtiPdu->u.pucch_pdu, &pduIndex);
+ break;
+ case FAPI_SRS_PDU_TYPE:
+ convertUlTtiSrsPdu(macUlTtiPdu.pdu.srs_pdu, &ulTtiPdu->u.srs_pdu, &pduIndex);
+ break;
+ }
+ ulTtiPdu->pdu_size = pduIndex;
+ *index += pduIndex;
+}
+
+/*****************************************************************
+ * @brief Converts UL_TTI.Request
+ *
+ * @details
+ *
+ * Function : convertUlTtiRequest
+ *
+ * Functionality:
+ * - Converts UL_TTI.request from MAC's FAPI version to
+ * UE Simulator's FAPI version.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlTtiRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ uint8_t idx = 0;
+ uint16_t index = 0, totalLength = 0;
+ p_fapi_api_queue_elem_t ulTtiReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_ul_tti_req_t *macUlTtiReq = (fapi_ul_tti_req_t *)(ulTtiReqElem +1);
+ fapi_ul_tti_req_t_ue_sim *ulTtiReq = NULLP;
+ fapi_ul_tti_req_pdu_t_ue_sim *ulTtiPdu = NULLP;
+
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> FAPI_CL: Received UL_TTI.request from MAC");
+#endif
+
+ FAPI_CL_ALLOC(ulTtiReq, MAX_PDU_SIZE);
+ if(!ulTtiReq)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Memory allocation failed for UL_TTI.request");
+ FAPI_CL_FREE(msg, msgLen);
+ }
+
+ memset(ulTtiReq, 0, MAX_PDU_SIZE);
+ FILL_PARAM(1, ulTtiReq->header.numberOfMessagesIncluded, index);
+ FILL_PARAM(handle, ulTtiReq->header.handle, index);
+ FILL_PARAM(macUlTtiReq->header.msg_id, ulTtiReq->header.msg_details.message_type_id, index);
+ index += sizeof(ulTtiReq->header.msg_details.length);
+
+ FILL_PARAM(macUlTtiReq->sfn, ulTtiReq->sfn, index);
+ FILL_PARAM(macUlTtiReq->slot, ulTtiReq->slot, index);
+ FILL_PARAM(macUlTtiReq->nPdus, ulTtiReq->n_pdus, index);
+ FILL_PARAM(MAX_NUM_UL_TYPES, ulTtiReq->nUlTypes, index);
+ for(idx=0; idx < ulTtiReq->nUlTypes; idx++)
+ FILL_PARAM(0, ulTtiReq->nPDUsOfEachType[idx], index);
+ FILL_PARAM(macUlTtiReq->nGroup, ulTtiReq->n_group, index);
+
+ for(idx = 0; idx < macUlTtiReq->nPdus; idx++)
+ {
+ ulTtiPdu = (void *)ulTtiReq + index;
+ convertUlTtiPdu(macUlTtiReq->pdus[idx], ulTtiPdu, &index);
+ }
+ totalLength = index;
+ ulTtiReq->header.msg_details.length = totalLength - sizeof(fapi_msg_header_t_ue_sim);
+
+ sendMsgToUeSim(EVT_CNTL_REQUEST, (Data *)ulTtiReq, totalLength);
+ FAPI_CL_FREE(msg, msgLen);
+ FAPI_CL_FREE(ulTtiReq, MAX_PDU_SIZE);
+}
+
+/*******************************************************************
+ *
+ * @brief Converts UL_DCI PDU
+ *
+ * @details
+ *
+ * Function : convertUlDciPdu
+ *
+ * Functionality:
+ * -Converts Ul Dci Pdu struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's UL DCI PDU struct
+ * UE sim's UL DCI PDU struct
+ * Offset of PDU in its parent structure
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlDciPdu(fapi_dci_pdu_t macUlDciPdu, fapi_dci_pdu_t_ue_sim *ulDciPdu, uint16_t *index)
+{
+ uint16_t dciPduIdx = 0;
+
+ FILL_PARAM(macUlDciPdu.pduType, ulDciPdu->pdu_type, dciPduIdx);
+ dciPduIdx += sizeof(ulDciPdu->pdu_size);
+ convertDlPdcchPdu(macUlDciPdu.pdcchPduConfig, &ulDciPdu->pdcch_pdu, &dciPduIdx);
+ ulDciPdu->pdu_size = dciPduIdx;
+
+ *index += dciPduIdx;
+}
+
+/* ****************************************************************
+ * @details Converts UL_DCI.request
+ *
+ * Function : convertUlDciRequest
+ *
+ * Functionality:
+ * -Converts UL_DCI.request from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] Cell ID
+ * Message Pointer
+ * Message Length
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUlDciRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ uint8_t idx = 0;
+ uint16_t index = 0, totalLength = 0;
+ p_fapi_api_queue_elem_t ulDciReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_ul_dci_req_t *macUlDciReq = (fapi_ul_dci_req_t *)(ulDciReqElem +1);
+ fapi_ul_dci_req_t_ue_sim *ulDciReq = NULLP;
+ fapi_dci_pdu_t_ue_sim *ulDciPdu = NULLP;
+
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> FAPI_CL: Received UL_DCI.request from MAC");
+#endif
+
+ FAPI_CL_ALLOC(ulDciReq, MAX_PDU_SIZE);
+ if(!ulDciReq)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Memory allocation failed for UL_DCI.request");
+ FAPI_CL_FREE(msg, msgLen);
+ }
+
+ memset(ulDciReq, 0, MAX_PDU_SIZE);
+ FILL_PARAM(1, ulDciReq->header.numberOfMessagesIncluded, index);
+ FILL_PARAM(handle, ulDciReq->header.handle, index);
+ FILL_PARAM(macUlDciReq->header.msg_id, ulDciReq->header.msg_details.message_type_id, index);
+ index += sizeof(ulDciReq->header.msg_details.length);
+
+ FILL_PARAM(macUlDciReq->sfn, ulDciReq->sfn, index);
+ FILL_PARAM(macUlDciReq->slot, ulDciReq->slot, index);
+ FILL_PARAM(macUlDciReq->numPdus, ulDciReq->num_pdus, index);
+ FILL_PARAM(MAX_NDLTYPES_UL_DCI_REQ, ulDciReq->nDlTypes, index);
+ for(idx=0; idx < ulDciReq->nDlTypes; idx++)
+ FILL_PARAM(0, ulDciReq->nPDUsOfEachType[idx], index);
+
+ for(idx = 0; idx < macUlDciReq->numPdus; idx++)
+ {
+ ulDciPdu = (void *)ulDciReq + index;
+ convertUlDciPdu(macUlDciReq->pdus[idx], ulDciPdu, &index);
+ }
+ totalLength = index;
+ ulDciReq->header.msg_details.length = totalLength - sizeof(fapi_msg_header_t_ue_sim);
+
+ sendMsgToUeSim(EVT_CNTL_REQUEST, (Data *)ulDciReq, totalLength);
+ FAPI_CL_FREE(msg, msgLen);
+ FAPI_CL_FREE(ulDciReq, MAX_PDU_SIZE);
+}
+
+/*******************************************************************
+ *
+ * @brief Converts TX_DATA PDU's TLV
+ *
+ * @details
+ *
+ * Function : convertTxDataTlv
+ *
+ * Functionality:
+ * -Converts TxData Pdu Tlv struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's Tx Data PDU TLV struct
+ * UE sim's Tx Data PDU TLV struct
+ * Offset of TLV in its parent structure
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertTxDataTlv(fapi_uint8_ptr_tlv_t macTxDataTlv, fapi_tx_dat_tlv_t *txDataTlv, uint16_t *pduIndex)
+{
+ uint16_t tlvIndex = 0;
+ uint32_t *tlvValue = NULLP;
+
+ /* UE sim supports only tag = 0.
+ * for more information please refer to 5G FAPI: PHY API
+ * Specification(Version: 222.10.03)doc.. 3.4.6 section.*/
+ FILL_PARAM(0, txDataTlv->tag, tlvIndex);
+
+ /* Removing the extra header length (added as per requirement of Intel L1) that was added at lower mac */
+ FILL_PARAM((macTxDataTlv.tl.length - TX_PAYLOAD_HDR_LEN), txDataTlv->length, tlvIndex);
+
+ /* Copying the actual payload */
+ tlvValue = (void *)txDataTlv + tlvIndex;
+ memcpy(tlvValue, (macTxDataTlv.value + TX_PAYLOAD_HDR_LEN), txDataTlv->length);
+ tlvIndex += txDataTlv->length;
+
+ FAPI_CL_FREE(macTxDataTlv.value, macTxDataTlv.tl.length);
+
+ *pduIndex += tlvIndex;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts TX_DATA PDU
+ *
+ * @details
+ *
+ * Function : convertTxDataPdu
+ *
+ * Functionality:
+ * -Converts TxData Pdu struct from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] MAC's Tx Data PDU struct
+ * UE sim's Tx Data PDU struct
+ * Offset of PDU in its parent structure
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertTxDataPdu(fapi_tx_pdu_desc_t macTxDataPdu, fapi_tx_pdu_desc_t_ue_sim *txDataPdu, uint16_t *index)
+{
+ uint8_t idx = 0;
+ uint16_t pduIndex = 0;
+ fapi_tx_dat_tlv_t *tlv = NULLP;
+
+ pduIndex += sizeof(txDataPdu->pduLength); // value of txDataPdu->pduLength will be filled at the end
+ FILL_PARAM(macTxDataPdu.pdu_index, txDataPdu->pduIndex, pduIndex);
+ FILL_PARAM(0, txDataPdu->cwIndex, pduIndex);
+ FILL_PARAM(macTxDataPdu.num_tlvs, txDataPdu->numTlvs, pduIndex);
+
+ for(idx = 0; idx < macTxDataPdu.num_tlvs; idx++)
+ {
+ tlv = (void *)txDataPdu + pduIndex;
+ convertTxDataTlv(macTxDataPdu.tlvs[idx], tlv, &pduIndex);
+ }
+ txDataPdu->pduLength = pduIndex;
+ *index += pduIndex;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts TX_DATA.request
+ *
+ * @details
+ *
+ * Function : convertTxDataRequest
+ *
+ * Functionality:
+ * -Converts TX_DATA.request from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] Cell ID
+ * Message Pointer
+ * Message Length
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertTxDataRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ uint8_t idx = 0;
+ uint16_t index = 0, totalLength = 0;
+ p_fapi_api_queue_elem_t txDataReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_tx_data_req_t *macTxDataReq = (fapi_tx_data_req_t *)(txDataReqElem +1);
+ fapi_tx_data_req_t_ue_sim *txDataReq = NULLP;
+ fapi_tx_pdu_desc_t_ue_sim *txDataPdu = NULLP;
+
+ DU_LOG("\nDEBUG --> FAPI_CL: Received TX_DATA.request from MAC");
+
+ FAPI_CL_ALLOC(txDataReq, MAX_PDU_SIZE);
+ if(!txDataReq)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Memory allocation failed for TX_DATA.request");
+ FAPI_CL_FREE(msg, msgLen);
+ }
+
+ memset(txDataReq, 0, MAX_PDU_SIZE);
+ FILL_PARAM(1, txDataReq->header.numberOfMessagesIncluded, index);
+ FILL_PARAM(handle, txDataReq->header.handle, index);
+ FILL_PARAM(macTxDataReq->header.msg_id, txDataReq->header.msg_details.message_type_id, index);
+ index += sizeof(txDataReq->header.msg_details.length);
+
+ FILL_PARAM(macTxDataReq->sfn, txDataReq->sfn, index);
+ FILL_PARAM(macTxDataReq->slot, txDataReq->slot, index);
+ FILL_PARAM(macTxDataReq->num_pdus, txDataReq->numPdus, index);
+
+ for(idx = 0; idx < macTxDataReq->num_pdus; idx++)
+ {
+ txDataPdu = (void *)txDataReq + index;
+ convertTxDataPdu(macTxDataReq->pdu_desc[idx], txDataPdu, &index);
+ }
+ totalLength = index;
+ txDataReq->header.msg_details.length = totalLength - sizeof(fapi_msg_header_t_ue_sim);
+
+ sendMsgToUeSim(EVT_DATA_REQUEST, (Data *)txDataReq, totalLength);
+ FAPI_CL_FREE(msg, msgLen);
+ FAPI_CL_FREE(txDataReq, MAX_PDU_SIZE);
+}
+
+/*******************************************************************
+ *
+ * @brief Converts STOP.request
+ *
+ * @details
+ *
+ * Function : convertStopRequest
+ *
+ * Functionality:
+ * -Converts STOP.request from MAC's FAPI
+ * version to UE Simulator's FAPI version.
+ *
+ * @params[in] Cell ID
+ * Message Pointer
+ * Message Length
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertStopRequest(uint8_t handle, void *msg, uint16_t msgLen)
+{
+ p_fapi_api_queue_elem_t stopReqElem = (p_fapi_api_queue_elem_t)msg;
+ fapi_stop_req_t *macStopReq = (fapi_stop_req_t *)(stopReqElem +1);
+ fapi_stop_req_t_ue_sim stopReq;
+
+ DU_LOG("\nDEBUG --> FAPI_CL: Received STOP.request from MAC");
+
+ memset(&stopReq, 0, sizeof(fapi_stop_req_t_ue_sim));
+ stopReq.header.numberOfMessagesIncluded = 1;
+ stopReq.header.handle = handle;
+ stopReq.header.msg_details.message_type_id = macStopReq->header.msg_id;
+ stopReq.header.msg_details.length = sizeof(fapi_stop_req_t_ue_sim) - sizeof(fapi_msg_header_t_ue_sim);
+
+ FAPI_CL_FREE(msg, msgLen);
+
+ sendMsgToUeSim(EVT_CNTL_REQUEST, (Data *)&stopReq, sizeof(fapi_stop_req_t_ue_sim));
+}
+
+/*******************************************************************
+ *
+ * @brief Receives message from MAC and call appropriate handler
+ *
+ * @details
+ *
+ * Function : fapiClProcessMac2UeSimFapiMsg
+ *
+ * Functionality:
+ * - Receives message from MAC and calls appropriate handler
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+
+void fapiClProcessMac2UeSimFapiMsg(void *msg)
+{
+ uint8_t handle = 0;
+ uint16_t msgLen =0;
+ p_fapi_api_queue_elem_t currMsg = NULLP;
+ p_fapi_api_queue_elem_t nextMsg = NULLP;
+
+ currMsg = (p_fapi_api_queue_elem_t)msg;
+ while(currMsg)
+ {
+ nextMsg = currMsg->p_next;
+ msgLen = currMsg->msg_len + sizeof(fapi_api_queue_elem_t);
+ if(currMsg->msg_type == FAPI_VENDOR_MSG_HEADER_IND)
+ {
+ handle = ((fapi_msg_header_t *)(currMsg +1))->handle;
+ FAPI_CL_FREE(currMsg, msgLen);
+ }
+ else if(currMsg->msg_type == FAPI_VENDOR_MESSAGE)
+ {
+ FAPI_CL_FREE(currMsg, msgLen);
+ }
+ else
+ {
+ switch(currMsg->msg_type)
+ {
+ case FAPI_CONFIG_REQUEST:
+ convertConfigRequest(handle, currMsg, msgLen);
+ break;
+ case FAPI_START_REQUEST:
+ convertStartRequest(handle, currMsg, msgLen);
+ break;
+ case FAPI_DL_TTI_REQUEST:
+ convertDlTtiRequest(handle, currMsg, msgLen);
+ break;
+ case FAPI_UL_TTI_REQUEST:
+ convertUlTtiRequest(handle, currMsg, msgLen);
+ break;
+ case FAPI_UL_DCI_REQUEST:
+ convertUlDciRequest(handle, currMsg, msgLen);
+ break;
+ case FAPI_TX_DATA_REQUEST:
+ convertTxDataRequest(handle, currMsg, msgLen);
+ break;
+ case FAPI_STOP_REQUEST:
+ clCb.slotIndInfo.slotIndicationStarted = false;
+ FAPI_CL_FREE(currMsg, msgLen);
+ break;
+ default:
+ DU_LOG("\nERROR --> FAPI_CL: Invalid message id [%d] from MAC", currMsg->msg_type);
+ }
+ }
+ currMsg = nextMsg;
+ }
+}
+
+/**********************************************************************
+ End of file
+ **********************************************************************/
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+/* This file converts FAPI messages sent from UE simulator/PHY to MAC */
+
+#include "common_def.h"
+#include "fapi_cl.h"
+#include "fapi_cl_utils.h"
+#include "fapi_interface_ue_sim.h"
+#include "fapi_interface.h"
+#include "fapi_vendor_extension.h"
+#include "lwr_mac_fapi_cl_inf.h"
+
+void procPhyMessages(uint16_t msgType, uint32_t msgSize, void *msg);
+
+/*******************************************************************
+ *
+ * @brief Converts CONFIG.Response
+ *
+ * @details
+ *
+ * Function : convertConfigResponse
+ *
+ * Functionality:
+ * - Converts CONFIG.response from UE sim's FAPI version to
+ * Mac's FAPI version.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertConfigResponse(void *msg)
+{
+ uint16_t idx, numTlvs;
+ fapi_config_resp_t *macCfgRsp = NULLP;
+ fapi_config_resp_t_ue_sim *cfgRsp = (fapi_config_resp_t_ue_sim *)msg;
+
+ DU_LOG("\nINFO --> FAPI_CL: Received CONFIG.response from UE simulator");
+
+ FAPI_CL_ALLOC(macCfgRsp, sizeof(fapi_config_resp_t));
+ if(!macCfgRsp)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for config response");
+ return;
+ }
+ macCfgRsp->header.msg_id = FAPI_CONFIG_RESPONSE;
+ macCfgRsp->header.length = sizeof(fapi_config_resp_t) - sizeof(fapi_msg_t);
+ macCfgRsp->error_code = cfgRsp->error_code;
+ macCfgRsp->number_of_invalid_tlvs = cfgRsp->number_of_invalid_tlvs;
+ macCfgRsp->number_of_inv_tlvs_idle_only = cfgRsp->number_of_inv_tlvs_idle_only;
+ macCfgRsp->number_of_inv_tlvs_running_only = cfgRsp->number_of_inv_tlvs_running_only;
+ macCfgRsp->number_of_missing_tlvs = cfgRsp->number_of_missing_tlvs;
+ numTlvs = macCfgRsp->number_of_invalid_tlvs + macCfgRsp->number_of_inv_tlvs_idle_only + \
+ macCfgRsp->number_of_inv_tlvs_running_only + macCfgRsp->number_of_missing_tlvs;
+ for(idx = 0; idx < numTlvs; idx++)
+ {
+ macCfgRsp->tlvs[idx].tl.tag = cfgRsp->tlvs[idx].tl.tag;
+ macCfgRsp->tlvs[idx].tl.length = cfgRsp->tlvs[idx].tl.length;
+ macCfgRsp->tlvs[idx].value = cfgRsp->tlvs[idx].value;
+ }
+ procPhyMessages(macCfgRsp->header.msg_id, sizeof(fapi_config_resp_t), (void *)macCfgRsp);
+ FAPI_CL_FREE(macCfgRsp, sizeof(fapi_config_resp_t));
+}
+
+/*******************************************************************
+*
+* @brief Builds and sends FAPI Slot indication to MAC
+*
+* @details
+*
+* Function : buildAndSendSlotIndication
+*
+* Functionality:
+* - Builds and sends FAPI Slot indication to MAC
+*
+* @params[in]
+* @return ROK - success
+* RFAILED - failure
+*
+* ****************************************************************/
+uint8_t buildAndSendSlotIndication()
+{
+ Pst pst;
+ Buffer *mBuf;
+ fapi_slot_ind_t *slotIndMsg;
+
+ FAPI_CL_ALLOC_SHRABL_BUF(slotIndMsg, sizeof(fapi_slot_ind_t));
+ if(!slotIndMsg)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Memory allocation failed for slot Indication Message");
+ return RFAILED;
+ }
+ else
+ {
+ memset(slotIndMsg, 0, sizeof(fapi_slot_ind_t));
+ slotIndMsg->sfn = clCb.slotIndInfo.currSfn;
+ slotIndMsg->slot = clCb.slotIndInfo.currSlot;
+ slotIndMsg->header.msg_id = FAPI_SLOT_INDICATION;
+ slotIndMsg->header.length = sizeof(fapi_slot_ind_t) - sizeof(fapi_msg_t);
+
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\n\nDEBUG --> FAPI_CL: Sending Slot Indication [%d : %d] to MAC", slotIndMsg->sfn, slotIndMsg->slot);
+#endif
+
+ /* increment for the next TTI */
+ clCb.slotIndInfo.currSlot++;
+ if(clCb.slotIndInfo.currSlot >= MAX_SLOTS)
+ {
+ clCb.slotIndInfo.currSlot = 0;
+ clCb.slotIndInfo.currSfn++;
+ if(clCb.slotIndInfo.currSfn >= MAX_SFN)
+ clCb.slotIndInfo.currSfn = 0;
+ }
+
+ memset(&pst, 0, sizeof(Pst));
+ FILL_PST_FAPI_CL_TO_LWR_MAC(pst, FAPI_CL_INST_1, 0, EVT_FAPI_CL_SLOT_IND);
+ ODU_GET_MSG_BUF(pst.region, pst.pool, &mBuf);
+ if(!mBuf)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for slot indication buffer");
+ FAPI_CL_FREE_SHRABL_BUF(pst.region, pst.pool, slotIndMsg, sizeof(fapi_slot_ind_t));
+ return RFAILED;
+ }
+ CMCHKPK(oduPackPointer, (PTR)slotIndMsg, mBuf);
+ ODU_POST_TASK(&pst, mBuf);
+ }
+ return ROK;
+}
+
+/*******************************************************************
+ *
+ * @brief Converts STOP.indication
+ *
+ * @details
+ *
+ * Function : convertStopIndication
+ *
+ * Functionality:
+ * - Converts STOP.indication from UE sim's FAPI version to
+ * Mac's FAPI version.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void buildAndSendStopIndication()
+{
+ Pst pst;
+ Buffer *mBuf;
+ fapi_stop_ind_t *macStopInd = NULLP;
+
+ DU_LOG("\nINFO --> FAPI_CL: Sending STOP.indication to MAC");
+
+ FAPI_CL_ALLOC_SHRABL_BUF(macStopInd, sizeof(fapi_stop_ind_t));
+ if(!macStopInd)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Memory allocation failed for stop Indication Message");
+ return;
+ }
+ else
+ {
+ memset(macStopInd, 0, sizeof(fapi_stop_ind_t));
+ macStopInd->header.msg_id = FAPI_STOP_INDICATION;
+ macStopInd->header.length = sizeof(fapi_stop_ind_t) - sizeof(fapi_msg_t);
+
+ memset(&pst, 0, sizeof(Pst));
+ FILL_PST_FAPI_CL_TO_LWR_MAC(pst, FAPI_CL_INST_1, 0, EVT_FAPI_CL_STOP_IND);
+ ODU_GET_MSG_BUF(pst.region, pst.pool, &mBuf);
+ if(!mBuf)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for stop indication buffer");
+ FAPI_CL_FREE_SHRABL_BUF(pst.region, pst.pool, macStopInd, sizeof(fapi_stop_ind_t));
+ return;
+ }
+ CMCHKPK(oduPackPointer, (PTR)macStopInd, mBuf);
+ ODU_POST_TASK(&pst, mBuf);
+ }
+}
+
+/*******************************************************************
+*
+* @brief Generates ticks periodically
+*
+* @details
+*
+* Function : generateTicks
+*
+* Functionality:
+* - Generates ticks periodically
+*
+* @params[in]
+* @return NULL
+*
+* ****************************************************************/
+void* generateTicks()
+{
+ float milisec = 1; /* 1ms */
+ struct timespec req = {0};
+ uint8_t ratio = 2;
+ uint16_t counter = 0;
+
+ clCb.slotIndInfo.currSfn = 0;
+ clCb.slotIndInfo.currSlot = 0;
+ clCb.slotIndInfo.slotIndicationStarted = true;
+ req.tv_sec = 0;
+
+ /* Currently the code takes longer that one slot indication to execute.
+ * Hence, multiplying slot time interval by 2 in order to give enough time
+ * for L2 to complete one slot processing.
+ * The ratio must be removed once code optimization is complete */
+ req.tv_nsec = milisec * 1000000L * ratio;
+
+ DU_LOG("\nINFO --> FAPI_CL: Starting to generate slot indications");
+
+ while(clCb.slotIndInfo.slotIndicationStarted)
+ //while(counter <=100)
+ {
+ clock_nanosleep(CLOCK_REALTIME, 0, &req, NULL);
+ /* Send Slot indication indication to lower mac */
+ if(buildAndSendSlotIndication() != ROK)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: generateTicks(): Failed to build and send Slot Indication");
+ break;
+ }
+ counter++;
+ }
+
+ DU_LOG("\nINFO --> FAPI_CL: Slot indication stopped");
+ buildAndSendStopIndication();
+ return 0;
+}
+
+/*******************************************************************
+*
+* @brief Sends Start_slot_ind request to self
+*
+* @details
+*
+* Function : sendStartSlotIndReq
+*
+* Functionality:
+* - Sends Start_slot_ind request to self
+*
+* @params[in]
+* @return
+*
+* ****************************************************************/
+void sendStartSlotIndReq()
+{
+ Pst pst;
+ Buffer *mBuf = NULLP;
+
+ DU_LOG("\nINFO --> FAPI_CL: Sending start slot indication event to self");
+ memset(&pst, 0, sizeof(Pst));
+ FILL_PST_CL_TO_CL(pst, FAPI_CL_INST_0, FAPI_CL_INST_1, EVT_FAPI_CL_START_SLOT_IND);
+ ODU_GET_MSG_BUF(pst.region, pst.pool, &mBuf);
+ ODU_POST_TASK(&pst, mBuf);
+}
+
+/*******************************************************************
+ *
+ * @brief Process START.Response
+ *
+ * @details
+ *
+ * Function : processStartResponse
+ *
+ * Functionality:
+ * - Calls the handler to start sending slot indication to MAC
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertStartResponse(void *msg)
+{
+ DU_LOG("\nINFO --> FAPI_CL: Received START.response from UE simulator");
+ sendStartSlotIndReq();
+}
+
+/*******************************************************************
+ *
+ * @brief Process RACH.Indication
+ *
+ * @details
+ *
+ * Function : convertRachIndication
+ *
+ * Functionality:
+ * - Converts STOP.indication from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertRachIndication(void *msg)
+{
+ uint8_t pduIdx = 0, preambleIdx = 0;
+ fapi_rach_indication_t *macRachInd = NULLP;
+ fapi_rach_indication_t_ue_sim *rachInd = (fapi_rach_indication_t_ue_sim *)msg;
+
+ DU_LOG("\nINFO --> FAPI_CL: Received RACH.indication from UE simulator");
+
+ FAPI_CL_ALLOC(macRachInd, sizeof(fapi_rach_indication_t));
+ if(!macRachInd)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for RACH.indication");
+ return;
+ }
+
+ macRachInd->header.msg_id = FAPI_RACH_INDICATION;
+ macRachInd->header.length = sizeof(fapi_rach_indication_t) - sizeof(fapi_msg_t);
+ macRachInd->sfn = rachInd->sfn;
+ macRachInd->slot = rachInd->slot;
+ macRachInd->numPdus = rachInd->numPdus;
+
+ for(pduIdx = 0; pduIdx < rachInd->numPdus; pduIdx++)
+ {
+ macRachInd->rachPdu[pduIdx].phyCellId = rachInd->rachPdu[pduIdx].handle;
+ macRachInd->rachPdu[pduIdx].symbolIndex = rachInd->rachPdu[pduIdx].symbolIndex;
+ macRachInd->rachPdu[pduIdx].slotIndex = rachInd->rachPdu[pduIdx].slotIndex;
+ macRachInd->rachPdu[pduIdx].freqIndex = rachInd->rachPdu[pduIdx].raIndex;
+ macRachInd->rachPdu[pduIdx].avgRssi = rachInd->rachPdu[pduIdx].avgRssi;
+ macRachInd->rachPdu[pduIdx].avgSnr = rachInd->rachPdu[pduIdx].avgSnr;
+ macRachInd->rachPdu[pduIdx].numPreamble = rachInd->rachPdu[pduIdx].numPreamble;
+ for(preambleIdx = 0; preambleIdx<macRachInd->rachPdu[pduIdx].numPreamble; preambleIdx++)
+ {
+ macRachInd->rachPdu[pduIdx].preambleInfo[preambleIdx].preambleIndex = rachInd->rachPdu[pduIdx].preambleInfo[preambleIdx].preambleIndex;
+ macRachInd->rachPdu[pduIdx].preambleInfo[preambleIdx].timingAdvance = rachInd->rachPdu[pduIdx].preambleInfo[preambleIdx].timingAdvance;
+ macRachInd->rachPdu[pduIdx].preambleInfo[preambleIdx].preamblePwr = rachInd->rachPdu[pduIdx].preambleInfo[preambleIdx].premblePwr;
+ }
+ }
+
+ procPhyMessages(macRachInd->header.msg_id, sizeof(fapi_rach_indication_t), (void *)macRachInd);
+ FAPI_CL_FREE(macRachInd, sizeof(fapi_rach_indication_t));
+}
+
+/*******************************************************************
+ *
+ * @brief Process CRC.Indication
+ *
+ * @details
+ *
+ * Function : convertCrcIndication
+ *
+ * Functionality:
+ * - Converts CRC.indication from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertCrcIndication(void *msg)
+{
+ uint8_t crcIdx = 0, cbIdx = 0;
+ fapi_crc_ind_t *macCrcInd = NULLP;
+ fapi_crc_ind_t_ue_sim *crcInd = (fapi_crc_ind_t_ue_sim *)msg;
+
+ DU_LOG("\nINFO --> FAPI_CL: Received CRC.indication from UE simulator");
+
+ FAPI_CL_ALLOC(macCrcInd, sizeof(fapi_crc_ind_t));
+ if(!macCrcInd)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for CRC.indication");
+ return;
+ }
+
+ macCrcInd->header.msg_id = FAPI_CRC_INDICATION;
+ macCrcInd->header.length = sizeof(fapi_crc_ind_t) - sizeof(fapi_msg_t);
+ macCrcInd->sfn = crcInd->sfn;
+ macCrcInd->slot = crcInd->slot;
+ macCrcInd->numCrcs = crcInd->num_crcs;
+
+ for(crcIdx = 0; crcIdx < macCrcInd->numCrcs; crcIdx++)
+ {
+ macCrcInd->crc[crcIdx].handle = crcInd->crc[crcIdx].handle;
+ macCrcInd->crc[crcIdx].rnti = crcInd->crc[crcIdx].rnti;
+ macCrcInd->crc[crcIdx].harqId = crcInd->crc[crcIdx].harq_id;
+ macCrcInd->crc[crcIdx].tbCrcStatus = crcInd->crc[crcIdx].tb_crc_status;
+ macCrcInd->crc[crcIdx].ul_cqi = crcInd->crc[crcIdx].ul_cqi;
+ macCrcInd->crc[crcIdx].numCb = crcInd->crc[crcIdx].num_cb;
+ macCrcInd->crc[crcIdx].timingAdvance = crcInd->crc[crcIdx].timing_advance;
+ macCrcInd->crc[crcIdx].rssi = crcInd->crc[crcIdx].rssi;
+
+ for(cbIdx = 0; cbIdx < ceil(macCrcInd->crc[crcIdx].numCb/8); cbIdx++)
+ macCrcInd->crc[crcIdx].cbCrcStatus[cbIdx] = crcInd->crc[crcIdx].cb_crc_status[cbIdx];
+ }
+
+ procPhyMessages(macCrcInd->header.msg_id, sizeof(fapi_crc_ind_t), (void *)macCrcInd);
+ FAPI_CL_FREE(macCrcInd, sizeof(fapi_crc_ind_t));
+}
+
+/*******************************************************************
+ *
+ * @brief Process UCI PUSCH
+ *
+ * @details
+ *
+ * Function : convertUciPusch
+ *
+ * Functionality:
+ * - Converts UCI PUSCH from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] MAC's UCI PUSCH structure
+ * UE Sim's UCI PUSCH structure
+ * Offset of UCI PUSCH structure in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUciPusch(fapi_uci_o_pusch_t *macUciPusch, fapi_uci_o_pusch_t_ue_sim uciPusch, uint16_t *pduSize)
+{
+ uint8_t byteLen = 0;
+ uint16_t uciPuschIdx = 0;
+
+ FILL_PARAM(uciPusch.handle, macUciPusch->handle, uciPuschIdx);
+ FILL_PARAM(uciPusch.pdu_bitmap, macUciPusch->pduBitmap, uciPuschIdx);
+ FILL_PARAM(uciPusch.ul_cqi, macUciPusch->ul_cqi, uciPuschIdx);
+ FILL_PARAM(uciPusch.rnti, macUciPusch->rnti, uciPuschIdx);
+ FILL_PARAM(uciPusch.timing_advance, macUciPusch->timingAdvance, uciPuschIdx);
+ FILL_PARAM(uciPusch.rssi, macUciPusch->rssi, uciPuschIdx);
+
+ FILL_PARAM(uciPusch.harqInfo.harq_crc, macUciPusch->harqInfo.harqCrc, uciPuschIdx);
+ FILL_PARAM(uciPusch.harqInfo.harq_bit_len, macUciPusch->harqInfo.harqBitLen, uciPuschIdx);
+ byteLen = macUciPusch->harqInfo.harqBitLen/8;
+ if((macUciPusch->harqInfo.harqBitLen % 8) != 0)
+ byteLen += 1;
+ memcpy(macUciPusch->harqInfo.harqPayload, uciPusch.harqInfo.harq_payload, byteLen);
+ uciPuschIdx += byteLen;
+
+ FILL_PARAM(uciPusch.csiPart1info.csi_part1_crc, macUciPusch->csiPart1info.csiPart1Crc, uciPuschIdx);
+ FILL_PARAM(uciPusch.csiPart1info.csi_part1_bit_len, macUciPusch->csiPart1info.csiPart1BitLen, uciPuschIdx);
+ byteLen = macUciPusch->csiPart1info.csiPart1BitLen/8;
+ if((macUciPusch->csiPart1info.csiPart1BitLen % 8) != 0)
+ byteLen += 1;
+ memcpy(macUciPusch->csiPart1info.csiPart1Payload, uciPusch.csiPart1info.csi_part1_payload, byteLen);
+ uciPuschIdx += byteLen;
+
+ FILL_PARAM(uciPusch.csiPart2info.csi_part2_crc, macUciPusch->csiPart2info.csiPart2Crc, uciPuschIdx);
+ FILL_PARAM(uciPusch.csiPart2info.csi_part2_bit_len, macUciPusch->csiPart2info.csiPart2BitLen, uciPuschIdx);
+ byteLen = macUciPusch->csiPart2info.csiPart2BitLen/8;
+ if((macUciPusch->csiPart2info.csiPart2BitLen % 8) != 0)
+ byteLen += 1;
+ memcpy(macUciPusch->csiPart2info.csiPart2Payload, uciPusch.csiPart2info.csi_part2_payload, byteLen);
+ uciPuschIdx += byteLen;
+
+ *pduSize += uciPuschIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Process UCI PUCCH F0 F1
+ *
+ * @details
+ *
+ * Function : convertUciPucchF0F1
+ *
+ * Functionality:
+ * - Converts UCI PUCCH F0 F1 from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] MAC's UCI PUCCH F0 F1 structure
+ * UE Sim's UCI PUCCH F0 F1 structure
+ * Offset of UCI PUCCH F0 F1 in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUciPucchF0F1(fapi_uci_o_pucch_f0f1_t *macUciPucchF0F1, fapi_uci_o_pucch_f0f1_t_ue_sim uciPucchF0F1, uint16_t *pduSize)
+{
+ uint16_t uciPucchIdx = 0;
+
+ FILL_PARAM(uciPucchF0F1.handle, macUciPucchF0F1->handle, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.pdu_bitmap, macUciPucchF0F1->pduBitmap, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.pucch_format, macUciPucchF0F1->pucchFormat, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.ul_cqi, macUciPucchF0F1->ul_cqi, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.rnti, macUciPucchF0F1->rnti, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.timing_advance, macUciPucchF0F1->timingAdvance, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.rssi, macUciPucchF0F1->rssi, uciPucchIdx);
+
+ FILL_PARAM(uciPucchF0F1.srInfo.sr_indication, macUciPucchF0F1->srInfo.srIndication, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.srInfo.sr_confidence_level, macUciPucchF0F1->srInfo.srConfidenceLevel, uciPucchIdx);
+
+ FILL_PARAM(uciPucchF0F1.harqInfo.num_harq, macUciPucchF0F1->harqInfo.numHarq, uciPucchIdx);
+ FILL_PARAM(uciPucchF0F1.harqInfo.harq_confidence_level, macUciPucchF0F1->harqInfo.harqConfidenceLevel, uciPucchIdx);
+ memcpy(macUciPucchF0F1->harqInfo.harqValue, uciPucchF0F1.harqInfo.harq_value, sizeof(uint8_t) * macUciPucchF0F1->harqInfo.numHarq);
+ uciPucchIdx += sizeof(uint8_t) * macUciPucchF0F1->harqInfo.numHarq;
+
+ *pduSize += uciPucchIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Process UCI PUCCH F2 F3 F4
+ *
+ * @details
+ *
+ * Function : convertUciPucchF2F3F4
+ *
+ * Functionality:
+ * - Converts UCI PUCCH F2F3F4 from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] MAC's UCI PUCCH F2F3F4 structure
+ * UE Sim's UCI PUCCH F2F3F4 structure
+ * Offset of UCI PUCCH F2F3F4 structure in its parent struct
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUciPucchF2F3F4(fapi_uci_o_pucch_f2f3f4_t *macUciPucchF2F3F4, fapi_uci_o_pucch_f2f3f4_t_ue_sim uciPucchF2F3F4, uint16_t *pduSize)
+{
+ uint16_t uciPucchIdx = 0;
+
+ FILL_PARAM(uciPucchF2F3F4.handle, macUciPucchF2F3F4->handle, uciPucchIdx);
+ FILL_PARAM(uciPucchF2F3F4.pdu_bitmap, macUciPucchF2F3F4->pduBitmap, uciPucchIdx);
+ FILL_PARAM(uciPucchF2F3F4.pucch_format, macUciPucchF2F3F4->pucchFormat, uciPucchIdx);
+ FILL_PARAM(uciPucchF2F3F4.ul_cqi, macUciPucchF2F3F4->ul_cqi, uciPucchIdx);
+ FILL_PARAM(uciPucchF2F3F4.rnti, macUciPucchF2F3F4->rnti, uciPucchIdx);
+ FILL_PARAM(uciPucchF2F3F4.timing_advance, macUciPucchF2F3F4->timingAdvance, uciPucchIdx);
+ FILL_PARAM(uciPucchF2F3F4.rssi, macUciPucchF2F3F4->rssi, uciPucchIdx);
+
+ // TODO : Fill UCI Bits
+
+ *pduSize += uciPucchIdx;
+}
+
+/*******************************************************************
+ *
+ * @brief Process UCI.Indication
+ *
+ * @details
+ *
+ * Function : convertUciIndication
+ *
+ * Functionality:
+ * - Converts UCI.indication from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertUciIndication(void *msg)
+{
+ uint8_t uciIdx = 0;
+ uint16_t pduSize = 0;
+ uint32_t offset = 0;
+ fapi_uci_indication_t *macUciInd = NULLP;
+ fapi_uci_indication_t_ue_sim *uciInd = (fapi_uci_indication_t_ue_sim *)msg;
+ fapi_uci_pdu_info_t_ue_sim *pdu = NULLP;
+
+ DU_LOG("\nINFO --> FAPI_CL: Received UCI.indication from UE simulator");
+
+ FAPI_CL_ALLOC(macUciInd, sizeof(fapi_uci_indication_t));
+ if(!macUciInd)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for UCI.indication");
+ return;
+ }
+
+ macUciInd->header.msg_id = FAPI_UCI_INDICATION;
+ macUciInd->header.length = sizeof(fapi_uci_indication_t) - sizeof(fapi_msg_t);
+ macUciInd->sfn = uciInd->sfn;
+ macUciInd->slot = uciInd->slot;
+ macUciInd->numUcis = uciInd->num_ucis;
+ offset = sizeof(fapi_uci_indication_t_ue_sim);
+
+ for(uciIdx = 0; uciIdx < macUciInd->numUcis; uciIdx++)
+ {
+ pdu = (void *)uciInd + offset;
+ FILL_PARAM(pdu->pdu_type, macUciInd->uciPdu[uciIdx].pduType, pduSize);
+ pduSize += sizeof(macUciInd->uciPdu[uciIdx].pduSize);
+ switch (macUciInd->uciPdu[uciIdx].pduType)
+ {
+ case UCI_PUSCH:
+ convertUciPusch(&macUciInd->uciPdu[uciIdx].uci.uciPusch, pdu->u.uci_pusch, &pduSize);
+ break;
+ case UCI_PUCCH_F0_F1:
+ convertUciPucchF0F1(&macUciInd->uciPdu[uciIdx].uci.uciPucchF0F1, pdu->u.uci_pucch_f0f1, &pduSize);
+ break;
+ case UCI_PUCCH_F2_F3_F4:
+ convertUciPucchF2F3F4(&macUciInd->uciPdu[uciIdx].uci.uciPucchF2F3F4, pdu->u.uci_pucch_f2f3f4, &pduSize);
+ break;
+ }
+ macUciInd->uciPdu[uciIdx].pduSize = pduSize;
+ offset += pdu->pdu_size;
+ }
+
+ procPhyMessages(macUciInd->header.msg_id, sizeof(fapi_uci_indication_t), (void *)macUciInd);
+ FAPI_CL_FREE(macUciInd, sizeof(fapi_uci_indication_t));
+}
+
+/*******************************************************************
+ *
+ * @brief Process SRS.Indication
+ *
+ * @details
+ *
+ * Function : convertSrsIndication
+ *
+ * Functionality:
+ * - Converts SRS.indication from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertSrsIndication(void *msg)
+{
+ uint8_t srsIdx = 0, symbIdx = 0, rbIdx = 0;
+ fapi_srs_indication_t *macSrsInd = NULLP;
+ fapi_srs_indication_t_ue_sim *srsInd = (fapi_srs_indication_t_ue_sim *)msg;
+
+ DU_LOG("\nINFO --> FAPI_CL: Received SRS.indication from UE simulator");
+
+ FAPI_CL_ALLOC(macSrsInd, sizeof(fapi_srs_indication_t));
+ if(!macSrsInd)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for SRS.indication");
+ return;
+ }
+
+ macSrsInd->header.msg_id = FAPI_SRS_INDICATION;
+ macSrsInd->header.length = sizeof(fapi_srs_indication_t) - sizeof(fapi_msg_t);
+ macSrsInd->sfn = srsInd->sfn;
+ macSrsInd->slot = srsInd->slot;
+ macSrsInd->numPdus = srsInd->numPdus;
+
+ for(srsIdx = 0; srsIdx < macSrsInd->numPdus; srsIdx++)
+ {
+ macSrsInd->srsPdus[srsIdx].handle = srsInd->srsPdus[srsIdx].handle;
+ macSrsInd->srsPdus[srsIdx].rnti = srsInd->srsPdus[srsIdx].rnti;
+ macSrsInd->srsPdus[srsIdx].timingAdvance = srsInd->srsPdus[srsIdx].timingAdvance;
+ macSrsInd->srsPdus[srsIdx].numSymbols = srsInd->srsPdus[srsIdx].numSymbols;
+ macSrsInd->srsPdus[srsIdx].wideBandSnr = srsInd->srsPdus[srsIdx].wideBandSnr;
+ macSrsInd->srsPdus[srsIdx].numReportedSymbols = srsInd->srsPdus[srsIdx].numReportedSymbols;
+ for(symbIdx = 0; symbIdx < macSrsInd->srsPdus[srsIdx].numReportedSymbols; symbIdx++)
+ {
+ macSrsInd->srsPdus[srsIdx].symbSnr[symbIdx].numRbs = srsInd->srsPdus[srsIdx].symbSnr[symbIdx].numRbs;
+ for(rbIdx = 0; rbIdx < macSrsInd->srsPdus[srsIdx].symbSnr[symbIdx].numRbs; rbIdx++)
+ macSrsInd->srsPdus[srsIdx].symbSnr[symbIdx].rbSNR[rbIdx] = srsInd->srsPdus[srsIdx].symbSnr[symbIdx].rbSNR[rbIdx];
+ }
+ }
+
+ procPhyMessages(macSrsInd->header.msg_id, sizeof(fapi_srs_indication_t), (void *)macSrsInd);
+ FAPI_CL_FREE(macSrsInd, sizeof(fapi_srs_indication_t));
+}
+
+
+/*******************************************************************
+ *
+ * @brief Process RX_DATA.Indication
+ *
+ * @details
+ *
+ * Function : convertRxDataIndication
+ *
+ * Functionality:
+ * - Converts RX_DATA.indication from UE sim's FAPI version to
+ * Mac's FAPI version
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void convertRxDataIndication(void *msg)
+{
+ uint8_t pduIdx = 0;
+ uint16_t offset = 0;
+ fapi_rx_data_indication_t *macRxDataInd = NULLP;
+ fapi_rx_data_indication_t_ue_sim *rxDataInd = (fapi_rx_data_indication_t_ue_sim *)msg;
+ uint8_t *rxDataPdu = NULLP;
+
+ DU_LOG("\nINFO --> FAPI_CL: Received RX_DATA.indication from UE simulator");
+
+ FAPI_CL_ALLOC(macRxDataInd, sizeof(fapi_rx_data_indication_t));
+ if(!macRxDataInd)
+ {
+ DU_LOG("\nERROR --> FAPI_CL: Failed to allocate memory for RX_DATA.indication");
+ return;
+ }
+
+ macRxDataInd->header.msg_id = FAPI_RX_DATA_INDICATION;
+ macRxDataInd->header.length = sizeof(fapi_rx_data_indication_t) - sizeof(fapi_msg_t);
+ offset += sizeof(rxDataInd->header);
+ FILL_PARAM(rxDataInd->sfn, macRxDataInd->sfn, offset);
+ FILL_PARAM(rxDataInd->slot, macRxDataInd->slot, offset);
+ FILL_PARAM(rxDataInd->num_pdus, macRxDataInd->numPdus, offset);
+
+ for(pduIdx = 0; pduIdx < macRxDataInd->numPdus; pduIdx++)
+ {
+ FILL_PARAM(rxDataInd->pdus[pduIdx].handle, macRxDataInd->pdus[pduIdx].handle, offset);
+ FILL_PARAM(rxDataInd->pdus[pduIdx].rnti, macRxDataInd->pdus[pduIdx].rnti, offset);
+ FILL_PARAM(rxDataInd->pdus[pduIdx].harq_id, macRxDataInd->pdus[pduIdx].harqId, offset);
+ FILL_PARAM(rxDataInd->pdus[pduIdx].ul_cqi, macRxDataInd->pdus[pduIdx].ul_cqi, offset);
+ FILL_PARAM(rxDataInd->pdus[pduIdx].timing_advance, macRxDataInd->pdus[pduIdx].timingAdvance, offset);
+ FILL_PARAM(rxDataInd->pdus[pduIdx].rssi, macRxDataInd->pdus[pduIdx].rssi, offset);
+ FILL_PARAM(rxDataInd->pdus[pduIdx].pdu_length, macRxDataInd->pdus[pduIdx].pdu_length, offset);
+
+ rxDataPdu = (uint8_t *) ((void *)rxDataInd + offset);
+ FAPI_CL_ALLOC(macRxDataInd->pdus[pduIdx].pduData, macRxDataInd->pdus[pduIdx].pdu_length);
+ memcpy(macRxDataInd->pdus[pduIdx].pduData, rxDataPdu, macRxDataInd->pdus[pduIdx].pdu_length);
+ offset += macRxDataInd->pdus[pduIdx].pdu_length;
+ }
+
+ procPhyMessages(macRxDataInd->header.msg_id, sizeof(fapi_rx_data_indication_t), (void *)macRxDataInd);
+ FAPI_CL_FREE(macRxDataInd, sizeof(fapi_rx_data_indication_t));
+}
+
+/*******************************************************************
+ *
+ * @brief Call appropriate handler for FAPI message from UE sim
+ *
+ * @details
+ *
+ * Function : fapiClProcessUeSim2MacFapiMsg
+ *
+ * Functionality:
+ * - Calls appropriate handler based on message type for
+ * message sent from UE simulator to MAC.
+ *
+ * @params[in] Message pointer
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void fapiClProcessUeSim2MacFapiMsg(Data *msg)
+{
+ uint8_t numMsg = 0;
+ fapi_msg_header_t_ue_sim *msgHdr = (fapi_msg_header_t_ue_sim *)msg;
+
+ while(numMsg < msgHdr->numberOfMessagesIncluded)
+ {
+ switch(msgHdr->msg_details.message_type_id)
+ {
+ case FAPI_CONFIG_RESPONSE:
+ convertConfigResponse(msg);
+ break;
+ case FAPI_START_RESPONSE:
+ convertStartResponse(msg);
+ break;
+ case FAPI_RACH_INDICATION:
+ convertRachIndication(msg);
+ break;
+ case FAPI_CRC_INDICATION:
+ convertCrcIndication(msg);
+ break;
+ case FAPI_RX_DATA_INDICATION:
+ convertRxDataIndication(msg);
+ break;
+ case FAPI_UCI_INDICATION:
+ convertUciIndication(msg);
+ break;
+ case FAPI_SRS_INDICATION:
+ convertSrsIndication(msg);
+ break;
+ case FAPI_STOP_INDICATION:
+ clCb.slotIndInfo.slotIndicationStarted = false;
+ break;
+ default:
+ DU_LOG("\nERROR --> FAPI_CL: Invalid message type id [%d] in header", msgHdr->msg_details.message_type_id);
+ }
+ numMsg++;
+ }
+}
+
+/**********************************************************************
+ End of file
+ **********************************************************************/
--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+#define CL_MEM_REGION 8
+#define CL_POOL 0
+
+#ifdef ODU_MEMORY_DEBUG_LOG
+#define FAPI_CL_MEM_LOG(_macro, _file, _line, _func, _size, _datPtr)\
+{\
+ printf("\n%s=== %s +%d, %s, %d, %p\n", \
+ _macro, _file, _line, _func, _size, _datPtr); \
+}
+#else
+#define FAPI_CL_MEM_LOG(_macro, _file, _line, _func, _size, _dataPtr) {}
+#endif
+
+/* allocate and zero out a MAC static buffer */
+#define FAPI_CL_ALLOC(_datPtr, _size) \
+{ \
+ uint8_t _ret; \
+ _ret = SGetSBuf(CL_MEM_REGION, CL_POOL, \
+ (Data **)&_datPtr, _size); \
+ if(_ret == ROK) \
+ { \
+ memset(_datPtr, 0, _size); \
+ FAPI_CL_MEM_LOG("FAPI_CL_ALLOC", __FILE__, __LINE__, __FUNCTION__, _size, _datPtr);\
+ } \
+ else \
+ { \
+ _datPtr = NULLP; \
+ } \
+}
+
+/* free a static buffer */
+#define FAPI_CL_FREE(_datPtr, _size) \
+{ \
+ if(_datPtr) \
+ { \
+ FAPI_CL_MEM_LOG("FAPI_CL_FREE", __FILE__, __LINE__, __FUNCTION__, _size, _datPtr);\
+ SPutSBuf(CL_MEM_REGION, CL_POOL, \
+ (Data *)_datPtr, _size); \
+ _datPtr = NULLP; \
+ } \
+}
+
+/* Allocate shared memory to be used for LWLC
+ * during inter-layer communication */
+#define FAPI_CL_ALLOC_SHRABL_BUF(_buf, _size) \
+{ \
+ if(SGetStaticBuffer(CL_MEM_REGION, CL_POOL, \
+ (Data **)&_buf, (Size) _size, 0) == ROK) \
+ { \
+ FAPI_CL_MEM_LOG("FAPI_CL_ALLOC_SHRABL_BUF", __FILE__, __LINE__, __FUNCTION__, _size, _buf);\
+ memset((_buf), 0, _size); \
+ } \
+ else \
+ { \
+ (_buf) = NULLP; \
+ } \
+}
+
+/* Free shared memory, received through LWLC */
+#define FAPI_CL_FREE_SHRABL_BUF(_region, _pool,_buf, _size) \
+{ \
+ if (_buf != NULLP) \
+ { \
+ FAPI_CL_MEM_LOG("FAPI_CL_FREE_SHRABL_BUF", __FILE__, __LINE__, __FUNCTION__, _size, _buf);\
+ (Void) SPutStaticBuffer(_region, _pool, \
+ (Data *) _buf, (Size) _size, 0); \
+ _buf = NULLP; \
+ } \
+}
+
+/* Fill Pst structure for sending msg from FAPI CL to Lower MAC */
+#define FILL_PST_FAPI_CL_TO_LWR_MAC(_pst, _srcInst, _dstInst, _event) \
+{ \
+ _pst.selector = ODU_SELECTOR_LWLC; \
+ _pst.srcEnt = ENTFAPICL; \
+ _pst.dstEnt = ENTLWRMAC; \
+ _pst.dstInst = _dstInst; \
+ _pst.srcInst = _srcInst; \
+ _pst.dstProcId = ODU_GET_PROCID(); \
+ _pst.srcProcId = ODU_GET_PROCID(); \
+ _pst.region = CL_MEM_REGION; \
+ _pst.pool = CL_POOL; \
+ _pst.event = _event; \
+ _pst.route = 0; \
+ _pst.prior = 0; \
+ _pst.intfVer = 0; \
+}
+
+/* Fill Pst structure for sending msg from fapi cl to self */
+#define FILL_PST_CL_TO_CL(_pst, _srcInst, _dstInst, _event) \
+{ \
+ _pst.selector = ODU_SELECTOR_LWLC; \
+ _pst.srcEnt = ENTFAPICL; \
+ _pst.dstEnt = ENTFAPICL; \
+ _pst.dstInst = _dstInst; \
+ _pst.srcInst = _srcInst; \
+ _pst.dstProcId = ODU_GET_PROCID(); \
+ _pst.srcProcId = ODU_GET_PROCID(); \
+ _pst.region = CL_MEM_REGION; \
+ _pst.pool = CL_POOL; \
+ _pst.event = _event; \
+ _pst.route = 0; \
+ _pst.prior = 0; \
+ _pst.intfVer = 0; \
+}
+
+/**********************************************************************
+ End of file
+ **********************************************************************/
--- /dev/null
+// This file has been modified by Radisys in order to support 5G FAPI:PHY API Specification
+// Document 222.10.01 dated June 2019
+// Changes made by luis.farias@intel.com
+// Document 222.10.03 dated May 2021
+
+#include <stdint.h>
+
+#ifndef _FAPI_INTERFACE_UE_SIM_H_
+#define _FAPI_INTERFACE_UE_SIM_H_
+
+#ifndef PACK_STRUCT
+#define PACK_STRUCT __attribute__((packed)) // Packed compiler instruction.
+#endif //PACK_STRUCT
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+typedef int16_t int16_t;
+typedef uint16_t uint16_t;
+typedef int32_t int32_t;
+typedef uint32_t uint32_t;
+#ifdef VZ_VERIPHY_INTEG
+typedef uint64_t uint64_t;
+#endif
+
+// Update for 5G FAPI
+#define FAPI_PARAM_REQUEST 0x00
+#define FAPI_PARAM_RESPONSE 0x01
+#define FAPI_CONFIG_REQUEST 0x02
+#define FAPI_CONFIG_RESPONSE 0x03
+#define FAPI_START_REQUEST 0x04
+#ifdef FAPI_222_10_03
+#define FAPI_START_RESPONSE 0x0108 //Ref: SCF-225
+#endif
+#define FAPI_STOP_REQUEST 0x05
+#define FAPI_STOP_INDICATION 0x06
+#define FAPI_ERROR_INDICATION 0x07
+// Reserved 0x08 - 0x7f
+#define FAPI_DL_TTI_REQUEST 0x80
+#define FAPI_UL_TTI_REQUEST 0x81
+#define FAPI_SLOT_INDICATION 0x82
+#define FAPI_UL_DCI_REQUEST 0x83
+#define FAPI_TX_DATA_REQUEST 0x84
+#define FAPI_RX_DATA_INDICATION 0x85
+#define FAPI_CRC_INDICATION 0x86
+#define FAPI_UCI_INDICATION 0x87
+#define FAPI_SRS_INDICATION 0x88
+#define FAPI_RACH_INDICATION 0x89
+// Reserved 0x8a -0xff
+#ifdef FAPI_222_10_03
+#define FAPI_DL_NODE_SYNC 0x0180 //Ref: SCF-225
+#define FAPI_UL_NODE_SYNC 0x0181 //Ref: SCF-225
+#define FAPI_TIMING_INFO 0x0182 //Ref: SCF-225
+#endif
+// Tags per 5G FAPI
+// Cell Parameters
+#define FAPI_RELEASE_CAPABILITY_TAG 0x0001
+#define FAPI_PHY_STATE_TAG 0x0002
+#define FAPI_SKIP_BLANK_DL_CONFIG_TAG 0x0003
+#define FAPI_SKIP_BLANK_UL_CONFIG_TAG 0x0004
+#define FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG 0x0005
+#define FAPI_CYCLIC_PREFIX_TAG 0x0006
+// PDCCH Parameters
+#define FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG 0x0007
+#define FAPI_SUPPORTED_BANDWIDTH_DL_TAG 0x0008
+#define FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG 0x0009
+#define FAPI_SUPPORTED_BANDWIDTH_UL_TAG 0x000A
+#define FAPI_CCE_MAPPING_TYPE_TAG 0x000B
+#define FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000c
+#define FAPI_PRECODER_GRANULARITY_CORESET_TAG 0x000d
+#define FAPI_PDCCH_MU_MIMO_TAG 0x000e
+#define FAPI_PDCCH_PRECODER_CYCLING_TAG 0x000f
+#define FAPI_MAX_PDCCHS_PER_SLOT_TAG 0x0010
+// PUCCH Parameters
+#define FAPI_PUCCH_FORMATS_TAG 0x0011
+#define FAPI_MAX_PUCCHS_PER_SLOT_TAG 0x0012
+// PDSCH Parameters
+#define FAPI_PDSCH_MAPPING_TYPE_TAG 0x0013
+#define FAPI_PDSCH_ALLOCATION_TYPES_TAG 0x0014
+#define FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015
+#define FAPI_PDSCH_CBG_TAG 0x0016
+#define FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017
+#define FAPI_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018
+#define FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019
+#define FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG 0x001a
+#define FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001b
+#define FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001c
+#define FAPI_MAX_MU_MIMO_USERS_DL_TAG 0x001d
+#define FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001e
+#define FAPI_PREMPTIONSUPPORT_TAG 0x001f
+#define FAPI_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020
+// PUSCH Parameters
+#define FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021
+#define FAPI_UCI_ONLY_PUSCH_TAG 0x0022
+#define FAPI_PUSCH_FREQUENCY_HOPPING_TAG 0x0023
+#define FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024
+#define FAPI_PUSCH_DMRS_MAX_LEN_TAG 0x0025
+#define FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026
+#define FAPI_PUSCH_CBG_TAG 0x0027
+#define FAPI_PUSCH_MAPPING_TYPE_TAG 0x0028
+#define FAPI_PUSCH_ALLOCATION_TYPES_TAG 0x0029
+#define FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002a
+#define FAPI_PUSCH_MAX_PTRS_PORTS_TAG 0x002b
+#define FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002c
+#define FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002d
+#define FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002e
+#define FAPI_MAX_MU_MIMO_USERS_UL_TAG 0x002f
+#define FAPI_DFTS_OFDM_SUPPORT_TAG 0x0030
+#define FAPI_PUSCH_AGGREGATION_FACTOR_TAG 0x0031
+// PRACH Parameters
+#define FAPI_PRACH_LONG_FORMATS_TAG 0x0032
+#define FAPI_PRACH_SHORT_FORMATS_TAG 0x0033
+#define FAPI_PRACH_RESTRICTED_SETS_TAG 0x0034
+#define FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035
+// Measurement Parameters
+#define FAPI_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036
+
+// CONFIG TLV TAGS per 5G FAPI
+#ifdef FAPI_222_10_03
+// PHY Configuration
+#define FAPI_PHY_PROFILE_ID_TAG 0x102a
+#define FAPI_INDICATION_INSTANCES_PER_SLOT_TAG 0x102b
+#define FAPI_REQUEST_INSTANCES_PER_SLOT_TAG 0x102c
+// Carrier Configuration
+#define FAPI_CARRIER_CONFIGURATION_TAG 0x102d
+#else
+#define FAPI_DL_BANDWIDTH_TAG 0x1001
+#define FAPI_DL_FREQUENCY_TAG 0x1002
+#define FAPI_DL_K0_TAG 0x1003
+#define FAPI_DL_GRIDSIZE_TAG 0x1004
+#define FAPI_NUM_TX_ANT_TAG 0x1005
+#define FAPI_UPLINK_BANDWIDTH_TAG 0x1006
+#define FAPI_UPLINK_FREQUENCY_TAG 0x1007
+#define FAPI_UL_K0_TAG 0x1008
+#define FAPI_UL_GRID_SIZE_TAG 0x1009
+#define FAPI_NUM_RX_ANT_TAG 0x100a
+#define FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG 0x100b
+#endif
+// Cell Configuration
+#define FAPI_PHY_CELL_ID_TAG 0x100c
+#define FAPI_FRAME_DUPLEX_TYPE_TAG 0x100d
+#ifdef FAPI_222_10_03
+#define FAPI_PDSCH_TRANS_TYPE_VALIDITY_TAG 0x102e
+#define FAPI_PUSCH_TRANS_TYPE_VALIDITY_TAG 0x102f
+#endif
+// SSB Configuration
+#define FAPI_SS_PBCH_POWER_TAG 0x100e
+#ifdef FAPI_222_10_03
+#define FAPI_SS_PBCH_BLOCK_POWER_SCALING_TAG 0x1030
+#define FAPI_BCH_PAYLOAD_FLAG_TAG 0x100f
+#else
+#define FAPI_BCH_PAYLOAD_TAG 0x100f
+#define FAPI_SCS_COMMON_TAG 0x1010
+#endif
+// PRACH Configuration
+#ifdef FAPI_222_10_03
+#define FAPI_PRACH_CONFIGURATION_TAG 0x1031
+#else
+#define FAPI_PRACH_SEQUENCE_LENGTH_TAG 0x1011
+#define FAPI_PRACH_SUBC_SPACING_TAG 0x1012
+#define FAPI_RESTRICTED_SET_CONFIG_TAG 0x1013
+#define FAPI_NUM_PRACH_FD_OCCASIONS_TAG 0x1014
+#define FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015
+#define FAPI_NUM_ROOT_SEQUENCES_TAG 0x1016
+#define FAPI_K1_TAG 0x1017
+#define FAPI_PRACH_ZERO_CORR_CONF_TAG 0x1018
+#define FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019
+#define FAPI_UNUSED_ROOT_SEQUENCES_TAG 0x101a
+#define FAPI_SSB_PER_RACH_TAG 0x101b
+#define FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101c
+#endif
+#ifdef FAPI_222_10_03
+//Multi PRACH Configurations
+#define FAPI_MULTI_PRACH_CONFIGURATION_TAG 0x1032
+// SSB Table
+#define FAPI_SSB_RESOURCE_CONFIGURATION_TAG 0x1033
+#else
+#define FAPI_SSB_OFFSET_POINT_A_TAG 0x101d
+#define FAPI_BETA_PSS_TAG 0x101e
+#define FAPI_SSB_PERIOD_TAG 0x101f
+#define FAPI_SSB_SUBCARRIER_OFFSET_TAG 0x1020
+#define FAPI_MIB_TAG 0x1021
+#define FAPI_SSB_MASK_TAG 0x1022
+#define FAPI_BEAM_ID_TAG 0x1023
+#define FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024
+#define FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025
+#endif
+
+#ifdef FAPI_222_10_03
+//Multi SSB Resource Configurations
+#define FAPI_MULTI_SSB_RESOURCE_CONFIGURATION_TAG 0x1034
+
+// TDD Table
+#define FAPI_TDD_PERIOD_TAG 0x1035
+#else
+#define FAPI_TDD_PERIOD_TAG 0x1026
+#define FAPI_SLOT_CONFIG_TAG 0x1027
+#endif
+// Measurement Configuration
+#define FAPI_RSSI_MESUREMENT_TAG 0x1028
+#define FAPI_PRACH_CONFIG_INDEX_TAG 0x1029
+#ifdef FAPI_222_10_03
+// UCI Configuration
+#define FAPI_UCI_CONFIGURATION_TAG 0x1036
+// PRB-Symbol Rate Match Patterns
+#define FAPI_PRB_SYMBOL_RATE_MATCH_PATTERN_TAG 0x0137
+// LTE-CRS Rate Match Pattern
+#define FAPI_LTE_CRS_RATE_MATCH_PATTERN_TAG 0x0138
+// PUCCH semi-static configuration
+#define FAPI_PUCCH_SEMI_STATIC_CONFIG_TAG 0x1039
+// PDSCH Semi-Static Configuration
+#define FAPI_PDSCH_CBG_SCHEME 0x103a
+// Delay Management Configuration
+#define FAPI_TIMING_WINDOW_TAG 0x011e
+#define FAPI_TIMING_INFO_MODE_TAG 0x011f
+#define FAPI_TIMING_INFO_PERIOD_TAG 0x0120
+// reserve 0x0f00
+//Rel-16 mTRP Configurations
+#define FAPI_NUM_TX_PORTS_TRP1_TAG 0x103b
+#define FAPI_NUM_RX_PORTS_TRP1_TAG 0x103c
+#endif
+//Vendor Specific Tags
+#define FAPI_NUM_DIG_BEAMS 0xA000
+#define FAPI_NUM_TX_RUS 0xA001
+#define FAPI_BEAM_IDX 0xA002
+#define FAPI_DIG_BEAM_WEIGHT_RE 0xA003
+#define FAPI_DIG_BEAM_WEIGHT_IM 0xA004
+#define FAPI_PM_IDX 0xA005
+#define FAPI_NUM_LAYERS 0xA006
+#define FAPI_NUM_ANT_PORTS 0xA007
+#define FAPI_PRECODER_WEIGHT_RE 0xA008
+#define FAPI_PRECODER_WEIGHT_IM 0xA009
+// Error Codes updated per 5G FAPI Table 3-31
+#define FAPI_MSG_OK 0x0
+#define FAPI_MSG_INVALID_STATE 0x1
+#define FAPI_MSG_INVALID_CONFIG 0x2
+#define FAPI_MSG_SFN_OUT_OF_SYNC 0x3
+#define FAPI_MSG_SLOT_ERR 0x4
+#define FAPI_MSG_BCH_MISSING 0x5
+#define FAPI_MSG_INVALID_SFN 0x6
+#define FAPI_MSG_UL_DCI_ERR 0x7
+#define FAPI_MSG_TX_ERR 0x8
+#ifdef FAPI_222_10_03
+#define MSG_INVALID_PHY_ID 0x9
+#define MSG_UNINSTANTIATED_PHY 0xA
+#define MSG_INVALID_DFE_Profile 0xB
+#define PHY_Profile_Selection_incompatible 0xC
+#endif
+#define FAPI_MAX_NUM_CW 1
+#define FAPI_MAX_FREQ_DOMAIN_RES 6
+
+#ifdef FAPI_222_10_03
+#define FAPI_PROTOCOLVERSION_TAG 0X0037
+#define FAPI_POWER_PROFILES_SUPPORTED_TAG 0X0038
+#define FAPI_MAXNUMPDUS_INDL_TTI_TAG 0X0039
+#define FAPI_MAXNUMPDUS_INUL_TTI_TAG 0X003A
+#define FAPI_MAXNUMPDUS_INUL_DCI_TAG 0X003B
+#define FAPI_SSPBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x003C
+#define FAPI_MULTIPLE_CELLS_SSPBCH_IN_A_CARRIER_TAG 0x003D
+#define FAPI_PUCCHGROUP_AND_SEQUENCE_HOPPING_TAG 0x003E
+#define FAPI_MAXNUM_UlBWPIDS_TAG 0x003F
+#define FAPI_PUCCH_AGGREGATION_TAG 0x0040
+#define FAPI_SSB_RATE_MATCH_TAG 0x0041
+#define FAPI_SUPPORTED_RATE_MATCH_PATTERN_TYPE_TAG 0x0042
+#define FAPI_PDCCH_RATE_MATCH_TAG 0x0043
+#define FAPI_NUM_OF_RATE_MATCH_PATTERNLTECRCPERSLOT_TAG 0x0044
+#define FAPI_NUMOFRATE_MATCH_PATTERN_LTECRC_INPHY_TAG 0x0045
+#define FAPI_CSI_RS_RATE_MATCH_TAG 0x0046
+#define FAPI_PDSCH_TRANS_TYPE_SUPPORT_TAG 0x0047
+#define FAPI_PDSCH_MAC_PDU_BIT_ALIGNMENT_TAG 0x0048
+#define FAPI_MAX_NUMBER_MIMO_LAYERS_CB_PUSCH_TAG 0x0049
+#define FAPI_PUSCH_LBRM_SUPPORT_TAG 0x004A
+#define FAPI_PUSCH_TRANS_TYPE_SUPPORT_TAG 0x004B
+#define FAPI_PUSCH_MAC_PDU_BIT_ALIGNMENT_TAG 0x004C
+#define FAPI_MAXNUM_PRACH_CONFIGURATIONS_TAG 0x004D
+#define FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_Band_TAG 0x004E
+#define FAPI_MAX_NUM_UCIMAPS_TAG 0x004F
+#define FAPI_CAPABILITY_VALIDITY_TAG 0x0050
+#define FAPI_PHY_PARAMS_TAG 0x0051
+#define FAPI_TIME_MANAGEMENT_TAG 0x0052
+#define FAPI_PHY_PROTOCOL_VERSION_TAG 0x0053
+#define FAPI_DFE_PROFILE_TAG 0x0054
+#define FAPI_MORE_THAN_ONE_INDICATION_PER_SLOT_TAG 0x0055
+#define FAPI_MORE_THAN_ONE_REQUEST_PER_SLOT_TAG 0x0056
+#define FAPI_MTRP_SUPPORT_TAG 0x0057
+#define FAPI_DL_TTI_TIMING_OFFSET_TAG 0X0106
+#define FAPI_UL_TTI_TIMING_OFFSET_TAG 0X0107
+#define FAPI_UL_DCI_TIMING_OFFSET_TAG 0X0108
+#define FAPI_TX_DATA_TIMING_OFFSET_TAG 0X0109
+#endif
+// TODO : Work out what the correct maximums should be// Needs Review for 5G
+#if 0
+// Number of UL/DL configurations, I, as defined by 36.212 section 5.3.3.1.4
+// todo : work out what the max is
+#define FAPI_MAX_UL_DL_CONFIGURATIONS 4
+#define FAPI_MAX_NUM_PHYSICAL_ANTENNAS 4
+#define FAPI_MAX_NUM_SCHEDULED_UES 8
+#define FAPI_MAX_NUM_SUBBANDS 8
+#define FAPI_MAX_ANTENNA_PORT_COUNT 2
+#endif
+
+// 5G FAPI Definitions
+#define NUMEROLOGIES 5
+#define MAX_NUM_UNUSED_ROOT_SEQUENCES 63 // 38.331 page 383
+#define MAX_NUM_PRACH_FD_OCCASIONS 64 // 38.331 page 383
+#define MAX_NUM_OF_SYMBOLS_PER_SLOT 14
+#define MAX_TDD_PERIODICITY 160// 38.212 11.1 for u = 4 and P=10 ms
+#define MAX_NUMBER_TX_RUS 4 // m = p*q with p number of panels and q number of TxRU/RxRU per panel, depends on
+// the RF configuration, currently n = m = 4, q = 1, p = 4 and k = 21 (number of beams per pannel). n number of antenna ports
+#define MAX_NUMBER_OF_BEAMS 64 // Intel API Page 27
+#define MAX_NUM_ANT_PORTS 8 // Based on current RF
+#define MAX_NUM_LAYERS 8 // 38.211 Table 7.3.1.3-1
+#ifdef VZ_VERIPHY_INTEG
+#define MAX_NUM_TLVS_CELL_CONFIG 46 // 5G FAPI Table 3-9 (A)
+#else
+#define MAX_NUM_TLVS_CELL_CONFIG 2 // 5G FAPI Table 3-9 (A)
+#endif
+#define MAX_NUM_TLVS_CARRIER_CONFIG 27 // 5G FAPI Table 3-10 (B)
+#define MAX_NUM_TLVS_PDCCH_CONFIG 6 // 5G FAPI Table 3-11 (C)
+#define MAX_NUM_TLVS_PUCCH_CONFIG 2 // 5G FAPI Table 3-12 (D)
+#define MAX_NUM_TLVS_PDSCH_CONFIG 14 // 5G FAPI Table 3-13 (E)
+#define MAX_NUM_TLVS_PUSCH_CONFIG 17 // 5G FAPI Table 3-14 (F)
+#define MAX_NUM_TLVS_PRACH_CONFIG 4 // 5G FAPI Table 3-15 (G)
+#define MAX_NUM_TLVS_MEAS_CONFIG 1 // 5G FAPI Table 3-16 (H)
+#ifdef VZ_VERIPHY_INTEG
+#define MAX_NUM_TLVS_CONFIG 117 // A+B+C+D+E+F+G+H + Padding
+#else
+#define MAX_NUM_TLVS_CONFIG 74 // A+B+C+D+E+F+G+H + Padding
+#endif
+#define MAX_NUMBER_UNSUPPORTED_TLVS 74
+#define MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS 74
+#define MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS 74
+#define MAX_NUMBER_OF_MISSING_TLVS 74
+#define MAX_NUM_DIGBFINTERFACES 4 // Based on RF, 5G FAPI says {0, 255}
+#define MAX_NUM_PRGS_PER_TTI 4 // Based on 38.214 5.1.2.3
+#define DCI_PAYLOAD_BYTE_LEN 32 // Based on Intel API MAX_DCI_BIT_BYTE_LEN
+#define MAX_NUMBER_DL_DCI 32 // Based on Intel API MAX_NUM_PDCCH
+#define MAX_NUMBER_OF_CODEWORDS_PER_PDU 2 // Based on MAX_DL_CODEWORD
+#define MAX_NUMBER_DL_PDUS_PER_TTI 129 // Based on (MAX_NUM_PDSCH*MAX_DL_CODEWORD + MAX_NUM_PDCCH + MAX_NUM_SRS + 1 PBCH/SLOT)
+#define MAX_NUMBER_OF_UES_PER_TTI 16 // Per common_ran_parameters.h
+#define MAX_NUM_CB_PER_TTI_IN_BYTES 192 // Based on Max Tb size of 1376264 bits + 24 crc over (8848-24) and O/H
+#define MAX_NUM_PTRS_PORTS 12 // Per 3GPP 38.212 Table 7.3.1.1.2-21
+#define MAX_NUMBER_OF_GROUPS_PER_TTI 8 // FlexRAN API Table 33
+#define MAX_NUMBER_UL_PDUS_PER_TTI 328 // (MAX_NUM_PUSCH+MAX_NUM_PUCCH+MAX_NUM_SRS+MAX_NUM_PRACH_DET)
+#define MAX_NUMBER_DCI_PDUS_PER_TTI 32 // Based on MAX_NUM_PDCCH
+#define MAX_NUMBER_OF_TLVS_PER_PDU 32 // Based on FAPI/nFAPI implementation
+#define MAX_NUMBER_TX_PDUS_PER_TTI 129 // Same as MAX_NUMBER_DL_PDUS_PER_TTI
+#define MAX_PDU_LENGTH 172096 // Based on 38.214 5.1.3.4, the TBS is 1376264 bits and divided by 8 and aligned to 64 bytes
+#define MAX_NUMBER_OF_PDUS_PER_TTI 129 // Same as MAX_NUMBER_DL_PDUS_PER_TTI
+#define MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI 64 // NUM_PUSCH_CHAN*MAX_NUMBER_OF_CODEWORDS_PER_PDU
+#define MAX_NUMBER_OF_CRCS_PER_SLOT 32 // Based on MAX_NUM_UL_CHAN
+#define MAX_HARQ_INFO_LEN_BYTES 214 // Based on 5G FAPI Table 3-70
+#define MAX_CSI_PART1_DATA_BYTES 214 // Based on 5G FAPI Table 3-71
+#define MAX_CSI_PART2_DATA_BYTES 214 // Based on 5G FAPI Table 3-72
+#define MAX_NUMBER_OF_HARQS_PER_IND 2 // Based on 5G FAPI Table 3-68
+#define MAX_SR_PAYLOAD_SIZE 1 // Based on 5G FAPI Table 3-69
+#define MAX_HARQ_PAYLOAD_SIZE 214 // Based on 5G FAPI Table 3-70
+#define MAX_NUMBER_UCI_PDUS_PER_SLOT 200 // Based on MAX_NUM_PUCCH
+#define MAX_NUMBER_RBS 273 // Based on MAX_NUM_OF_PRB_IN_FULL_BAND
+#define MAX_NUMBER_OF_REP_SYMBOLS 4 // Based on 5g FAPI Table 3-73
+#define MAX_NUMBER_SRS_PDUS_PER_SLOT 32 // Based on MAX_NUM_SRS
+#define MAX_NUM_PREAMBLES_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET
+#define MAX_NUMBER_RACH_PDUS_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET
+#define TA_AVG_TIME 32
+#define TA_AVG_TIMElog2 5
+#ifdef FAPI_222_10_03
+#define MAX_NDLTYPES_DL_TTI_REQ 5
+#define MAX_NDLTYPES_UL_DCI_REQ 2
+#define MAX_SIGNAL_INDEX 7
+#define MAX_NUM_UL_TYPES 5
+#endif
+
+typedef enum nr_ssb_periodicity
+{
+ FAPI_NR_SSB_PERIODICITY_5MS,
+ FAPI_NR_SSB_PERIODICITY_10MS,
+ FAPI_NR_SSB_PERIODICITY_20MS,
+ FAPI_NR_SSB_PERIODICITY_40MS,
+ FAPI_NR_SSB_PERIODICITY_80MS,
+ FAPI_NR_SSB_PERIODICITY_160MS
+
+} nr_ssb_periodicity_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_msg
+{
+ uint16_t message_type_id;
+ uint32_t length; // Length of the message body in bytes
+} fapi_msg_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_msg_header
+{
+ uint8_t numberOfMessagesIncluded;
+ uint8_t handle; // Can be used for Phy Id or Carrier Id
+ fapi_msg_t_ue_sim msg_details;
+} fapi_msg_header_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_tl
+{
+ uint16_t tag;
+ uint16_t length;
+} fapi_tl_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uint8_tlv
+{
+ fapi_tl_t_ue_sim tl;
+ uint8_t value;
+#ifdef VZ_VERIPHY_INTEG
+ uint8_t rsv[3];
+#endif
+} fapi_uint8_tlv_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uint16_tlv
+{
+ fapi_tl_t_ue_sim tl;
+ uint16_t value;
+#ifdef VZ_VERIPHY_INTEG
+ uint8_t rsv[2];
+#endif
+} fapi_uint16_tlv_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_int16_tlv
+{
+ fapi_tl_t_ue_sim tl;
+ int16_t value;
+#ifdef VZ_VERIPHY_INTEG
+ uint8_t rsv[2];
+#endif
+} fapi_int16_tlv_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uint32_tlv
+{
+ fapi_tl_t_ue_sim tl;
+ uint32_t value;
+} fapi_uint32_tlv_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_tx_dat_tlv
+{
+ uint16_t tag;
+ //Currently DU is not supporting more than 1 TLVs. So length type changed to uint32_t as per DU team. To be modified once it is resolved.
+ uint32_t length;
+#ifdef VZ_VERIPHY_INTEG
+ uint64_t valueOrOffset; // TLV with unsigned 32 bit value
+#else
+ uint32_t value[];
+#endif
+
+} fapi_tx_dat_tlv_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_config_tlv
+{
+ uint16_t tag; // In 5G FAPI for Cell Params
+ uint8_t length;
+ uint8_t value;
+} fapi_config_tlv_t_ue_sim;
+
+#ifdef VZ_VERIPHY_INTEG
+// Updated per 5G FAPI
+typedef struct {
+ fapi_tl_t_ue_sim tl;
+ uint16_t value[NUMEROLOGIES];
+ uint16_t rsv; // To be 32-bit aligned, if FAPI_NUMEROLOGIES changes to some other value than 5 please ensure 32 bit alignment
+} fapi_config_num_tlv_t;
+#endif
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_param_req
+{
+ fapi_msg_header_t_ue_sim header; // For PARAM.req message length in fapi_msg_t_ue_sim is zero
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim protocolVersion;
+#endif
+} fapi_param_req_t_ue_sim;
+
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_signal_index
+{
+ uint8_t referenceRS;
+ int16_t powerOffsetMin;
+ int16_t powerOffsetMax;
+} fapi_signal_index_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_cell_params
+{
+ fapi_uint16_tlv_t_ue_sim releaseCapability;
+ fapi_uint16_tlv_t_ue_sim phyState;
+ fapi_uint8_tlv_t_ue_sim skipBlankDlConfig;
+ fapi_uint8_tlv_t_ue_sim skipBlankUlConfig;
+ fapi_uint16_tlv_t_ue_sim numTlvsToReport;
+ //fapi_param_tlv_t tlvStatus[MAX_NUMBER_OF_CONFIG_PARMS]; // Need to define this value based on 5G FAPI
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim powerProfilesSupported;
+ fapi_signal_index_t signalIndex[MAX_SIGNAL_INDEX];
+ fapi_uint16_tlv_t_ue_sim maxNumPDUsInDL_TTI;
+ fapi_uint16_tlv_t_ue_sim maxNumPDUsInUL_TTI;
+ fapi_uint16_tlv_t_ue_sim maxNumPDUsInUL_DCI;
+#endif
+} fapi_cell_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_carrier_parms
+{
+ fapi_uint8_tlv_t_ue_sim cyclicPrefix;
+ fapi_uint8_tlv_t_ue_sim supportedSubcarrierSpacingDl;
+ fapi_uint16_tlv_t_ue_sim supportedBandwidthDl;
+ fapi_uint8_tlv_t_ue_sim supportedSubcarrierSpecingsUl;
+ fapi_uint16_tlv_t_ue_sim supportedBandwidthUl;
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim ssPbchMultipleCarriersInABand;
+ fapi_uint8_tlv_t_ue_sim multipleCellsSsPbchInACarrier;
+#endif
+} fapi_carrier_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pdcch_parms
+{
+ fapi_uint8_tlv_t_ue_sim cceMappingType;
+ fapi_uint8_tlv_t_ue_sim coresetOutsideFirst3OfdmSymsOfSlot;
+ fapi_uint8_tlv_t_ue_sim precoderGranularityCoreset;
+ fapi_uint8_tlv_t_ue_sim pdcchMuMimo;
+ fapi_uint8_tlv_t_ue_sim pdcchPrecoderCycling;
+ fapi_uint8_tlv_t_ue_sim maxPdcchsPerSlot;
+} fapi_pdcch_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pucch_parms
+{
+ fapi_uint8_tlv_t_ue_sim pucchFormats;
+ fapi_uint8_tlv_t_ue_sim maxPucchsPerSlot;
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim pucchGroupAndSequenceHopping;
+ fapi_uint8_tlv_t_ue_sim maxNumUlBwpIds;
+ fapi_uint8_tlv_t_ue_sim pucchAggregation;
+#endif
+} fapi_pucch_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pdsch_parms
+{
+ fapi_uint8_tlv_t_ue_sim pdschMappingType;
+ fapi_uint8_tlv_t_ue_sim pdschAllocationTypes;
+ fapi_uint8_tlv_t_ue_sim pdschVrbToPrbMapping;
+ fapi_uint8_tlv_t_ue_sim pdschCbg;
+ fapi_uint8_tlv_t_ue_sim pdschDmrsConfigTypes;
+ fapi_uint8_tlv_t_ue_sim pdschDmrsMaxLength;
+ fapi_uint8_tlv_t_ue_sim pdschDmrsAdditionalPos;
+ fapi_uint8_tlv_t_ue_sim maxPdschsTBsPerSlot;
+ fapi_uint8_tlv_t_ue_sim maxNumberMimoLayersPdsch;
+ fapi_uint8_tlv_t_ue_sim supportedMaxModulationOrderDl;
+ fapi_uint8_tlv_t_ue_sim maxMuMimoUsersDl;
+ fapi_uint8_tlv_t_ue_sim pdschDataInDmrsSymbols;
+ fapi_uint8_tlv_t_ue_sim premptionSupport;
+ fapi_uint8_tlv_t_ue_sim pdschNonSlotSupport;
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim ssbRateMatch;
+ fapi_uint8_tlv_t_ue_sim supportedRateMatchPatternType;
+ fapi_uint8_tlv_t_ue_sim pdcchRateMatch;
+ fapi_uint8_tlv_t_ue_sim numOfRateMatchPatternLTECrsPerSlot;
+ fapi_uint8_tlv_t_ue_sim numOfRateMatchPatternLTECrsInPhy;
+ fapi_uint8_tlv_t_ue_sim csiRsRateMatch;
+ fapi_uint8_tlv_t_ue_sim pdschTransTypeSupport;
+ fapi_uint8_tlv_t_ue_sim pdschMacPduBitAlignment;
+#endif
+} fapi_pdsch_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pusch_parms
+{
+ fapi_uint8_tlv_t_ue_sim uciMuxUlschInPusch;
+ fapi_uint8_tlv_t_ue_sim uciOnlyPusch;
+ fapi_uint8_tlv_t_ue_sim puschFrequencyHopping;
+ fapi_uint8_tlv_t_ue_sim puschDmrsConfigTypes;
+ fapi_uint8_tlv_t_ue_sim puschDmrsMaxLen;
+ fapi_uint8_tlv_t_ue_sim puschDmrsAditionalPos;
+ fapi_uint8_tlv_t_ue_sim puschCbg;
+ fapi_uint8_tlv_t_ue_sim puschMappingType;
+ fapi_uint8_tlv_t_ue_sim puschAllocationTypes;
+ fapi_uint8_tlv_t_ue_sim puschVrbToPrbMapping;
+ fapi_uint8_tlv_t_ue_sim puschMaxPtrsPorts;
+ fapi_uint8_tlv_t_ue_sim maxPduschsTBsPerSlot;
+ fapi_uint8_tlv_t_ue_sim maxNumberMimoLayersnonCbPusch;
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim maxNumberMimoLayersCbPusch;
+#endif
+ fapi_uint8_tlv_t_ue_sim supportedModulationOrderUl;
+ fapi_uint8_tlv_t_ue_sim maxMuMimoUsersUl;
+ fapi_uint8_tlv_t_ue_sim dftsOfdmSupport;
+ fapi_uint8_tlv_t_ue_sim puschAggregationFactor;
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim puschLbrmSupport;
+ fapi_uint8_tlv_t_ue_sim puschTransTypeSupport;
+ fapi_uint8_tlv_t_ue_sim puschMacPduBitAlignment;
+#endif
+}fapi_pusch_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_prach_parms
+{
+ fapi_uint8_tlv_t_ue_sim prachLongFormats;
+ fapi_uint8_tlv_t_ue_sim prachShortFormats;
+ fapi_uint8_tlv_t_ue_sim prachRestrictedSets;
+ fapi_uint8_tlv_t_ue_sim maxPrachFdOccasionsInASlot;
+#ifdef FAPI_222_10_03
+ fapi_uint16_tlv_t_ue_sim maxNumPrachConfigurations;
+ fapi_uint8_tlv_t_ue_sim prachMultipleCarriersInABand;
+#endif
+}fapi_prach_parms_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_meas_parms
+{
+ fapi_uint8_tlv_t_ue_sim rssiMeasurementSupport;
+} fapi_meas_parms_t_ue_sim;
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_uci_parms
+{
+ fapi_uint16_tlv_t_ue_sim maxNumUciMaps;
+} fapi_uci_parms_t;
+typedef struct PACK_STRUCT fapi_capability
+{
+ uint16_t capabilityTag;
+ uint8_t validityScope;
+} fapi_capability_t;
+typedef struct PACK_STRUCT fapi_capability_validity
+{
+ fapi_tl_t_ue_sim fapi_capability_validity;
+ uint16_t numCapabilities;
+ fapi_capability_t capability[];
+} fapi_capability_validity_t;
+typedef struct PACK_STRUCT fapi_phy_port
+{
+ uint8_t numDlPortRanges; /* Number of DL port ranges for this PHYs */
+ uint16_t dlPortRangeStart[0]; /* Start of each range of DL ports, depends on Number of DL port ranges for this PHYs*/
+ uint16_t dlPortRangeLen[0];
+ uint8_t numUlPortRanges;
+ uint16_t ulPortRangeStart[0];
+ uint16_t ulPortRangeLen[0];
+}fapi_phy_port_t;
+typedef struct PACK_STRUCT fapi_phy_profile
+{
+ uint8_t maxNumPhys;
+ fapi_phy_port_t phy_port[0];
+}fapi_phy_profile_t;
+typedef struct PACK_STRUCT fapi_phy_parms
+{
+ fapi_tl_t_ue_sim phySupport;
+ uint16_t numPhyProfiles;
+ uint16_t numDlBbPorts;
+ uint16_t numUlBbPorts;
+ fapi_phy_profile_t phyProfiles[0];
+ fapi_uint8_tlv_t_ue_sim timeManagement;
+ fapi_tl_t_ue_sim protocolVersion;
+ uint8_t phyFapiProtocolVersion;
+ uint8_t phyFapiNegotiatedProtocolVersion;
+ fapi_uint8_tlv_t_ue_sim moreThanOneIndicationPerSlot[6];
+ fapi_uint8_tlv_t_ue_sim moreThanOneRequestPerSlot[4];
+}fapi_phy_support_t;
+typedef struct PACK_STRUCT fapi_dfe_profile
+{
+ fapi_tl_t_ue_sim dfe_profile;
+ uint16_t numPhyProfiles;
+ uint16_t numDfeProfiles;
+ uint8_t profileValidityMap;
+}fapi_dfe_profile_t;
+typedef struct PACK_STRUCT fapi_delay_management_parms
+{
+ fapi_uint32_tlv_t_ue_sim dl_tti_timing_offset;
+ fapi_uint32_tlv_t_ue_sim ul_tti_timing_offset;
+ fapi_uint32_tlv_t_ue_sim ul_dci_timing_offset;
+ fapi_uint32_tlv_t_ue_sim tx_data_timing_offset;
+ fapi_uint16_tlv_t_ue_sim timing_window;
+ fapi_uint8_tlv_t_ue_sim timing_info_period;
+}fapi_delay_management_parms_t;
+typedef struct PACK_STRUCT fapi_rel16_mTRP_parameters
+{
+ fapi_uint32_tlv_t_ue_sim mTRP_Support;
+}fapi_rel16_mTRP_parameters_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_params
+{
+ fapi_cell_parms_t_ue_sim cellParms;
+ fapi_carrier_parms_t_ue_sim carrParms;
+ fapi_pdcch_parms_t_ue_sim pdcchParms;
+ fapi_pucch_parms_t_ue_sim pucchParms;
+ fapi_pdsch_parms_t_ue_sim pdschParms;
+ fapi_pusch_parms_t_ue_sim puschParms;
+ fapi_prach_parms_t_ue_sim prachParms;
+ fapi_meas_parms_t_ue_sim measParms;
+#ifdef FAPI_222_10_03
+ fapi_uci_parms_t uciParms;
+ fapi_capability_validity_t capabilityValidity;
+ fapi_phy_support_t phySupport;
+ fapi_dfe_profile_t dfeProfile;
+ fapi_delay_management_parms_t delayManagementParms;
+ fapi_rel16_mTRP_parameters_t rel16mTRPParameters;
+#endif
+} fapi_params_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_param_resp
+{
+ fapi_msg_header_t_ue_sim header;
+ uint8_t error_code;
+ uint8_t number_of_tlvs;
+ fapi_uint16_tlv_t_ue_sim tlvs[MAX_NUM_TLVS_CONFIG];
+} fapi_param_resp_t_ue_sim;
+
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_phy_config
+{
+ fapi_uint16_tlv_t_ue_sim phyProfileId;
+ fapi_uint8_tlv_t_ue_sim indicationInstancePerSlot[6];
+ fapi_uint8_tlv_t_ue_sim requestInstancePerSlot[4];
+}fapi_phy_config_t;
+#endif
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_carrier_config
+{
+ fapi_tl_t_ue_sim carrierConfig;
+ uint16_t dlBandwidth;
+ uint32_t dlFrequency;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_config_num_tlv_t dlk0;
+ fapi_config_num_tlv_t dlGridSize;
+#else
+ uint16_t dlk0[NUMEROLOGIES];
+ uint16_t dlGridSize[NUMEROLOGIES];
+#endif
+ uint16_t numTxAnt;
+ uint16_t uplinkBandwidth;
+ uint32_t uplinkFrequency;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_config_num_tlv_t ulk0;
+ fapi_config_num_tlv_t ulGridSize;
+#else
+ uint16_t ulk0[NUMEROLOGIES];
+ uint16_t ulGridSize[NUMEROLOGIES];
+#endif
+ uint16_t numRxAnt;
+ uint8_t frequencyShift7p5KHz;
+ uint8_t powerProfile;
+ uint8_t powerOffsetRsIndex;
+} fapi_carrier_config_t_ue_sim;
+#else
+typedef struct PACK_STRUCT fapi_carrier_config
+{
+ fapi_uint16_tlv_t_ue_sim dlBandwidth;
+ fapi_uint32_tlv_t_ue_sim dlFrequency;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_config_num_tlv_t dlk0;
+ fapi_config_num_tlv_t dlGridSize;
+#else
+ fapi_uint16_tlv_t_ue_sim dlk0[NUMEROLOGIES];
+ fapi_uint16_tlv_t_ue_sim dlGridSize[NUMEROLOGIES];
+#endif
+ fapi_uint16_tlv_t_ue_sim numTxAnt;
+ fapi_uint16_tlv_t_ue_sim uplinkBandwidth;
+ fapi_uint32_tlv_t_ue_sim uplinkFrequency;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_config_num_tlv_t ulk0;
+ fapi_config_num_tlv_t ulGridSize;
+#else
+ fapi_uint16_tlv_t_ue_sim ulk0[NUMEROLOGIES];
+ fapi_uint16_tlv_t_ue_sim ulGridSize[NUMEROLOGIES];
+#endif
+ fapi_uint16_tlv_t_ue_sim numRxAnt;
+ fapi_uint8_tlv_t_ue_sim frequencyShift7p5KHz;
+} fapi_carrier_config_t_ue_sim;
+#endif
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_cell_config
+{
+ fapi_uint16_tlv_t_ue_sim phyCellId; //in legacy data type mentioned was uint8_t, though in spec it was uint16_t
+ fapi_uint8_tlv_t_ue_sim frameDuplexType;
+#ifdef FAPI_222_10_03
+ fapi_uint8_tlv_t_ue_sim pdschTransTypeValidity;
+ fapi_uint8_tlv_t_ue_sim puschTransTypeValidity;
+#endif
+} fapi_cell_config_t_ue_sim;
+
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_ssb_pwr_pbch_config
+{
+ fapi_uint32_tlv_t_ue_sim ssPbchPower;
+ fapi_int16_tlv_t_ue_sim ssPbchBlockPowerScaling;
+ fapi_uint8_tlv_t_ue_sim bchPayloadFlag;
+}fapi_ssb_pwr_pbch_config_t;
+#else
+typedef struct PACK_STRUCT fapi_ssb_config
+{
+ fapi_uint32_tlv_t_ue_sim ssPbchPower;
+ fapi_uint8_tlv_t_ue_sim bchPayload;
+ fapi_uint8_tlv_t_ue_sim scsCommon;
+} fapi_ssb_config_t_ue_sim;
+#endif
+
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_prachFdOccasion
+{
+ uint16_t prachRootSequenceIndex;
+ uint8_t numRootSequences;
+ int16_t k1;
+ uint8_t prachZeroCorrConf;
+ uint16_t numUnusedRootSequences; // 5G FAPI Table 3-24 Subset
+ uint16_t unusedRootSequences[MAX_NUM_UNUSED_ROOT_SEQUENCES];
+} fapi_prachFdOccasion_t_ue_sim;
+#else
+typedef struct PACK_STRUCT fapi_prachFdOccasion
+{
+ fapi_uint16_tlv_t_ue_sim prachRootSequenceIndex;
+ fapi_uint8_tlv_t_ue_sim numRootSequences;
+ fapi_uint16_tlv_t_ue_sim k1;
+ fapi_uint8_tlv_t_ue_sim prachZeroCorrConf;
+ fapi_uint16_tlv_t_ue_sim numUnusedRootSequences; // 5G FAPI Table 3-24 Subset
+ fapi_uint8_tlv_t_ue_sim unusedRootSequences[MAX_NUM_UNUSED_ROOT_SEQUENCES];
+} fapi_prachFdOccasion_t_ue_sim;
+#endif
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_prach_configuration
+{
+ fapi_tl_t_ue_sim prachConfig;
+ uint16_t prachResConfigIndex;
+ uint8_t prachSequenceLength;
+ uint8_t prachSubCSpacing;
+ uint8_t ulBwpPuschScs;
+ uint8_t restrictedSetConfig;
+ uint8_t numPrachFdOccasions;
+ uint8_t prachConfigIndex;
+ fapi_prachFdOccasion_t_ue_sim prachFdOccasion[MAX_NUM_PRACH_FD_OCCASIONS];
+ uint8_t ssbPerRach;
+} fapi_prach_configuration_t_ue_sim;
+#else
+typedef struct PACK_STRUCT fapi_prach_configuration
+{
+ fapi_uint8_tlv_t_ue_sim prachSequenceLength;
+ fapi_uint8_tlv_t_ue_sim prachSubCSpacing;
+ fapi_uint8_tlv_t_ue_sim restrictedSetConfig;
+ fapi_uint8_tlv_t_ue_sim numPrachFdOccasions;
+ fapi_uint8_tlv_t_ue_sim prachConfigIndex;
+ fapi_prachFdOccasion_t_ue_sim prachFdOccasion[MAX_NUM_PRACH_FD_OCCASIONS];
+ fapi_uint8_tlv_t_ue_sim ssbPerRach;
+ fapi_uint8_tlv_t_ue_sim prachMultipleCarriersInABand;
+} fapi_prach_configuration_t_ue_sim;
+#endif
+
+#ifdef FAPI_222_10_03
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_multi_prach_config
+{
+ fapi_tl_t_ue_sim multiPrachConfig;
+ uint16_t numPrachConfigurations;
+ fapi_prach_configuration_t_ue_sim numPrachConfigurationsTlv[];
+}fapi_multi_prach_config_t;
+#endif
+
+//Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_ssb_res_config_table
+{
+ fapi_tl_t_ue_sim ssbTableConfig;
+ uint16_t ssbConfigIndex;
+ uint16_t ssbOffsetPointA;
+ uint8_t betaPssProfileNR;
+ int16_t betaPssProfileSSS;
+ uint8_t ssbPeriod;
+ uint8_t ssbSubcarrierOffset;
+ uint8_t cases;
+ uint8_t subCarrierSpacing;
+ uint8_t subCarrierSpacingCommon;
+ uint32_t ssbMask[2];
+ uint8_t beamId[64];
+ uint8_t imax;
+ uint8_t rmsiPresence;
+}fapi_ssb_res_config_table_t;
+#else
+typedef struct PACK_STRUCT fapi_ssb_table
+{
+ fapi_uint16_tlv_t_ue_sim ssbOffsetPointA;
+ fapi_uint8_tlv_t_ue_sim betaPss;
+ fapi_uint8_tlv_t_ue_sim ssbPeriod;
+ fapi_uint8_tlv_t_ue_sim ssbSubCarrierOffset;
+ fapi_uint32_tlv_t_ue_sim mib;
+ fapi_uint32_tlv_t_ue_sim ssbMask[2];
+ fapi_uint8_tlv_t_ue_sim beamId[64];
+ fapi_uint8_tlv_t_ue_sim ssPbchMultipleCarriersInABand;
+ fapi_uint8_tlv_t_ue_sim multipleCellsSsPbchInACarrier;
+} fapi_ssb_table_t_ue_sim;
+#endif
+
+#ifdef FAPI_222_10_03
+//Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_multi_ssb_resource_config_table
+{
+ fapi_tl_t_ue_sim multiSsbResourceConfig;
+ uint8_t numSsbConfigurations;
+ fapi_ssb_res_config_table_t ssbConfigurationsTLVs[];
+}fapi_multi_ssb_resource_config_table_t;
+#endif
+
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_slotconfig
+{
+ uint8_t slotConfig[MAX_NUM_OF_SYMBOLS_PER_SLOT];
+} fapi_slotconfig_t_ue_sim;
+#else
+typedef struct PACK_STRUCT fapi_slotconfig
+{
+ fapi_uint8_tlv_t_ue_sim slotConfig[MAX_NUM_OF_SYMBOLS_PER_SLOT];
+} fapi_slotconfig_t_ue_sim;
+#endif
+
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_tdd_table
+{
+ fapi_tl_t_ue_sim tddTableConfig;
+ uint8_t tddPeriod;
+ fapi_slotconfig_t_ue_sim slotConfig[MAX_TDD_PERIODICITY];
+} fapi_tdd_table_t_ue_sim;
+#else
+typedef struct PACK_STRUCT fapi_tdd_table
+{
+ fapi_uint8_tlv_t_ue_sim tddPeriod;
+ fapi_slotconfig_t_ue_sim slotConfig[MAX_TDD_PERIODICITY];
+} fapi_tdd_table_t_ue_sim;
+#endif
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_meas_config
+{
+ fapi_uint8_tlv_t_ue_sim rssiMeasurement;
+} fapi_meas_config_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dig_beam_weight
+{
+ int16_t digBeamWeightRe;
+ int16_t digBeamWeightIm;
+} fapi_dig_beam_weight_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dig_beam_config
+{
+ uint16_t beamIdx;
+ fapi_dig_beam_weight_t_ue_sim digBeamWeight[MAX_NUMBER_TX_RUS];
+} fapi_dig_beam_config_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_beamforming_table
+{
+ uint16_t numDigBeams;
+#ifndef FAPI_222_10_03
+ uint16_t numTxRus;
+#else
+ uint16_t numBasebandPorts;
+#endif
+ fapi_dig_beam_config_t_ue_sim digBeam[MAX_NUMBER_OF_BEAMS];
+} fapi_beamforming_table_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_precoderWeight
+{
+ int16_t preCoderWeightRe;
+ int16_t preCoderWeightIm;
+} fapi_precoderWeight_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_precoder_weight
+{
+ fapi_precoderWeight_t_ue_sim precoder_weight[MAX_NUM_ANT_PORTS];
+} fapi_precoder_weight_t_ue_sim;
+
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_map_index
+{
+ uint8_t numPart1Params;
+ uint8_t sizePart1Params[0]; /* Shall Not exced 12 */
+ uint16_t map[0];
+}fapi_map_index_t;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uci_config
+{
+ fapi_tl_t_ue_sim uciConfig;
+ uint16_t numUci2Maps;
+ fapi_map_index_t mapIndex[];
+}fapi_uci_config_t;
+
+// Updated per 5G FAPI
+
+typedef struct PACK_STRUCT fapi_prb_sym_rate_match_pattern
+{
+ uint8_t prbSymbRateMatchPatternID;
+ uint8_t freqDomainRB[35];
+ uint8_t oneOrTwoSlots;
+ uint32_t symbolsInRB;
+ uint8_t timeDomainPeriodicity;
+ uint8_t timeDomainPattern[5];
+ uint8_t subCarrierSpacing;
+}fapi_prb_sym_rate_match_pattern_t;
+
+typedef struct PACK_STRUCT fapi_prb_symbol_rate_match_pattern
+{
+ fapi_tl_t_ue_sim prbSymRateMatchPattern;
+ uint8_t numPrbSymbRatePattern;
+ fapi_prb_sym_rate_match_pattern_t prbSymbRateMatchPatterns[];
+}fapi_prb_symbol_rate_match_pattern_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_mbsfn_sf_config_list
+{
+ uint8_t radioframeAllocationPeriod;
+ uint8_t radioframeAllocationOffset;
+ uint8_t lteFrameStructureType;
+ uint8_t subframeAllocLength;
+ uint32_t subframeAllocationBitmap; /* Ref: Table 3-42 LTE-CRS rate match patterns configuration*/
+}fapi_mbsfn_sf_config_list_t;
+
+typedef struct PACK_STRUCT fapi_lte_crs_rm_ptrn
+{
+ uint8_t crsRateMatchPatternID;
+ uint16_t carrierFreqDL;
+ uint8_t carrierBandwidthDL;
+ uint8_t nrCrsPorts;
+ uint8_t vShift;
+ uint8_t sizeMbsfnSubframeConfigList;
+ fapi_mbsfn_sf_config_list_t mbsfnSFConfigList[0];
+}fapi_lte_crs_rm_ptrn_t;
+
+typedef struct PACK_STRUCT fapi_lte_crs_rm_pattern
+{
+ fapi_tl_t_ue_sim lteCrsRmPattern;
+ uint8_t numLteCrsRmPattern;
+ fapi_lte_crs_rm_ptrn_t lteCrsRmPtrn[0];
+}fapi_lte_crs_rm_pattern_t;
+
+// Updated per 5G Fapi
+typedef struct PACK_STRUCT fapi_ul_bwp_id
+{
+ uint8_t pucchGroupHopping;
+ uint16_t nIdPucchHopping;
+}fapi_ul_bwp_id_t;
+
+typedef struct PACK_STRUCT fapi_pucch_semi_static_config
+{
+ fapi_uint8_tlv_t_ue_sim numUlBwpIds;
+ fapi_ul_bwp_id_t ulBwpId[0];
+}fapi_pucch_semi_static_config_t;
+
+// Updated per 5G Fapi
+typedef struct PACK_STRUCT fapi_pdsch_config
+{
+ fapi_uint8_tlv_t_ue_sim pdschCbgScheme;
+}fapi_pdsch_config_t;
+
+// Updated per 5G Fapi
+typedef struct PACK_STRUCT fapi_delay_mgmt_config
+{
+ fapi_uint16_tlv_t_ue_sim timingWindow;
+ fapi_uint8_tlv_t_ue_sim timingInfoMode;
+ fapi_uint8_tlv_t_ue_sim timingInfoPeriod;
+}fapi_delay_mgmt_config_t;
+
+// Updated per 5G Fapi
+typedef struct PACK_STRUCT fapi_rel16_mtrp_config
+{
+ fapi_uint8_tlv_t_ue_sim numTxPortsTRP1;
+ fapi_uint8_tlv_t_ue_sim numRxPortsTRP1;
+}fapi_rel16_mtrp_config_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT
+{
+ uint16_t pmIdx;
+ uint16_t numLayers;
+ uint16_t numAntPorts;
+ fapi_precoder_weight_t_ue_sim precoderWeight[MAX_NUM_LAYERS];
+} fapi_precoding_table_t_ue_sim;
+
+// Updated per 5G FAPI
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_config
+{
+ fapi_phy_config_t phyConfig;
+ fapi_carrier_config_t_ue_sim carrierConfig;
+ fapi_cell_config_t_ue_sim cellConfig;
+ fapi_ssb_pwr_pbch_config_t ssbPowerPbchConfig;
+ fapi_prach_configuration_t_ue_sim prachConfig;
+ fapi_multi_prach_config_t multiPrachConfig;
+ fapi_ssb_res_config_table_t ssbResConfigTable;
+ fapi_multi_ssb_resource_config_table_t multiSsbResourceConfigTable;
+ fapi_tdd_table_t_ue_sim tddTable;
+ fapi_meas_config_t_ue_sim measConfig;
+ fapi_beamforming_table_t_ue_sim beamformingTable;
+ fapi_precoding_table_t_ue_sim precodingTable;
+ fapi_uci_config_t uciConfig;
+ fapi_prb_symbol_rate_match_pattern_t prbSymRmPtrn;
+ fapi_lte_crs_rm_pattern_t lteCrsRmPtrn;
+ fapi_pucch_semi_static_config_t pucchSemiStaticConfig;
+ fapi_pdsch_config_t pdschConfig;
+ fapi_delay_mgmt_config_t delayMgmtConfig;
+ fapi_rel16_mtrp_config_t rel16MtrpConfig;
+}fapi_config_t_ue_sim;
+#else
+typedef struct PACK_STRUCT fapi_config
+{
+ fapi_carrier_config_t_ue_sim carrierConfig;
+ fapi_cell_config_t_ue_sim cellConfig;
+ fapi_ssb_config_t_ue_sim ssbConfig;
+ //fapi_prach_config_t prachConfig;
+ fapi_prach_configuration_t_ue_sim prachConfig;
+ fapi_ssb_table_t_ue_sim ssbTable;
+ fapi_tdd_table_t_ue_sim tddTable;
+ fapi_meas_config_t_ue_sim measConfig;
+ fapi_beamforming_table_t_ue_sim beamformingTable;
+ fapi_precoding_table_t_ue_sim precodingTable;
+}fapi_config_t_ue_sim;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_config_req
+{
+ fapi_msg_header_t_ue_sim header;
+ uint8_t number_of_tlvs;
+ fapi_uint16_tlv_t_ue_sim tlvs[MAX_NUM_TLVS_CONFIG];
+} fapi_config_req_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_config_resp
+{
+ fapi_msg_header_t_ue_sim header;
+ uint8_t error_code;
+ uint8_t number_of_invalid_tlvs;
+ uint8_t number_of_inv_tlvs_idle_only;
+ uint8_t number_of_inv_tlvs_running_only;
+ uint8_t number_of_missing_tlvs;
+ fapi_uint16_tlv_t_ue_sim tlvs[4 * MAX_NUM_TLVS_CONFIG];
+// fapi_uint16_tlv_t_ue_sim unsupported_or_invalid_tlvs[MAX_NUMBER_UNSUPPORTED_TLVS];
+// fapi_uint16_tlv_t_ue_sim invalid_idle_only_tlvs[MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS];
+// fapi_uint16_tlv_t_ue_sim invalid_running_only_tlvs[MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS];
+// fapi_uint16_tlv_t_ue_sim missing_tlvs[MAX_NUMBER_OF_MISSING_TLVS];
+} fapi_config_resp_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_start_req
+{
+ fapi_msg_header_t_ue_sim header; // Message Length is zero for START.request
+} fapi_start_req_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_stop_req
+{
+ fapi_msg_header_t_ue_sim header; // Message Length is zero for STOP.request
+} fapi_stop_req_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_stop_ind
+{
+ fapi_msg_header_t_ue_sim header; // Message Length is zero for STOP.indication
+} fapi_stop_ind_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_error_ind
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t message_id;
+ uint8_t error_code;
+#ifdef FAPI_222_10_03
+ uint16_t expectedSFN;
+ uint16_t expectedSlot;
+#endif
+} fapi_error_ind_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_slot_ind
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+} fapi_slot_ind_t_ue_sim;
+
+#ifdef FAPI_222_10_03
+/* Ref: section 3.1.9 of* SCF-225 */
+typedef struct PACK_STRUCT fapi_start_resp
+{
+ fapi_msg_header_t_ue_sim header;
+ uint8_t errorCode;
+}fapi_start_resp_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_bmi
+{
+ uint16_t beamidx;
+} fapi_bmi_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pmi_bfi
+{
+ uint16_t pm_idx;
+ fapi_bmi_t_ue_sim beam_idx[];
+} fapi_pmi_bfi_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_bmform
+{
+#ifndef FAPI_222_10_03
+ uint8_t trpScheme;
+#endif
+ uint16_t num_prgs;
+ uint16_t prg_size;
+ uint8_t dig_bf_interfaces;
+ uint16_t beam_idx[][1];
+} fapi_bmform_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_precoding_bmform
+{
+#ifndef FAPI_222_10_03
+ uint8_t trpScheme;
+#endif
+ uint16_t num_prgs;
+ uint16_t prg_size;
+ uint8_t dig_bf_interfaces;
+ fapi_pmi_bfi_t_ue_sim pmi_bfi[1];
+} fapi_precoding_bmform_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_tx_power_info
+{
+ uint8_t beta_pdcch_1_0;
+#ifndef FAPI_222_10_03
+ uint8_t power_control_ofsset_ss;
+#else
+ int8_t powerControlOffsetSSProfileNR;
+#endif
+} fapi_tx_power_info_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_bwp
+{
+ uint16_t bwp_size; /* BWP configuration Start */
+ uint16_t bwp_start;
+ uint8_t sub_carrier_spacing;
+ uint8_t cyclic_prefix; /* BWP Configuration End*/
+}fapi_bwp_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_coreset
+{
+ uint8_t start_symbol_index; /* Coreset Configuration Start */
+ uint8_t duration_symbols;
+ uint8_t freq_domain_resource[FAPI_MAX_FREQ_DOMAIN_RES];
+ uint8_t cce_reg_mapping_type;
+ uint8_t reg_bundle_size;
+ uint8_t interleaver_size;
+ uint8_t core_set_type;
+ uint16_t shift_index;
+ uint8_t precoder_granularity; /* Coreset Configuration End */
+}fapi_coreset_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_dci
+{
+ uint16_t rnti;
+#ifdef FAPI_222_10_03
+ uint16_t nIdPdcchData;
+ uint16_t nRntiPdcchData;
+#else
+ uint16_t scrambling_id;
+ uint16_t scrambling_rnti;
+#endif
+ uint8_t cce_index;
+ uint8_t aggregation_level;
+ fapi_precoding_bmform_t_ue_sim pc_and_bform;
+ fapi_tx_power_info_t tx_power_info;
+ uint16_t payload_size_bits;
+ uint8_t payload[];
+} fapi_dl_dci_t_ue_sim;
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_coreset_parms
+{
+ uint16_t pdcchPduIndex;
+ uint16_t nIdPdcchDmrs;
+} fapi_coreset_parms_t;
+
+typedef struct PACK_STRUCT fapi_dci_specific_parms
+{
+ uint16_t dciIndex;
+ uint8_t collocatedAl16Candidate;
+ int16_t pdcchDmrsPowerOffsetProfileSSS;
+ int16_t pdcchDataPowerOffsetProfileSSS;
+} fapi_dci_specific_parms_t;
+
+typedef struct PACK_STRUCT fapi_pdcch_mnt_parms
+{
+ fapi_coreset_parms_t coresetParms;
+ fapi_dci_specific_parms_t dciSpecificParms;
+} fapi_pdcch_mnt_parms_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_pdcch_pdu
+{
+ fapi_bwp_t bwp;
+ fapi_coreset_t coreset;
+ uint16_t num_dl_dci; /*Number of DCIs in this CORESET */
+ fapi_dl_dci_t_ue_sim dl_dci[0];
+#ifdef FAPI_222_10_03
+ fapi_pdcch_mnt_parms_t pdcchMntParms;
+#endif
+} fapi_dl_pdcch_pdu_t_ue_sim;
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_codeword_pdu
+{
+ uint16_t target_code_rate;
+ uint8_t qam_mod_order;
+ uint8_t mcs_index;
+ uint8_t mcs_table;
+ uint8_t rv_index;
+ uint32_t tb_size;
+} fapi_codeword_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dmrs
+{
+ uint16_t dl_dmrs_symb_pos; /*SCF: DMRS Config Start */
+ uint8_t dmrs_config_type;
+ uint16_t dl_dmrs_scrambling_id;
+ uint8_t scid;
+ uint8_t num_dmrs_cdm_grps_no_data;
+ uint16_t dmrs_ports; /*SCF: DMRS Config End */
+} fapi_dmrs_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pdsch_freq_dom_alloc
+{
+ uint8_t resource_alloc; /*SCF: PDSCH Allocation in Frequency Domain Start */
+ uint8_t rb_bitmap[36];
+ uint16_t rb_start;
+ uint16_t rb_size;
+ uint8_t vrb_to_prb_mapping;/*SCF : PDSCH Allocation in Frequency Domain End */
+} fapi_pdsch_freq_dom_alloc_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pdsch_time_dom_alloc
+{
+ uint8_t start_symb_index;/*SCF : PDSCH Allocation in Time Domain Start */
+ uint8_t nr_of_symbols; /*SCF : PDSCH Allocation in Time Domain End */
+} fapi_pdsch_time_dom_alloc_t;
+
+typedef struct PACK_STRUCT fapi_dl_pdsch_ptrs_info
+{
+ uint8_t ptrs_port_index;
+ uint8_t ptrs_time_density;
+ uint8_t ptrs_freq_density;
+ uint8_t ptrs_re_offset;
+ uint8_t n_epre_ratio_of_pdsch_to_ptrs;
+
+} fapi_dl_pdsch_ptrs_info_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_tx_pwr_info
+{
+#ifndef FAPI_222_10_03
+ uint8_t power_control_offset; /*SCF : TX Power Info Start */
+ uint8_t power_control_offset_ss; /*SCF : Tx Power Info End */
+#else
+ uint8_t powerControlOffsetProfileNR; /*SCF : TX Power Info Start */
+ uint8_t powerControlOffsetSSProfileNR; /*SCF : Tx Power Info End */
+#endif
+} fapi_tx_pwr_info_t;
+
+typedef struct PACK_STRUCT fapi_dl_pdsch_cbg_info
+{
+ uint8_t is_last_cb_present;
+ uint8_t is_inline_tb_crc;
+#ifndef FAPI_222_10_03
+ uint32_t dl_tb_crc;
+#else
+ uint32_t dlTbCrc[2];
+#endif
+
+} fapi_dl_pdsch_cbg_info_t;
+
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_dl_prb_sym_rm_patrn_by_val
+{
+ uint8_t freqDomainRB[35];
+ uint16_t symbolsInRB;
+} fapi_dl_prb_sym_rm_patrn_by_val_t;
+
+typedef struct PACK_STRUCT fapi_dl_coreset_rm_patrn
+{
+ uint8_t freqDomainResources[6];
+ uint16_t symbolsPatrn;
+} fapi_dl_coreset_rm_patrn_t;
+
+
+typedef struct PACK_STRUCT fapi_dl_rate_match_ref
+{
+ uint8_t ssbPdusForRateMatching[2];
+ uint8_t ssbConfigForRateMatching;
+ uint8_t prbSymRmPatrnBitmapSizeByRef;
+ uint8_t prbSymRmPatrnBitmapByRef[0]; // side depends on ceil(prbSymRmPatrnBitmapSizeByRef / 8)
+ uint8_t numPrbSymRmPatrnByVal;
+ fapi_dl_prb_sym_rm_patrn_by_val_t prbSymRmPatrnByValue[0];
+ uint8_t numCoresetRmPatrn;
+ fapi_dl_coreset_rm_patrn_t coresetRmPatrn[0];
+ uint16_t pdcchPduIndex;
+ uint16_t dciIndex;
+ uint8_t lteCrsRaMaPatrnBitmapSize;
+ uint8_t lteCrsRaMaPatrn[0]; // side depends on ceil(lteCrsRaMaPatrnBitmapSize / 8)
+ uint8_t numCsiRsForRaMa;
+ uint16_t csiRsForRaMa[0]; // side depends on numCsiRsForRaMa
+
+} fapi_dl_rate_match_ref_t;
+
+typedef struct PACK_STRUCT fapi_dl_code_word
+{
+ uint8_t cbgTxInfo;
+} fapi_dl_code_word_t;
+
+typedef struct PACK_STRUCT fapi_dl_tx_pwr_info
+{
+ uint16_t pdschDmrsPwrOffsetPrfSSS;
+ uint16_t pdschDataPwrOffsetPrfSSS;
+ uint8_t maxNumCbgPerTb;
+ fapi_dl_code_word_t codeWord[0];
+} fapi_dl_tx_pwr_info_t;
+
+typedef struct PACK_STRUCT fapi_dl_codeword_info
+{
+ uint8_t ldpcBaseGraph;
+ uint32_t tbSizeLbrmBytes;
+ uint8_t tbCrcRequired;
+
+} fapi_dl_codeword_info_t;
+
+typedef struct PACK_STRUCT fapi_dl_pdsch_mnt_parms
+{
+ uint8_t pdschTransType;
+ uint16_t coresetStartPoint;
+ uint16_t initialDlBwpSize;
+ fapi_dl_codeword_info_t codewordInfo;
+ fapi_dl_rate_match_ref_t rateMatchRef;
+ fapi_dl_tx_pwr_info_t txPwrInfo;
+} fapi_dl_pdsch_mnt_parms_t;
+
+typedef struct PACK_STRUCT fapi_dl_ptrs_tx_pwr_info
+{
+ uint16_t pdschPtrsPwrOffsetPrfSSS;
+}fapi_dl_ptrs_tx_pwr_info_t;
+
+typedef struct PACK_STRUCT fapi_dl_pdsch_ptrs_mnt_parms
+{
+ fapi_dl_ptrs_tx_pwr_info_t txPwrInfo;
+} fapi_dl_pdsch_ptrs_mnt_parms_t;
+
+typedef struct PACK_STRUCT fapi_dl_pdsch_ptrs2
+{
+ uint8_t ptrsPortIndex;
+ uint8_t ptrsTimeDensity;
+ uint8_t ptrsFreqDensity;
+ uint8_t ptrsReOffset;
+ uint8_t nEpreRatOfPdschToPtrsProfNR;
+} fapi_dl_pdsch_ptrs2_t;
+
+typedef struct PACK_STRUCT fapi_dl_pdsch_ptrsv3
+{
+ fapi_dl_ptrs_tx_pwr_info_t txPwrInfo;
+}fapi_dl_pdsch_ptrsv3_t;
+
+typedef struct PACK_STRUCT fapi_dl_rel16_pdsch_parms_t
+{
+ uint8_t repetitionScheme;
+ fapi_dl_pdsch_ptrs2_t pdschPtrs2;
+ fapi_dl_pdsch_ptrsv3_t pdschPtrsV3;
+} fapi_dl_rel16_pdsch_parms_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_pdsch_pdu
+{
+ uint16_t pdu_bit_map; /* Bit 0: pdschPtrs - Indicates PTRS included (FR2)
+ Bit 1:cbgRetxCtrl (Present when CBG based retransmit is used) */
+ uint16_t rnti;
+ uint16_t pdu_index;
+ fapi_bwp_t bwp;
+ uint8_t nr_of_code_words; /* SCF : Code Word Info Start */
+ fapi_codeword_pdu_t_ue_sim cw_info[FAPI_MAX_NUM_CW]; /* SCF : Code Word Info End */
+#ifdef FAPI_222_10_03
+ uint16_t nIdPdsch;
+#else
+ uint16_t data_scrambling_id;
+#endif
+ uint8_t nr_of_layers;
+ uint8_t transmission_scheme;
+ uint8_t ref_point;
+ fapi_dmrs_t dmrs;
+ fapi_pdsch_freq_dom_alloc_t pdsch_freq_dom_alloc;
+ fapi_pdsch_time_dom_alloc_t pdsch_time_dom_alloc;
+ fapi_dl_pdsch_ptrs_info_t pdsch_ptrs_info;
+ fapi_precoding_bmform_t_ue_sim pre_coding_and_beamforming;
+ fapi_tx_pwr_info_t tx_pwr_info;
+ fapi_dl_pdsch_cbg_info_t cbg_info;
+#ifdef FAPI_222_10_03
+ fapi_dl_pdsch_mnt_parms_t dlPdschMntparms;
+ fapi_dl_pdsch_ptrs_mnt_parms_t dlPdschPtrsMntParms;
+ fapi_dl_rel16_pdsch_parms_t rel16PdschParms;
+#endif
+} fapi_dl_pdsch_pdu_t_ue_sim;
+
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_basic_parms
+{
+ uint16_t csiRsPduIndex;
+} fapi_basic_parms_t;
+
+typedef struct PACK_STRUCT ifapi_csi_rs_tx_pwr_info
+{
+ uint16_t csiRsPowerOffsetProfileSSS;
+} fapi_csi_rs_tx_pwr_info_t;
+
+
+typedef struct PACK_STRUCT fapi_dl_csi_rs_mnt_parms
+{
+ fapi_basic_parms_t basic;
+ fapi_csi_rs_tx_pwr_info_t txPwrInfo;
+}fapi_dl_csi_rs_mnt_parms_t;
+#endif
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_csi_rs_pdu
+{
+#ifdef FAPI_222_10_03
+ uint8_t subCarrierSpacing;
+ uint8_t cyclicPrefix; /* BWP Configuration End*/
+#else
+ fapi_bwp_t bwp;
+#endif
+ uint16_t start_rb;
+ uint16_t nr_of_rbs;
+ uint8_t csi_type;
+ uint8_t row;
+ uint16_t freq_domain;
+ uint8_t symb_l0;
+ uint8_t symb_l1;
+ uint8_t cdm_type;
+ uint8_t freq_density;
+ uint16_t scram_id;
+ fapi_tx_pwr_info_t tx_pwr_info;
+ fapi_precoding_bmform_t_ue_sim pre_coding_and_beamforming;
+#ifdef FAPI_222_10_03
+ fapi_dl_csi_rs_mnt_parms_t csiRsMntParms;
+#endif
+} fapi_dl_csi_rs_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_phy_mib_pdu
+{
+ uint8_t dmrs_type_a_position;
+ uint8_t pdcch_config_sib1;
+ uint8_t cell_barred;
+ uint8_t intra_freq_reselction;
+} fapi_phy_mib_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_bch_payload
+{
+ union
+ {
+ uint32_t bch_payload;
+ fapi_phy_mib_pdu_t_ue_sim phy_mib_pdu;
+ } u;
+} fapi_bch_payload_t_ue_sim;
+
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_ssb_basic_parms
+{
+ uint8_t ssbPduIndex;
+ uint8_t cases;
+ uint8_t subcarrierSpacing;
+ uint8_t lMax;
+} fapi_ssb_basic_parms_t;
+
+typedef struct PACK_STRUCT fapi_ssb_tx_pwr_info
+{
+ uint16_t ssPbchBlockPowerScaling;
+ uint16_t betaPSSProfileSSS;
+} fapi_ssb_tx_pwr_info_t;
+
+typedef struct PACK_STRUCT fapi_dl_ssb_pbch_mnt_parms
+{
+ fapi_ssb_basic_parms_t basicParams;
+ fapi_ssb_tx_pwr_info_t tx_pwr_info;
+}fapi_dl_ssb_pbch_mnt_parms_t;
+
+#endif
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_ssb_pdu
+{
+
+ uint16_t phys_cell_id;
+#ifdef FAPI_222_10_03
+ uint8_t betaPssProfileNR;
+#else
+ uint8_t beta_pss;
+#endif
+ uint8_t ssb_block_index;
+ uint8_t ssb_sub_carrier_offset;
+ uint16_t ssb_offset_point_a;
+ uint8_t bch_payload_flag;
+ fapi_bch_payload_t_ue_sim bch_payload;
+ fapi_precoding_bmform_t_ue_sim pre_coding_and_beamforming;
+#ifdef FAPI_222_10_03
+ fapi_dl_ssb_pbch_mnt_parms_t ssbPbchMntParms;
+#endif
+} fapi_dl_ssb_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_tti_req_pdu
+{
+ uint16_t pdu_type;
+ uint16_t pdu_size;
+ union
+ {
+ fapi_dl_pdcch_pdu_t_ue_sim pdcch_pdu;
+ fapi_dl_pdsch_pdu_t_ue_sim pdsch_pdu;
+ fapi_dl_csi_rs_pdu_t_ue_sim csi_rs_pdu;
+ fapi_dl_ssb_pdu_t_ue_sim ssb_pdu;
+ }u;
+} fapi_dl_tti_req_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ue_info
+{
+ uint8_t n_ue;
+ uint8_t pdu_idx[];
+} fapi_ue_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dl_tti_req
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+#ifdef FAPI_222_10_03
+ uint16_t n_pdus;
+ uint8_t nDlTypes;
+ uint16_t nPDUsOfEachType[MAX_NDLTYPES_DL_TTI_REQ];
+#else
+ uint8_t n_pdus;
+#endif
+ uint8_t n_group;
+ fapi_dl_tti_req_pdu_t_ue_sim pdus[0];
+ fapi_ue_info_t_ue_sim ueGrpInfo[0];
+} fapi_dl_tti_req_t_ue_sim;
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_pRACH_Mntnc_param
+{
+ uint32_t handle;
+ uint8_t prachConfigScope;
+ uint16_t prachResConfigIndex;
+ uint8_t numFdRa;
+ uint8_t startPreambleIndex;
+ uint8_t numPreambleIndices;
+}fapi_pRACH_Mntnc_param_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_prach_pdu
+{
+ uint16_t phys_cell_id;
+ uint8_t num_prach_ocas;
+ uint8_t prach_format;
+#ifdef FAPI_222_10_03
+ uint8_t indexFdRa;
+#else
+ uint8_t num_ra;
+#endif
+ uint8_t prach_start_symbol;
+ uint16_t num_cs;
+ fapi_bmform_t beamforming;
+#ifdef FAPI_222_10_03
+ fapi_pRACH_Mntnc_param_t pRACH_Mntnc;
+#endif
+} fapi_ul_prach_pdu_t_ue_sim;
+
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pusch_data
+{
+ uint8_t rv_index;
+ uint8_t harq_process_id;
+ uint8_t new_data_indicator;
+ uint32_t tb_size;
+ uint16_t num_cb;
+ uint8_t cb_present_and_position[1];
+} fapi_pusch_data_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pusch_uci
+{
+ uint16_t harq_ack_bit_length;
+ uint16_t csi_part1_bit_length;
+#ifdef FAPI_222_10_03
+ uint16_t flagCsiPart2;
+#else
+ uint16_t csi_part2_bit_length;
+#endif
+ uint8_t alpha_scaling;
+ uint8_t beta_offset_harq_ack;
+ uint8_t beta_offset_csi1;
+ uint8_t beta_offset_csi2;
+} fapi_pusch_uci_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ptrs_info
+{
+ uint16_t ptrs_port_index;
+ uint8_t ptrs_dmrs_port;
+ uint8_t ptrs_re_offset;
+} fapi_ptrs_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pusch_ptrs
+{
+ uint8_t num_ptrs_ports;
+ fapi_ptrs_info_t_ue_sim ptrs_info[MAX_NUM_PTRS_PORTS];
+ uint8_t ptrs_time_density;
+ uint8_t ptrs_freq_density;
+ uint8_t ul_ptrs_power;
+} fapi_pusch_ptrs_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dfts_ofdm
+{
+ uint8_t low_papr_group_number;
+ uint16_t low_papr_sequence_number;
+ uint8_t ul_ptrs_sample_density;
+ uint8_t ul_ptrs_time_density_transform_precoding;
+} fapi_dfts_ofdm_t_ue_sim;
+
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_pusch_mnt_parms
+{
+ uint8_t puschTransType;
+ uint16_t deltaBwp0StartFromActiveBwp;
+ uint16_t initialUlBwpSize;
+ uint8_t groupOrSequenceHopping;
+ uint16_t puschSecondHopPRB;
+ uint8_t ldpcBaseGraph;
+ uint32_t tbSizeLbrmBytes;
+} fapi_pusch_mnt_parms_t;
+
+typedef struct PACK_STRUCT fapi_part2_parms
+{
+ uint16_t priority;
+ uint8_t numPart1Params;
+ uint16_t paramOffsets[0];
+ uint8_t paramSizes[0];
+ uint16_t part2SizeMapIndex;
+} fapi_part2_parms_t;
+
+typedef struct PACK_STRUCT fapi_optional_pusch_uci
+{
+ uint16_t numPart2s;
+ fapi_part2_parms_t part2_parms[0];
+} fapi_optional_pusch_uci_t;
+#endif
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_pusch_pdu
+{
+ uint16_t pdu_bitmap;
+ uint16_t rnti;
+ uint32_t handle;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_bwp_t bwp;
+#else
+ uint16_t bwp_size;
+ uint16_t bwp_start;
+ uint8_t sub_carrier_spacing;
+ uint8_t cyclic_prefix;
+#endif
+ uint16_t target_code_rate;
+ uint8_t qam_mod_order;
+ uint8_t mcs_index;
+ uint8_t mcs_table;
+ uint8_t transform_precoding;
+#ifdef FAPI_222_10_03
+ uint16_t nIdPusch;
+#else
+ uint16_t data_scrambling_id;
+#endif
+ uint8_t nr_of_layers;
+ uint16_t ul_dmrs_symb_pos;
+ uint8_t dmrs_config_type;
+ uint16_t ul_dmrs_scrambling_id;
+ uint16_t pusch_identity;
+#ifdef FAPI_222_10_03
+ uint8_t nScid;
+#else
+ uint8_t scid;
+#endif
+ uint8_t num_dmrs_cdm_grps_no_data;
+ uint16_t dmrs_ports;
+ uint8_t resource_alloc;
+ uint8_t rb_bitmap[36];
+ uint16_t rb_start;
+ uint16_t rb_size;
+ uint8_t vrb_to_prb_mapping;
+#ifdef FAPI_222_10_03
+ uint8_t IntraSlotFrequencyHopping;
+#else
+ uint8_t frequency_hopping;
+#endif
+ uint16_t tx_direct_current_location;
+ uint8_t uplink_frequency_shift7p5khz;
+ uint8_t start_symb_index;
+ uint8_t nr_of_symbols;
+ fapi_pusch_data_t_ue_sim pusch_data;
+ fapi_pusch_uci_t_ue_sim pusch_uci;
+ fapi_pusch_ptrs_t_ue_sim pusch_ptrs;
+ fapi_dfts_ofdm_t_ue_sim dfts_ofdm;
+ fapi_bmform_t beamforming;
+#ifdef FAPI_222_10_03
+ fapi_pusch_mnt_parms_t puschMntParms;
+ fapi_optional_pusch_uci_t optionalPuschUci;
+#endif
+} fapi_ul_pusch_pdu_t_ue_sim;
+#ifdef FAPI_222_10_03
+typedef struct PACK_STRUCT fapi_pUCCH_Mntnnc_params
+{
+ uint8_t maxCodeRate;
+ uint8_t ulBwpId;
+} fapi_pucch_mntnnc_params_t;
+typedef struct PACK_STRUCT fapi_uci_part2
+{
+ uint16_t priority;
+ uint8_t numPart1Params;
+ uint16_t paramOffsets[0];
+ uint8_t paramSizes[0];
+ uint8_t part2SizeMapIndex;
+}fapi_uci_part2_t;
+typedef struct PACK_STRUCT fapi_uci_part1_part2
+{
+ uint16_t numPart2s;
+ fapi_uci_part2_t uci_part2[0];
+} fapi_uci_part1_part2_t;
+#endif
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_pucch_pdu
+{
+ uint16_t rnti;
+ uint32_t handle;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_bwp_t bwp;
+#else
+ uint16_t bwp_size;
+ uint16_t bwp_start;
+ uint8_t sub_carrier_spacing;
+ uint8_t cyclic_prefix;
+#endif
+ uint8_t format_type;
+ uint8_t multi_slot_tx_indicator;
+ uint8_t pi2_bpsk;
+ uint16_t prb_start;
+ uint16_t prb_size;
+ uint8_t start_symbol_index;
+ uint8_t nr_of_symbols;
+#ifdef FAPI_222_10_03
+ uint8_t intraSlotFrequencyHopping;
+#else
+ uint8_t freq_hop_flag;
+#endif
+ uint16_t second_hop_prb;
+#ifdef FAPI_222_10_03
+ uint8_t pucchGroupHopping;
+ uint8_t obsolete8bit;
+ uint8_t nIdPucchHopping;
+#else
+ uint8_t group_hop_flag;
+ uint8_t sequence_hop_flag;
+ uint16_t hopping_id;
+#endif
+ uint16_t initial_cyclic_shift;
+#ifdef FAPI_222_10_03
+ uint16_t nIdPucchScrambling;
+#else
+ uint16_t data_scrambling_id;
+#endif
+ uint8_t time_domain_occ_idx;
+ uint8_t pre_dft_occ_idx;
+ uint8_t pre_dft_occ_len;
+ uint8_t add_dmrs_flag;
+ uint16_t dmrs_scrambling_id;
+ uint8_t dmrs_cyclic_shift;
+ uint8_t sr_flag;
+ uint16_t bit_len_harq;
+#ifdef FAPI_222_10_03
+ uint16_t csiPart1BitLength;
+#else
+ uint16_t bit_len_csi_part1;
+ uint16_t bit_len_csi_part2;
+#endif
+ fapi_bmform_t beamforming;
+#ifdef FAPI_222_10_03
+ fapi_pucch_mntnnc_params_t pucch_basicextension;
+ fapi_uci_part1_part2_t uci_part1_part2;
+#endif
+} fapi_ul_pucch_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_srs_pdu
+{
+ uint16_t rnti;
+ uint32_t handle;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_bwp_t bwp;
+#else
+ uint16_t bwp_size;
+ uint16_t bwp_start;
+ uint8_t sub_carrier_spacing;
+ uint8_t cyclic_prefix;
+#endif
+ uint8_t num_ant_ports;
+ uint8_t num_symbols;
+ uint8_t num_repetitions;
+ uint8_t time_start_position;
+ uint8_t config_index;
+ uint16_t sequence_id;
+ uint8_t bandwidth_index;
+ uint8_t comb_size;
+ uint8_t comb_offset;
+ uint8_t cyclic_shift;
+ uint8_t frequency_position;
+ uint16_t frequency_shift;
+ uint8_t frequency_hopping;
+ uint8_t group_or_sequence_hopping;
+ uint8_t resource_type;
+ uint16_t t_srs;
+ uint16_t t_offset;
+ fapi_bmform_t beamforming;
+} fapi_ul_srs_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_tti_req_pdu
+{
+ uint16_t pdu_type;
+ uint16_t pdu_size;
+ union
+ {
+ fapi_ul_prach_pdu_t_ue_sim prach_pdu;
+ fapi_ul_pusch_pdu_t_ue_sim pusch_pdu;
+ fapi_ul_pucch_pdu_t_ue_sim pucch_pdu;
+ fapi_ul_srs_pdu_t_ue_sim srs_pdu;
+ //fapi_ul_rx_bmform_pdu_t rx_beamforming_pdu;
+ }u;
+} fapi_ul_tti_req_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_tti_req
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+#ifdef FAPI_222_10_03
+ uint16_t n_pdus;
+ uint8_t nUlTypes;
+/* [0]: number of PRACH PDUs [1]: number of PUSCH PDUs [2]: number of Format 0/1 PUCCH PDUs [3]: number of Format 2/3/4 PUCCH PDUs [4]: number of SRS PDUs */
+ uint16_t nPDUsOfEachType[MAX_NUM_UL_TYPES];
+#else
+ /* Indicates if a RACH PDU will be included in this message.
+ * 0: no RACH in this slot
+ * 1: RACH in this slot */
+ uint8_t rach_present;
+ uint8_t n_ulsch; /* Number of ULSCH PDUs that are included in this message.*/
+ uint8_t n_ulcch; /* Number of ULCCH PDUs that are included in this message.*/
+ uint8_t n_pdus;
+#endif
+ uint8_t n_group; /* Number of UE Groups included in this message.*/
+ fapi_ul_tti_req_pdu_t_ue_sim pdus[0];
+ fapi_ue_info_t_ue_sim ueGrpInfo[0];
+} fapi_ul_tti_req_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_dci_pdu
+{
+ uint16_t pdu_type;
+ uint16_t pdu_size;
+ fapi_dl_pdcch_pdu_t_ue_sim pdcch_pdu;
+} fapi_dci_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_ul_dci_req
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t num_pdus;
+#ifdef FAPI_222_10_03
+ uint8_t nDlTypes;
+ uint16_t nPDUsOfEachType[MAX_NDLTYPES_UL_DCI_REQ];
+#endif
+ fapi_dci_pdu_t_ue_sim pdus[];
+} fapi_ul_dci_req_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_tx_pdu_desc
+{
+ uint32_t pduLength;
+ uint16_t pduIndex;
+#ifdef FAPI_222_10_03
+ uint8_t cwIndex; /* Ref: Table 3-90 Tx_Data.request message */
+#endif
+ uint32_t numTlvs;
+ fapi_tx_dat_tlv_t tlvs[];
+} fapi_tx_pdu_desc_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_tx_data_req
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t numPdus;
+#ifdef VZ_VERIPHY_INTEG
+ fapi_tx_pdu_desc_t_ue_sim pduDesc[];
+#else
+ fapi_tx_pdu_desc_t_ue_sim pduDesc[];
+#endif
+} fapi_tx_data_req_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_pdu_ind_info
+{
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t harq_id;
+#ifndef VZ_VERIPHY_INTEG
+ uint16_t pdu_length;
+#endif
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+#ifdef VZ_VERIPHY_INTEG
+ uint16_t pduTag;
+ uint32_t pdu_length;
+ uint64_t pduDataOrOffset; //Shared memory offset // 5G FAPI Table 3-61 Subset
+#else
+ void* pdu_data;
+#endif
+} fapi_pdu_ind_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_rx_data_indication
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t num_pdus;
+ fapi_pdu_ind_info_t_ue_sim pdus[MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI];
+} fapi_rx_data_indication_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_crc_ind_info
+{
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t harq_id;
+ uint8_t tb_crc_status;
+ uint16_t num_cb;
+ uint8_t cb_crc_status[MAX_NUM_CB_PER_TTI_IN_BYTES];
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+} fapi_crc_ind_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_crc_ind
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t num_crcs;
+ fapi_crc_ind_info_t_ue_sim crc[MAX_NUMBER_OF_CRCS_PER_SLOT];
+} fapi_crc_ind_t_ue_sim;
+
+typedef enum PACK_STRUCT fapi_uci_mux_typ
+{
+ FAPI_UCI_SR = 1,
+ FAPI_UCI_HQ = 2,
+ FAPI_UCI_CSI_P1 = 4,
+ FAPI_UCI_CSI_P2 = 8,
+ FAPI_UCI_MUX_TYP_SR_HQ = 3,
+ FAPI_UCI_MUX_TYP_SR_CSI_1 = 5,
+ FAPI_UCI_MUX_TYP_HQ_CSI_1 = 6,
+ FAPI_UCI_MUX_TYP_SR_HQ_CSI_1 = 7
+}fapi_uci_mux_typ_t;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_harq_info
+{
+ uint8_t harq_crc;
+ uint16_t harq_bit_len;
+ uint8_t harq_payload[MAX_HARQ_INFO_LEN_BYTES];
+} fapi_harq_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_csi_p1_info
+{
+ uint8_t csi_part1_crc;
+ uint16_t csi_part1_bit_len;
+ uint8_t csi_part1_payload[MAX_CSI_PART1_DATA_BYTES];
+} fapi_csi_p1_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_csi_p2_info
+{
+ uint8_t csi_part2_crc;
+ uint16_t csi_part2_bit_len;
+ uint8_t csi_part2_payload[MAX_CSI_PART2_DATA_BYTES];
+} fapi_csi_p2_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uci_o_pusch
+{
+ uint8_t pdu_bitmap;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+ fapi_harq_info_t_ue_sim harqInfo; // This is included if indicated by the pduBitmap
+ fapi_csi_p1_info_t_ue_sim csiPart1info; // This is included if indicated by the pduBitmap
+ fapi_csi_p2_info_t_ue_sim csiPart2info; // This is included if indicated by the pduBitmap
+} fapi_uci_o_pusch_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_sr_f0f1_info
+{
+ uint8_t sr_indication;
+ uint8_t sr_confidence_level;
+} fapi_sr_f0f1_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_harq_f0f1_info
+{
+ uint8_t num_harq;
+ uint8_t harq_confidence_level;
+ uint8_t harq_value[MAX_NUMBER_OF_HARQS_PER_IND];
+} fapi_harq_f0f1_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_sr_f2f3f4_info
+{
+ uint16_t sr_bitlen;
+ uint8_t sr_payload[MAX_SR_PAYLOAD_SIZE];
+} fapi_sr_f2f3f4_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_harq_f2f3f4_info
+{
+ uint8_t harq_crc;
+ uint16_t harq_bit_len;
+ uint8_t harq_payload[MAX_HARQ_PAYLOAD_SIZE];
+} fapi_harq_f2f3f4_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uci_o_pucch_f2f3f4
+{
+ uint8_t pdu_bitmap;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t pucch_format;
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+ fapi_sr_f2f3f4_info_t_ue_sim srInfo; // This is included if indicated by the pduBitmap
+ fapi_harq_f2f3f4_info_t_ue_sim harqInfo; // This is included if indicated by the pduBitmap
+ fapi_csi_p1_info_t_ue_sim csiPart1Info; // This is included if indicated by the pduBitmap
+ fapi_csi_p2_info_t_ue_sim csiPart2Info; // This is included if indicated by the pduBitmap
+} fapi_uci_o_pucch_f2f3f4_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uci_o_pucch_f0f1
+{
+ uint8_t pdu_bitmap;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t pucch_format;
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+ fapi_sr_f0f1_info_t_ue_sim srInfo; // This is included if indicated by the pduBitmap
+ fapi_harq_f0f1_info_t_ue_sim harqInfo; // This is included if indicated by the pduBitmap
+} fapi_uci_o_pucch_f0f1_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uci_pdu_info
+{
+ uint16_t pdu_type;
+ uint16_t pdu_size;
+ union
+ {
+ fapi_uci_o_pusch_t_ue_sim uci_pusch;
+ fapi_uci_o_pucch_f0f1_t_ue_sim uci_pucch_f0f1;
+ fapi_uci_o_pucch_f2f3f4_t_ue_sim uci_pucch_f2f3f4;
+ }u;
+} fapi_uci_pdu_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_uci_indication
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t num_ucis;
+ fapi_uci_pdu_info_t_ue_sim uci_pdu[] ;//max length of the array MAX_NUMBER_UCI_PDUS_PER_SLOT;
+} fapi_uci_indication_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_symb_snr
+{
+ uint16_t numRbs;
+ uint8_t rbSNR[MAX_NUMBER_RBS];
+} fapi_symb_snr_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_srs_pdu
+{
+ uint32_t handle;
+ uint16_t rnti;
+ uint16_t timingAdvance;
+ uint8_t numSymbols;
+ uint8_t wideBandSnr;
+ uint8_t numReportedSymbols;
+ fapi_symb_snr_t_ue_sim symbSnr[MAX_NUMBER_OF_REP_SYMBOLS];
+} fapi_srs_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_srs_indication
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t numPdus;
+ fapi_srs_pdu_t_ue_sim srsPdus[MAX_NUMBER_SRS_PDUS_PER_SLOT];
+} fapi_srs_indication_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_preamble_info
+{
+ uint8_t preambleIndex;
+ uint16_t timingAdvance;
+ uint32_t premblePwr;
+#ifdef FAPI_222_10_03
+ uint8_t preambleSnr;
+#endif
+} fapi_preamble_info_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_rach_pdu
+{
+#ifdef FAPI_222_10_03
+ uint16_t handle;
+#else
+ uint16_t physCellId;
+#endif
+ uint8_t symbolIndex;
+ uint8_t slotIndex;
+#ifdef FAPI_222_10_03
+ uint8_t raIndex;
+#else
+ uint8_t freqIndex;
+#endif
+#ifdef VZ_VERIPHY_INTEG
+ uint8_t ulCarrierId;
+#endif
+#ifdef FAPI_222_10_03
+ uint16_t avgRssi;
+#else
+ uint8_t avgRssi;
+#endif
+ uint8_t avgSnr;
+ uint8_t numPreamble;
+ fapi_preamble_info_t_ue_sim preambleInfo[MAX_NUM_PREAMBLES_PER_SLOT];
+} fapi_rach_pdu_t_ue_sim;
+
+// Updated per 5G FAPI
+typedef struct PACK_STRUCT fapi_rach_indication
+{
+ fapi_msg_header_t_ue_sim header;
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t numPdus;
+ fapi_rach_pdu_t_ue_sim rachPdu[MAX_NUMBER_RACH_PDUS_PER_SLOT];
+} fapi_rach_indication_t_ue_sim;
+
+/*!
+ ** \struct pkd_fapi_l1api_msg_frmt
+ ** \brief This structure is FAPI L1API message format towards L1.
+ **/
+typedef struct PACK_STRUCT pkd_fapi_l1api_msg_frmt
+{
+ /*!
+ * Message Type ID
+ **/
+ uint8_t msg_id;
+ /**
+ * Length of vendor-specific message body (bytes)
+ **/
+ uint8_t vendor_spec_msg_len;
+ /**
+ * Length of message body (bytes)
+ **/
+ uint16_t msg_len;
+ /**
+ * Message Body.(Dummy Field)
+ **/
+ uint8_t* msg_body;
+ /**
+ * Vendor message Body.(Dummy Field)
+ **/
+ uint8_t* vendor_spec_msg_body;
+
+} pkd_fapi_l1api_msg_frmt_t;
+
+
+
+
+//------------------------------------------------------------------------------
+
+#if defined(__cplusplus)
+}
+#endif
+#endif
--- /dev/null
+!_TAG_FILE_FORMAT 2 /extended format; --format=1 will not append ;" to lines/
+!_TAG_FILE_SORTED 1 /0=unsorted, 1=sorted, 2=foldcase/
+!_TAG_PROGRAM_AUTHOR Darren Hiebert /dhiebert@users.sourceforge.net/
+!_TAG_PROGRAM_NAME Exuberant Ctags //
+!_TAG_PROGRAM_URL http://ctags.sourceforge.net /official site/
+!_TAG_PROGRAM_VERSION 5.8 //
+CL_MEM_REGION fapi_cl_utils.h 19;" d
+CL_POOL fapi_cl_utils.h 20;" d
+ClCb fapi_cl.h /^}ClCb;$/;" t typeref:struct:clCb
+DCI_PAYLOAD_BYTE_LEN fapi_interface_ue_sim.h 339;" d
+EVT_CNTL_REQUEST fapi_cl.h 28;" d
+EVT_DATA_REQUEST fapi_cl.h 27;" d
+EVT_RECP_REQUEST fapi_cl.h 26;" d
+FAPI_BCH_PAYLOAD_FLAG_TAG fapi_interface_ue_sim.h 153;" d
+FAPI_BCH_PAYLOAD_TAG fapi_interface_ue_sim.h 155;" d
+FAPI_BEAM_IDX fapi_interface_ue_sim.h 228;" d
+FAPI_BEAM_ID_TAG fapi_interface_ue_sim.h 187;" d
+FAPI_BETA_PSS_TAG fapi_interface_ue_sim.h 182;" d
+FAPI_CAPABILITY_VALIDITY_TAG fapi_interface_ue_sim.h 281;" d
+FAPI_CARRIER_CONFIGURATION_TAG fapi_interface_ue_sim.h 128;" d
+FAPI_CCE_MAPPING_TYPE_TAG fapi_interface_ue_sim.h 71;" d
+FAPI_CL_FREE fapi_cl_utils.h 33;" d
+FAPI_CL_MEM_LOG fapi_cl_utils.h 23;" d
+FAPI_CL_MEM_LOG fapi_cl_utils.h 29;" d
+FAPI_CONFIG_REQUEST fapi_interface_ue_sim.h 32;" d
+FAPI_CONFIG_RESPONSE fapi_interface_ue_sim.h 33;" d
+FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG fapi_interface_ue_sim.h 72;" d
+FAPI_CRC_INDICATION fapi_interface_ue_sim.h 48;" d
+FAPI_CSI_RS_RATE_MATCH_TAG fapi_interface_ue_sim.h 271;" d
+FAPI_CYCLIC_PREFIX_TAG fapi_interface_ue_sim.h 65;" d
+FAPI_DFE_PROFILE_TAG fapi_interface_ue_sim.h 285;" d
+FAPI_DFTS_OFDM_SUPPORT_TAG fapi_interface_ue_sim.h 111;" d
+FAPI_DIG_BEAM_WEIGHT_IM fapi_interface_ue_sim.h 230;" d
+FAPI_DIG_BEAM_WEIGHT_RE fapi_interface_ue_sim.h 229;" d
+FAPI_DL_BANDWIDTH_TAG fapi_interface_ue_sim.h 130;" d
+FAPI_DL_FREQUENCY_TAG fapi_interface_ue_sim.h 131;" d
+FAPI_DL_GRIDSIZE_TAG fapi_interface_ue_sim.h 133;" d
+FAPI_DL_K0_TAG fapi_interface_ue_sim.h 132;" d
+FAPI_DL_NODE_SYNC fapi_interface_ue_sim.h 54;" d
+FAPI_DL_TTI_REQUEST fapi_interface_ue_sim.h 42;" d
+FAPI_DL_TTI_TIMING_OFFSET_TAG fapi_interface_ue_sim.h 289;" d
+FAPI_ERROR_INDICATION fapi_interface_ue_sim.h 40;" d
+FAPI_FRAME_DUPLEX_TYPE_TAG fapi_interface_ue_sim.h 144;" d
+FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG fapi_interface_ue_sim.h 140;" d
+FAPI_INDICATION_INSTANCES_PER_SLOT_TAG fapi_interface_ue_sim.h 125;" d
+FAPI_K1_TAG fapi_interface_ue_sim.h 168;" d
+FAPI_LTE_CRS_RATE_MATCH_PATTERN_TAG fapi_interface_ue_sim.h 211;" d
+FAPI_MAXNUMPDUS_INDL_TTI_TAG fapi_interface_ue_sim.h 258;" d
+FAPI_MAXNUMPDUS_INUL_DCI_TAG fapi_interface_ue_sim.h 260;" d
+FAPI_MAXNUMPDUS_INUL_TTI_TAG fapi_interface_ue_sim.h 259;" d
+FAPI_MAXNUM_PRACH_CONFIGURATIONS_TAG fapi_interface_ue_sim.h 278;" d
+FAPI_MAXNUM_UlBWPIDS_TAG fapi_interface_ue_sim.h 264;" d
+FAPI_MAX_FREQ_DOMAIN_RES fapi_interface_ue_sim.h 253;" d
+FAPI_MAX_MU_MIMO_USERS_DL_TAG fapi_interface_ue_sim.h 91;" d
+FAPI_MAX_MU_MIMO_USERS_UL_TAG fapi_interface_ue_sim.h 110;" d
+FAPI_MAX_NUMBER_MIMO_LAYERS_CB_PUSCH_TAG fapi_interface_ue_sim.h 274;" d
+FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG fapi_interface_ue_sim.h 108;" d
+FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG fapi_interface_ue_sim.h 89;" d
+FAPI_MAX_NUM_CW fapi_interface_ue_sim.h 252;" d
+FAPI_MAX_NUM_UCIMAPS_TAG fapi_interface_ue_sim.h 280;" d
+FAPI_MAX_PDCCHS_PER_SLOT_TAG fapi_interface_ue_sim.h 76;" d
+FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG fapi_interface_ue_sim.h 88;" d
+FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG fapi_interface_ue_sim.h 107;" d
+FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG fapi_interface_ue_sim.h 117;" d
+FAPI_MAX_PUCCHS_PER_SLOT_TAG fapi_interface_ue_sim.h 79;" d
+FAPI_MIB_TAG fapi_interface_ue_sim.h 185;" d
+FAPI_MORE_THAN_ONE_INDICATION_PER_SLOT_TAG fapi_interface_ue_sim.h 286;" d
+FAPI_MORE_THAN_ONE_REQUEST_PER_SLOT_TAG fapi_interface_ue_sim.h 287;" d
+FAPI_MSG_BCH_MISSING fapi_interface_ue_sim.h 242;" d
+FAPI_MSG_INVALID_CONFIG fapi_interface_ue_sim.h 239;" d
+FAPI_MSG_INVALID_SFN fapi_interface_ue_sim.h 243;" d
+FAPI_MSG_INVALID_STATE fapi_interface_ue_sim.h 238;" d
+FAPI_MSG_OK fapi_interface_ue_sim.h 237;" d
+FAPI_MSG_SFN_OUT_OF_SYNC fapi_interface_ue_sim.h 240;" d
+FAPI_MSG_SLOT_ERR fapi_interface_ue_sim.h 241;" d
+FAPI_MSG_TX_ERR fapi_interface_ue_sim.h 245;" d
+FAPI_MSG_UL_DCI_ERR fapi_interface_ue_sim.h 244;" d
+FAPI_MTRP_SUPPORT_TAG fapi_interface_ue_sim.h 288;" d
+FAPI_MULTIPLE_CELLS_SSPBCH_IN_A_CARRIER_TAG fapi_interface_ue_sim.h 262;" d
+FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG fapi_interface_ue_sim.h 189;" d
+FAPI_MULTI_PRACH_CONFIGURATION_TAG fapi_interface_ue_sim.h 177;" d
+FAPI_MULTI_SSB_RESOURCE_CONFIGURATION_TAG fapi_interface_ue_sim.h 194;" d
+FAPI_NR_SSB_PERIODICITY_10MS fapi_interface_ue_sim.h /^ FAPI_NR_SSB_PERIODICITY_10MS,$/;" e enum:nr_ssb_periodicity
+FAPI_NR_SSB_PERIODICITY_160MS fapi_interface_ue_sim.h /^ FAPI_NR_SSB_PERIODICITY_160MS$/;" e enum:nr_ssb_periodicity
+FAPI_NR_SSB_PERIODICITY_20MS fapi_interface_ue_sim.h /^ FAPI_NR_SSB_PERIODICITY_20MS,$/;" e enum:nr_ssb_periodicity
+FAPI_NR_SSB_PERIODICITY_40MS fapi_interface_ue_sim.h /^ FAPI_NR_SSB_PERIODICITY_40MS,$/;" e enum:nr_ssb_periodicity
+FAPI_NR_SSB_PERIODICITY_5MS fapi_interface_ue_sim.h /^ FAPI_NR_SSB_PERIODICITY_5MS,$/;" e enum:nr_ssb_periodicity
+FAPI_NR_SSB_PERIODICITY_80MS fapi_interface_ue_sim.h /^ FAPI_NR_SSB_PERIODICITY_80MS,$/;" e enum:nr_ssb_periodicity
+FAPI_NUMOFRATE_MATCH_PATTERN_LTECRC_INPHY_TAG fapi_interface_ue_sim.h 270;" d
+FAPI_NUM_ANT_PORTS fapi_interface_ue_sim.h 233;" d
+FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG fapi_interface_ue_sim.h 64;" d
+FAPI_NUM_DIG_BEAMS fapi_interface_ue_sim.h 226;" d
+FAPI_NUM_LAYERS fapi_interface_ue_sim.h 232;" d
+FAPI_NUM_OF_RATE_MATCH_PATTERNLTECRCPERSLOT_TAG fapi_interface_ue_sim.h 269;" d
+FAPI_NUM_PRACH_FD_OCCASIONS_TAG fapi_interface_ue_sim.h 165;" d
+FAPI_NUM_ROOT_SEQUENCES_TAG fapi_interface_ue_sim.h 167;" d
+FAPI_NUM_RX_ANT_TAG fapi_interface_ue_sim.h 139;" d
+FAPI_NUM_RX_PORTS_TRP1_TAG fapi_interface_ue_sim.h 223;" d
+FAPI_NUM_TX_ANT_TAG fapi_interface_ue_sim.h 134;" d
+FAPI_NUM_TX_PORTS_TRP1_TAG fapi_interface_ue_sim.h 222;" d
+FAPI_NUM_TX_RUS fapi_interface_ue_sim.h 227;" d
+FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG fapi_interface_ue_sim.h 170;" d
+FAPI_PARAM_REQUEST fapi_interface_ue_sim.h 30;" d
+FAPI_PARAM_RESPONSE fapi_interface_ue_sim.h 31;" d
+FAPI_PDCCH_MU_MIMO_TAG fapi_interface_ue_sim.h 74;" d
+FAPI_PDCCH_PRECODER_CYCLING_TAG fapi_interface_ue_sim.h 75;" d
+FAPI_PDCCH_RATE_MATCH_TAG fapi_interface_ue_sim.h 268;" d
+FAPI_PDSCH_ALLOCATION_TYPES_TAG fapi_interface_ue_sim.h 82;" d
+FAPI_PDSCH_CBG_SCHEME fapi_interface_ue_sim.h 215;" d
+FAPI_PDSCH_CBG_TAG fapi_interface_ue_sim.h 84;" d
+FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG fapi_interface_ue_sim.h 92;" d
+FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG fapi_interface_ue_sim.h 87;" d
+FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG fapi_interface_ue_sim.h 85;" d
+FAPI_PDSCH_DMRS_MAX_LENGTH_TAG fapi_interface_ue_sim.h 86;" d
+FAPI_PDSCH_MAC_PDU_BIT_ALIGNMENT_TAG fapi_interface_ue_sim.h 273;" d
+FAPI_PDSCH_MAPPING_TYPE_TAG fapi_interface_ue_sim.h 81;" d
+FAPI_PDSCH_NON_SLOT_SUPPORT_TAG fapi_interface_ue_sim.h 94;" d
+FAPI_PDSCH_TRANS_TYPE_SUPPORT_TAG fapi_interface_ue_sim.h 272;" d
+FAPI_PDSCH_TRANS_TYPE_VALIDITY_TAG fapi_interface_ue_sim.h 146;" d
+FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG fapi_interface_ue_sim.h 83;" d
+FAPI_PHY_CELL_ID_TAG fapi_interface_ue_sim.h 143;" d
+FAPI_PHY_PARAMS_TAG fapi_interface_ue_sim.h 282;" d
+FAPI_PHY_PROFILE_ID_TAG fapi_interface_ue_sim.h 124;" d
+FAPI_PHY_PROTOCOL_VERSION_TAG fapi_interface_ue_sim.h 284;" d
+FAPI_PHY_STATE_TAG fapi_interface_ue_sim.h 61;" d
+FAPI_PM_IDX fapi_interface_ue_sim.h 231;" d
+FAPI_POWER_PROFILES_SUPPORTED_TAG fapi_interface_ue_sim.h 257;" d
+FAPI_PRACH_CONFIGURATION_TAG fapi_interface_ue_sim.h 160;" d
+FAPI_PRACH_CONFIG_INDEX_TAG fapi_interface_ue_sim.h 204;" d
+FAPI_PRACH_LONG_FORMATS_TAG fapi_interface_ue_sim.h 114;" d
+FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG fapi_interface_ue_sim.h 173;" d
+FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_Band_TAG fapi_interface_ue_sim.h 279;" d
+FAPI_PRACH_RESTRICTED_SETS_TAG fapi_interface_ue_sim.h 116;" d
+FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG fapi_interface_ue_sim.h 166;" d
+FAPI_PRACH_SEQUENCE_LENGTH_TAG fapi_interface_ue_sim.h 162;" d
+FAPI_PRACH_SHORT_FORMATS_TAG fapi_interface_ue_sim.h 115;" d
+FAPI_PRACH_SUBC_SPACING_TAG fapi_interface_ue_sim.h 163;" d
+FAPI_PRACH_ZERO_CORR_CONF_TAG fapi_interface_ue_sim.h 169;" d
+FAPI_PRB_SYMBOL_RATE_MATCH_PATTERN_TAG fapi_interface_ue_sim.h 209;" d
+FAPI_PRECODER_GRANULARITY_CORESET_TAG fapi_interface_ue_sim.h 73;" d
+FAPI_PRECODER_WEIGHT_IM fapi_interface_ue_sim.h 235;" d
+FAPI_PRECODER_WEIGHT_RE fapi_interface_ue_sim.h 234;" d
+FAPI_PREMPTIONSUPPORT_TAG fapi_interface_ue_sim.h 93;" d
+FAPI_PROTOCOLVERSION_TAG fapi_interface_ue_sim.h 256;" d
+FAPI_PUCCHGROUP_AND_SEQUENCE_HOPPING_TAG fapi_interface_ue_sim.h 263;" d
+FAPI_PUCCH_AGGREGATION_TAG fapi_interface_ue_sim.h 265;" d
+FAPI_PUCCH_FORMATS_TAG fapi_interface_ue_sim.h 78;" d
+FAPI_PUCCH_SEMI_STATIC_CONFIG_TAG fapi_interface_ue_sim.h 213;" d
+FAPI_PUSCH_AGGREGATION_FACTOR_TAG fapi_interface_ue_sim.h 112;" d
+FAPI_PUSCH_ALLOCATION_TYPES_TAG fapi_interface_ue_sim.h 104;" d
+FAPI_PUSCH_CBG_TAG fapi_interface_ue_sim.h 102;" d
+FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG fapi_interface_ue_sim.h 101;" d
+FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG fapi_interface_ue_sim.h 99;" d
+FAPI_PUSCH_DMRS_MAX_LEN_TAG fapi_interface_ue_sim.h 100;" d
+FAPI_PUSCH_FREQUENCY_HOPPING_TAG fapi_interface_ue_sim.h 98;" d
+FAPI_PUSCH_LBRM_SUPPORT_TAG fapi_interface_ue_sim.h 275;" d
+FAPI_PUSCH_MAC_PDU_BIT_ALIGNMENT_TAG fapi_interface_ue_sim.h 277;" d
+FAPI_PUSCH_MAPPING_TYPE_TAG fapi_interface_ue_sim.h 103;" d
+FAPI_PUSCH_MAX_PTRS_PORTS_TAG fapi_interface_ue_sim.h 106;" d
+FAPI_PUSCH_TRANS_TYPE_SUPPORT_TAG fapi_interface_ue_sim.h 276;" d
+FAPI_PUSCH_TRANS_TYPE_VALIDITY_TAG fapi_interface_ue_sim.h 147;" d
+FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG fapi_interface_ue_sim.h 105;" d
+FAPI_RACH_INDICATION fapi_interface_ue_sim.h 51;" d
+FAPI_RELEASE_CAPABILITY_TAG fapi_interface_ue_sim.h 60;" d
+FAPI_REQUEST_INSTANCES_PER_SLOT_TAG fapi_interface_ue_sim.h 126;" d
+FAPI_RESTRICTED_SET_CONFIG_TAG fapi_interface_ue_sim.h 164;" d
+FAPI_RSSI_MEASUREMENT_SUPPORT_TAG fapi_interface_ue_sim.h 119;" d
+FAPI_RSSI_MESUREMENT_TAG fapi_interface_ue_sim.h 203;" d
+FAPI_RX_DATA_INDICATION fapi_interface_ue_sim.h 47;" d
+FAPI_SCS_COMMON_TAG fapi_interface_ue_sim.h 156;" d
+FAPI_SKIP_BLANK_DL_CONFIG_TAG fapi_interface_ue_sim.h 62;" d
+FAPI_SKIP_BLANK_UL_CONFIG_TAG fapi_interface_ue_sim.h 63;" d
+FAPI_SLOT_CONFIG_TAG fapi_interface_ue_sim.h 200;" d
+FAPI_SLOT_INDICATION fapi_interface_ue_sim.h 44;" d
+FAPI_SRS_INDICATION fapi_interface_ue_sim.h 50;" d
+FAPI_SSB_MASK_TAG fapi_interface_ue_sim.h 186;" d
+FAPI_SSB_OFFSET_POINT_A_TAG fapi_interface_ue_sim.h 181;" d
+FAPI_SSB_PERIOD_TAG fapi_interface_ue_sim.h 183;" d
+FAPI_SSB_PER_RACH_TAG fapi_interface_ue_sim.h 172;" d
+FAPI_SSB_RATE_MATCH_TAG fapi_interface_ue_sim.h 266;" d
+FAPI_SSB_RESOURCE_CONFIGURATION_TAG fapi_interface_ue_sim.h 179;" d
+FAPI_SSB_SUBCARRIER_OFFSET_TAG fapi_interface_ue_sim.h 184;" d
+FAPI_SSPBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG fapi_interface_ue_sim.h 261;" d
+FAPI_SS_PBCH_BLOCK_POWER_SCALING_TAG fapi_interface_ue_sim.h 152;" d
+FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG fapi_interface_ue_sim.h 188;" d
+FAPI_SS_PBCH_POWER_TAG fapi_interface_ue_sim.h 150;" d
+FAPI_START_REQUEST fapi_interface_ue_sim.h 34;" d
+FAPI_START_RESPONSE fapi_interface_ue_sim.h 36;" d
+FAPI_STOP_INDICATION fapi_interface_ue_sim.h 39;" d
+FAPI_STOP_REQUEST fapi_interface_ue_sim.h 38;" d
+FAPI_SUPPORTED_BANDWIDTH_DL_TAG fapi_interface_ue_sim.h 68;" d
+FAPI_SUPPORTED_BANDWIDTH_UL_TAG fapi_interface_ue_sim.h 70;" d
+FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG fapi_interface_ue_sim.h 90;" d
+FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG fapi_interface_ue_sim.h 109;" d
+FAPI_SUPPORTED_RATE_MATCH_PATTERN_TYPE_TAG fapi_interface_ue_sim.h 267;" d
+FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG fapi_interface_ue_sim.h 67;" d
+FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG fapi_interface_ue_sim.h 69;" d
+FAPI_TDD_PERIOD_TAG fapi_interface_ue_sim.h 197;" d
+FAPI_TDD_PERIOD_TAG fapi_interface_ue_sim.h 199;" d
+FAPI_TIME_MANAGEMENT_TAG fapi_interface_ue_sim.h 283;" d
+FAPI_TIMING_INFO fapi_interface_ue_sim.h 56;" d
+FAPI_TIMING_INFO_MODE_TAG fapi_interface_ue_sim.h 218;" d
+FAPI_TIMING_INFO_PERIOD_TAG fapi_interface_ue_sim.h 219;" d
+FAPI_TIMING_WINDOW_TAG fapi_interface_ue_sim.h 217;" d
+FAPI_TX_DATA_REQUEST fapi_interface_ue_sim.h 46;" d
+FAPI_TX_DATA_TIMING_OFFSET_TAG fapi_interface_ue_sim.h 292;" d
+FAPI_UCI_CONFIGURATION_TAG fapi_interface_ue_sim.h 207;" d
+FAPI_UCI_CSI_P1 fapi_interface_ue_sim.h /^ FAPI_UCI_CSI_P1 = 4,$/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_CSI_P2 fapi_interface_ue_sim.h /^ FAPI_UCI_CSI_P2 = 8,$/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_HQ fapi_interface_ue_sim.h /^ FAPI_UCI_HQ = 2,$/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_INDICATION fapi_interface_ue_sim.h 49;" d
+FAPI_UCI_MUX_TYP_HQ_CSI_1 fapi_interface_ue_sim.h /^ FAPI_UCI_MUX_TYP_HQ_CSI_1 = 6,$/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_MUX_TYP_SR_CSI_1 fapi_interface_ue_sim.h /^ FAPI_UCI_MUX_TYP_SR_CSI_1 = 5, $/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_MUX_TYP_SR_HQ fapi_interface_ue_sim.h /^ FAPI_UCI_MUX_TYP_SR_HQ = 3, $/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_MUX_TYP_SR_HQ_CSI_1 fapi_interface_ue_sim.h /^ FAPI_UCI_MUX_TYP_SR_HQ_CSI_1 = 7$/;" e enum:fapi_uci_mux_typ
+FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG fapi_interface_ue_sim.h 96;" d
+FAPI_UCI_ONLY_PUSCH_TAG fapi_interface_ue_sim.h 97;" d
+FAPI_UCI_SR fapi_interface_ue_sim.h /^ FAPI_UCI_SR = 1,$/;" e enum:fapi_uci_mux_typ
+FAPI_UL_DCI_REQUEST fapi_interface_ue_sim.h 45;" d
+FAPI_UL_DCI_TIMING_OFFSET_TAG fapi_interface_ue_sim.h 291;" d
+FAPI_UL_GRID_SIZE_TAG fapi_interface_ue_sim.h 138;" d
+FAPI_UL_K0_TAG fapi_interface_ue_sim.h 137;" d
+FAPI_UL_NODE_SYNC fapi_interface_ue_sim.h 55;" d
+FAPI_UL_TTI_REQUEST fapi_interface_ue_sim.h 43;" d
+FAPI_UL_TTI_TIMING_OFFSET_TAG fapi_interface_ue_sim.h 290;" d
+FAPI_UNUSED_ROOT_SEQUENCES_TAG fapi_interface_ue_sim.h 171;" d
+FAPI_UPLINK_BANDWIDTH_TAG fapi_interface_ue_sim.h 135;" d
+FAPI_UPLINK_FREQUENCY_TAG fapi_interface_ue_sim.h 136;" d
+IntraSlotFrequencyHopping fapi_interface_ue_sim.h /^ uint8_t IntraSlotFrequencyHopping;$/;" m struct:fapi_ul_pusch_pdu
+MAX_BUF_LEN fapi_cl.h 24;" d
+MAX_CSI_PART1_DATA_BYTES fapi_interface_ue_sim.h 356;" d
+MAX_CSI_PART2_DATA_BYTES fapi_interface_ue_sim.h 357;" d
+MAX_HARQ_INFO_LEN_BYTES fapi_interface_ue_sim.h 355;" d
+MAX_HARQ_PAYLOAD_SIZE fapi_interface_ue_sim.h 360;" d
+MAX_NDLTYPES_DL_TTI_REQ fapi_interface_ue_sim.h 370;" d
+MAX_NDLTYPES_UL_DCI_REQ fapi_interface_ue_sim.h 371;" d
+MAX_NUMBER_DCI_PDUS_PER_TTI fapi_interface_ue_sim.h 348;" d
+MAX_NUMBER_DL_DCI fapi_interface_ue_sim.h 340;" d
+MAX_NUMBER_DL_PDUS_PER_TTI fapi_interface_ue_sim.h 342;" d
+MAX_NUMBER_OF_BEAMS fapi_interface_ue_sim.h 313;" d
+MAX_NUMBER_OF_CODEWORDS_PER_PDU fapi_interface_ue_sim.h 341;" d
+MAX_NUMBER_OF_CRCS_PER_SLOT fapi_interface_ue_sim.h 354;" d
+MAX_NUMBER_OF_GROUPS_PER_TTI fapi_interface_ue_sim.h 346;" d
+MAX_NUMBER_OF_HARQS_PER_IND fapi_interface_ue_sim.h 358;" d
+MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS fapi_interface_ue_sim.h 334;" d
+MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS fapi_interface_ue_sim.h 335;" d
+MAX_NUMBER_OF_MISSING_TLVS fapi_interface_ue_sim.h 336;" d
+MAX_NUMBER_OF_PDUS_PER_TTI fapi_interface_ue_sim.h 352;" d
+MAX_NUMBER_OF_REP_SYMBOLS fapi_interface_ue_sim.h 363;" d
+MAX_NUMBER_OF_TLVS_PER_PDU fapi_interface_ue_sim.h 349;" d
+MAX_NUMBER_OF_UES_PER_TTI fapi_interface_ue_sim.h 343;" d
+MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI fapi_interface_ue_sim.h 353;" d
+MAX_NUMBER_RACH_PDUS_PER_SLOT fapi_interface_ue_sim.h 366;" d
+MAX_NUMBER_RBS fapi_interface_ue_sim.h 362;" d
+MAX_NUMBER_SRS_PDUS_PER_SLOT fapi_interface_ue_sim.h 364;" d
+MAX_NUMBER_TX_PDUS_PER_TTI fapi_interface_ue_sim.h 350;" d
+MAX_NUMBER_TX_RUS fapi_interface_ue_sim.h 311;" d
+MAX_NUMBER_UCI_PDUS_PER_SLOT fapi_interface_ue_sim.h 361;" d
+MAX_NUMBER_UL_PDUS_PER_TTI fapi_interface_ue_sim.h 347;" d
+MAX_NUMBER_UNSUPPORTED_TLVS fapi_interface_ue_sim.h 333;" d
+MAX_NUM_ANT_PORTS fapi_interface_ue_sim.h 314;" d
+MAX_NUM_CB_PER_TTI_IN_BYTES fapi_interface_ue_sim.h 344;" d
+MAX_NUM_DIGBFINTERFACES fapi_interface_ue_sim.h 337;" d
+MAX_NUM_LAYERS fapi_interface_ue_sim.h 315;" d
+MAX_NUM_OF_SYMBOLS_PER_SLOT fapi_interface_ue_sim.h 309;" d
+MAX_NUM_PRACH_FD_OCCASIONS fapi_interface_ue_sim.h 308;" d
+MAX_NUM_PREAMBLES_PER_SLOT fapi_interface_ue_sim.h 365;" d
+MAX_NUM_PRGS_PER_TTI fapi_interface_ue_sim.h 338;" d
+MAX_NUM_PTRS_PORTS fapi_interface_ue_sim.h 345;" d
+MAX_NUM_TLVS_CARRIER_CONFIG fapi_interface_ue_sim.h 321;" d
+MAX_NUM_TLVS_CELL_CONFIG fapi_interface_ue_sim.h 317;" d
+MAX_NUM_TLVS_CELL_CONFIG fapi_interface_ue_sim.h 319;" d
+MAX_NUM_TLVS_CONFIG fapi_interface_ue_sim.h 329;" d
+MAX_NUM_TLVS_CONFIG fapi_interface_ue_sim.h 331;" d
+MAX_NUM_TLVS_MEAS_CONFIG fapi_interface_ue_sim.h 327;" d
+MAX_NUM_TLVS_PDCCH_CONFIG fapi_interface_ue_sim.h 322;" d
+MAX_NUM_TLVS_PDSCH_CONFIG fapi_interface_ue_sim.h 324;" d
+MAX_NUM_TLVS_PRACH_CONFIG fapi_interface_ue_sim.h 326;" d
+MAX_NUM_TLVS_PUCCH_CONFIG fapi_interface_ue_sim.h 323;" d
+MAX_NUM_TLVS_PUSCH_CONFIG fapi_interface_ue_sim.h 325;" d
+MAX_NUM_UL_TYPES fapi_interface_ue_sim.h 373;" d
+MAX_NUM_UNUSED_ROOT_SEQUENCES fapi_interface_ue_sim.h 307;" d
+MAX_PDU_LENGTH fapi_interface_ue_sim.h 351;" d
+MAX_SIGNAL_INDEX fapi_interface_ue_sim.h 372;" d
+MAX_SR_PAYLOAD_SIZE fapi_interface_ue_sim.h 359;" d
+MAX_TDD_PERIODICITY fapi_interface_ue_sim.h 310;" d
+MSG_INVALID_DFE_Profile fapi_interface_ue_sim.h 249;" d
+MSG_INVALID_PHY_ID fapi_interface_ue_sim.h 247;" d
+MSG_UNINSTANTIATED_PHY fapi_interface_ue_sim.h 248;" d
+NUMEROLOGIES fapi_interface_ue_sim.h 306;" d
+PACK_STRUCT fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT$/;" s
+PACK_STRUCT fapi_interface_ue_sim.h 12;" d
+PHY_Profile_Selection_incompatible fapi_interface_ue_sim.h 250;" d
+SELF_IP fapi_cl.h 19;" d
+SELF_PORT fapi_cl.h 20;" d
+TA_AVG_TIME fapi_interface_ue_sim.h 367;" d
+TA_AVG_TIMElog2 fapi_interface_ue_sim.h 368;" d
+UE_SIM_IP fapi_cl.h 21;" d
+UE_SIM_PORT fapi_cl.h 22;" d
+_FAPI_INTERFACE_UE_SIM_H_ fapi_interface_ue_sim.h 9;" d
+add_dmrs_flag fapi_interface_ue_sim.h /^ uint8_t add_dmrs_flag;$/;" m struct:fapi_ul_pucch_pdu
+aggregation_level fapi_interface_ue_sim.h /^ uint8_t aggregation_level;$/;" m struct:fapi_dl_dci
+alpha_scaling fapi_interface_ue_sim.h /^ uint8_t alpha_scaling;$/;" m struct:fapi_pusch_uci
+avgRssi fapi_interface_ue_sim.h /^ uint16_t avgRssi;$/;" m struct:fapi_rach_pdu
+avgRssi fapi_interface_ue_sim.h /^ uint8_t avgRssi;$/;" m struct:fapi_rach_pdu
+avgSnr fapi_interface_ue_sim.h /^ uint8_t avgSnr; $/;" m struct:fapi_rach_pdu
+bandwidth_index fapi_interface_ue_sim.h /^ uint8_t bandwidth_index;$/;" m struct:fapi_ul_srs_pdu
+basic fapi_interface_ue_sim.h /^ fapi_basic_parms_t basic;$/;" m struct:fapi_dl_csi_rs_mnt_parms
+basicParams fapi_interface_ue_sim.h /^ fapi_ssb_basic_parms_t basicParams;$/;" m struct:fapi_dl_ssb_pbch_mnt_parms
+bchPayload fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim bchPayload;$/;" m struct:fapi_ssb_config
+bchPayloadFlag fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim bchPayloadFlag;$/;" m struct:fapi_ssb_pwr_pbch_config
+bch_payload fapi_interface_ue_sim.h /^ uint32_t bch_payload;$/;" m union:fapi_bch_payload::__anon2
+bch_payload fapi_interface_ue_sim.h /^ fapi_bch_payload_t_ue_sim bch_payload;$/;" m struct:fapi_dl_ssb_pdu
+bch_payload_flag fapi_interface_ue_sim.h /^ uint8_t bch_payload_flag;$/;" m struct:fapi_dl_ssb_pdu
+beamId fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim beamId[64];$/;" m struct:fapi_ssb_table
+beamId fapi_interface_ue_sim.h /^ uint8_t beamId[64];$/;" m struct:fapi_ssb_res_config_table
+beamIdx fapi_interface_ue_sim.h /^ uint16_t beamIdx;$/;" m struct:fapi_dig_beam_config
+beam_idx fapi_interface_ue_sim.h /^ fapi_bmi_t_ue_sim beam_idx[];$/;" m struct:fapi_pmi_bfi
+beam_idx fapi_interface_ue_sim.h /^ uint16_t beam_idx[][1];$/;" m struct:fapi_bmform
+beamforming fapi_interface_ue_sim.h /^ fapi_bmform_t beamforming;$/;" m struct:fapi_ul_prach_pdu
+beamforming fapi_interface_ue_sim.h /^ fapi_bmform_t beamforming;$/;" m struct:fapi_ul_pucch_pdu
+beamforming fapi_interface_ue_sim.h /^ fapi_bmform_t beamforming;$/;" m struct:fapi_ul_pusch_pdu
+beamforming fapi_interface_ue_sim.h /^ fapi_bmform_t beamforming;$/;" m struct:fapi_ul_srs_pdu
+beamformingTable fapi_interface_ue_sim.h /^ fapi_beamforming_table_t_ue_sim beamformingTable;$/;" m struct:fapi_config
+beamformingTable fapi_interface_ue_sim.h /^ fapi_beamforming_table_t_ue_sim beamformingTable;$/;" m struct:fapi_config
+beamidx fapi_interface_ue_sim.h /^ uint16_t beamidx;$/;" m struct:fapi_bmi
+betaPSSProfileSSS fapi_interface_ue_sim.h /^ uint16_t betaPSSProfileSSS;$/;" m struct:fapi_ssb_tx_pwr_info
+betaPss fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim betaPss;$/;" m struct:fapi_ssb_table
+betaPssProfileNR fapi_interface_ue_sim.h /^ uint8_t betaPssProfileNR;$/;" m struct:fapi_dl_ssb_pdu
+betaPssProfileNR fapi_interface_ue_sim.h /^ uint8_t betaPssProfileNR;$/;" m struct:fapi_ssb_res_config_table
+betaPssProfileSSS fapi_interface_ue_sim.h /^ int16_t betaPssProfileSSS;$/;" m struct:fapi_ssb_res_config_table
+beta_offset_csi1 fapi_interface_ue_sim.h /^ uint8_t beta_offset_csi1;$/;" m struct:fapi_pusch_uci
+beta_offset_csi2 fapi_interface_ue_sim.h /^ uint8_t beta_offset_csi2;$/;" m struct:fapi_pusch_uci
+beta_offset_harq_ack fapi_interface_ue_sim.h /^ uint8_t beta_offset_harq_ack;$/;" m struct:fapi_pusch_uci
+beta_pdcch_1_0 fapi_interface_ue_sim.h /^ uint8_t beta_pdcch_1_0;$/;" m struct:fapi_tx_power_info
+beta_pss fapi_interface_ue_sim.h /^ uint8_t beta_pss;$/;" m struct:fapi_dl_ssb_pdu
+bit_len_csi_part1 fapi_interface_ue_sim.h /^ uint16_t bit_len_csi_part1;$/;" m struct:fapi_ul_pucch_pdu
+bit_len_csi_part2 fapi_interface_ue_sim.h /^ uint16_t bit_len_csi_part2;$/;" m struct:fapi_ul_pucch_pdu
+bit_len_harq fapi_interface_ue_sim.h /^ uint16_t bit_len_harq;$/;" m struct:fapi_ul_pucch_pdu
+bwp fapi_interface_ue_sim.h /^ fapi_bwp_t bwp;$/;" m struct:fapi_dl_pdsch_pdu
+bwp fapi_interface_ue_sim.h /^ fapi_bwp_t bwp;$/;" m struct:fapi_ul_pucch_pdu
+bwp fapi_interface_ue_sim.h /^ fapi_bwp_t bwp;$/;" m struct:fapi_ul_pusch_pdu
+bwp fapi_interface_ue_sim.h /^ fapi_bwp_t bwp;$/;" m struct:fapi_ul_srs_pdu
+bwp fapi_interface_ue_sim.h /^ fapi_bwp_t bwp;$/;" m struct:fapi_dl_pdcch_pdu
+bwp_size fapi_interface_ue_sim.h /^ uint16_t bwp_size; \/* BWP configuration Start *\/$/;" m struct:fapi_bwp
+bwp_size fapi_interface_ue_sim.h /^ uint16_t bwp_size;$/;" m struct:fapi_ul_pucch_pdu
+bwp_size fapi_interface_ue_sim.h /^ uint16_t bwp_size;$/;" m struct:fapi_ul_pusch_pdu
+bwp_size fapi_interface_ue_sim.h /^ uint16_t bwp_size;$/;" m struct:fapi_ul_srs_pdu
+bwp_start fapi_interface_ue_sim.h /^ uint16_t bwp_start;$/;" m struct:fapi_bwp
+bwp_start fapi_interface_ue_sim.h /^ uint16_t bwp_start;$/;" m struct:fapi_ul_pucch_pdu
+bwp_start fapi_interface_ue_sim.h /^ uint16_t bwp_start;$/;" m struct:fapi_ul_pusch_pdu
+bwp_start fapi_interface_ue_sim.h /^ uint16_t bwp_start;$/;" m struct:fapi_ul_srs_pdu
+capability fapi_interface_ue_sim.h /^ fapi_capability_t capability[];$/;" m struct:fapi_capability_validity
+capabilityTag fapi_interface_ue_sim.h /^ uint16_t capabilityTag;$/;" m struct:fapi_capability
+capabilityValidity fapi_interface_ue_sim.h /^ fapi_capability_validity_t capabilityValidity;$/;" m struct:fapi_params
+carrParms fapi_interface_ue_sim.h /^ fapi_carrier_parms_t_ue_sim carrParms;$/;" m struct:fapi_params
+carrierBandwidthDL fapi_interface_ue_sim.h /^ uint8_t carrierBandwidthDL;$/;" m struct:fapi_lte_crs_rm_ptrn
+carrierConfig fapi_interface_ue_sim.h /^ fapi_carrier_config_t_ue_sim carrierConfig;$/;" m struct:fapi_config
+carrierConfig fapi_interface_ue_sim.h /^ fapi_carrier_config_t_ue_sim carrierConfig;$/;" m struct:fapi_config
+carrierConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim carrierConfig;$/;" m struct:fapi_carrier_config
+carrierFreqDL fapi_interface_ue_sim.h /^ uint16_t carrierFreqDL;$/;" m struct:fapi_lte_crs_rm_ptrn
+cases fapi_interface_ue_sim.h /^ uint8_t cases;$/;" m struct:fapi_ssb_basic_parms
+cases fapi_interface_ue_sim.h /^ uint8_t cases;$/;" m struct:fapi_ssb_res_config_table
+cb_crc_status fapi_interface_ue_sim.h /^ uint8_t cb_crc_status[MAX_NUM_CB_PER_TTI_IN_BYTES];$/;" m struct:fapi_crc_ind_info
+cb_present_and_position fapi_interface_ue_sim.h /^ uint8_t cb_present_and_position[1];$/;" m struct:fapi_pusch_data
+cbgTxInfo fapi_interface_ue_sim.h /^ uint8_t cbgTxInfo;$/;" m struct:fapi_dl_code_word
+cbg_info fapi_interface_ue_sim.h /^ fapi_dl_pdsch_cbg_info_t cbg_info;$/;" m struct:fapi_dl_pdsch_pdu
+cceMappingType fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim cceMappingType;$/;" m struct:fapi_pdcch_parms
+cce_index fapi_interface_ue_sim.h /^ uint8_t cce_index;$/;" m struct:fapi_dl_dci
+cce_reg_mapping_type fapi_interface_ue_sim.h /^ uint8_t cce_reg_mapping_type;$/;" m struct:fapi_coreset
+cdm_type fapi_interface_ue_sim.h /^ uint8_t cdm_type;$/;" m struct:fapi_dl_csi_rs_pdu
+cellConfig fapi_interface_ue_sim.h /^ fapi_cell_config_t_ue_sim cellConfig;$/;" m struct:fapi_config
+cellConfig fapi_interface_ue_sim.h /^ fapi_cell_config_t_ue_sim cellConfig;$/;" m struct:fapi_config
+cellParms fapi_interface_ue_sim.h /^ fapi_cell_parms_t_ue_sim cellParms;$/;" m struct:fapi_params
+cell_barred fapi_interface_ue_sim.h /^ uint8_t cell_barred;$/;" m struct:fapi_phy_mib_pdu
+clCb fapi_cl.h /^ClCb clCb;$/;" v
+clCb fapi_cl.h /^typedef struct clCb$/;" s
+codeWord fapi_interface_ue_sim.h /^ fapi_dl_code_word_t codeWord[0];$/;" m struct:fapi_dl_tx_pwr_info
+codewordInfo fapi_interface_ue_sim.h /^ fapi_dl_codeword_info_t codewordInfo;$/;" m struct:fapi_dl_pdsch_mnt_parms
+collocatedAl16Candidate fapi_interface_ue_sim.h /^ uint8_t collocatedAl16Candidate;$/;" m struct:fapi_dci_specific_parms
+comb_offset fapi_interface_ue_sim.h /^ uint8_t comb_offset;$/;" m struct:fapi_ul_srs_pdu
+comb_size fapi_interface_ue_sim.h /^ uint8_t comb_size;$/;" m struct:fapi_ul_srs_pdu
+config_index fapi_interface_ue_sim.h /^ uint8_t config_index;$/;" m struct:fapi_ul_srs_pdu
+configured fapi_cl.h /^ bool configured;$/;" m struct:clCb
+convertConfigRequest fapi_cl_mac2phy.c /^void convertConfigRequest(uint8_t handle, void *msg, uint16_t msgLen)$/;" f
+core_set_type fapi_interface_ue_sim.h /^ uint8_t core_set_type;$/;" m struct:fapi_coreset
+coreset fapi_interface_ue_sim.h /^ fapi_coreset_t coreset;$/;" m struct:fapi_dl_pdcch_pdu
+coresetOutsideFirst3OfdmSymsOfSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim coresetOutsideFirst3OfdmSymsOfSlot;$/;" m struct:fapi_pdcch_parms
+coresetParms fapi_interface_ue_sim.h /^ fapi_coreset_parms_t coresetParms;$/;" m struct:fapi_pdcch_mnt_parms
+coresetRmPatrn fapi_interface_ue_sim.h /^ fapi_dl_coreset_rm_patrn_t coresetRmPatrn[0];$/;" m struct:fapi_dl_rate_match_ref
+coresetStartPoint fapi_interface_ue_sim.h /^ uint16_t coresetStartPoint;$/;" m struct:fapi_dl_pdsch_mnt_parms
+crc fapi_interface_ue_sim.h /^ fapi_crc_ind_info_t_ue_sim crc[MAX_NUMBER_OF_CRCS_PER_SLOT];$/;" m struct:fapi_crc_ind
+crsRateMatchPatternID fapi_interface_ue_sim.h /^ uint8_t crsRateMatchPatternID;$/;" m struct:fapi_lte_crs_rm_ptrn
+csiPart1BitLength fapi_interface_ue_sim.h /^ uint16_t csiPart1BitLength;$/;" m struct:fapi_ul_pucch_pdu
+csiPart1Info fapi_interface_ue_sim.h /^ fapi_csi_p1_info_t_ue_sim csiPart1Info; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pucch_f2f3f4
+csiPart1info fapi_interface_ue_sim.h /^ fapi_csi_p1_info_t_ue_sim csiPart1info; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pusch
+csiPart2Info fapi_interface_ue_sim.h /^ fapi_csi_p2_info_t_ue_sim csiPart2Info; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pucch_f2f3f4
+csiPart2info fapi_interface_ue_sim.h /^ fapi_csi_p2_info_t_ue_sim csiPart2info; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pusch
+csiRsForRaMa fapi_interface_ue_sim.h /^ uint16_t csiRsForRaMa[0]; \/\/ side depends on numCsiRsForRaMa $/;" m struct:fapi_dl_rate_match_ref
+csiRsMntParms fapi_interface_ue_sim.h /^ fapi_dl_csi_rs_mnt_parms_t csiRsMntParms;$/;" m struct:fapi_dl_csi_rs_pdu
+csiRsPduIndex fapi_interface_ue_sim.h /^ uint16_t csiRsPduIndex; $/;" m struct:fapi_basic_parms
+csiRsPowerOffsetProfileSSS fapi_interface_ue_sim.h /^ uint16_t csiRsPowerOffsetProfileSSS; $/;" m struct:ifapi_csi_rs_tx_pwr_info
+csiRsRateMatch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim csiRsRateMatch;$/;" m struct:fapi_pdsch_parms
+csi_part1_bit_len fapi_interface_ue_sim.h /^ uint16_t csi_part1_bit_len;$/;" m struct:fapi_csi_p1_info
+csi_part1_bit_length fapi_interface_ue_sim.h /^ uint16_t csi_part1_bit_length;$/;" m struct:fapi_pusch_uci
+csi_part1_crc fapi_interface_ue_sim.h /^ uint8_t csi_part1_crc;$/;" m struct:fapi_csi_p1_info
+csi_part1_payload fapi_interface_ue_sim.h /^ uint8_t csi_part1_payload[MAX_CSI_PART1_DATA_BYTES];$/;" m struct:fapi_csi_p1_info
+csi_part2_bit_len fapi_interface_ue_sim.h /^ uint16_t csi_part2_bit_len;$/;" m struct:fapi_csi_p2_info
+csi_part2_bit_length fapi_interface_ue_sim.h /^ uint16_t csi_part2_bit_length;$/;" m struct:fapi_pusch_uci
+csi_part2_crc fapi_interface_ue_sim.h /^ uint8_t csi_part2_crc;$/;" m struct:fapi_csi_p2_info
+csi_part2_payload fapi_interface_ue_sim.h /^ uint8_t csi_part2_payload[MAX_CSI_PART2_DATA_BYTES];$/;" m struct:fapi_csi_p2_info
+csi_rs_pdu fapi_interface_ue_sim.h /^ fapi_dl_csi_rs_pdu_t_ue_sim csi_rs_pdu;$/;" m union:fapi_dl_tti_req_pdu::__anon3
+csi_type fapi_interface_ue_sim.h /^ uint8_t csi_type;$/;" m struct:fapi_dl_csi_rs_pdu
+cwIndex fapi_interface_ue_sim.h /^ uint8_t cwIndex; \/* Ref: Table 3-90 Tx_Data.request message *\/$/;" m struct:fapi_tx_pdu_desc
+cw_info fapi_interface_ue_sim.h /^ fapi_codeword_pdu_t_ue_sim cw_info[FAPI_MAX_NUM_CW]; \/* SCF : Code Word Info End *\/$/;" m struct:fapi_dl_pdsch_pdu
+cyclicPrefix fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim cyclicPrefix;$/;" m struct:fapi_carrier_parms
+cyclicPrefix fapi_interface_ue_sim.h /^ uint8_t cyclicPrefix; \/* BWP Configuration End*\/$/;" m struct:fapi_dl_csi_rs_pdu
+cyclic_prefix fapi_interface_ue_sim.h /^ uint8_t cyclic_prefix; \/* BWP Configuration End*\/$/;" m struct:fapi_bwp
+cyclic_prefix fapi_interface_ue_sim.h /^ uint8_t cyclic_prefix;$/;" m struct:fapi_ul_pucch_pdu
+cyclic_prefix fapi_interface_ue_sim.h /^ uint8_t cyclic_prefix;$/;" m struct:fapi_ul_pusch_pdu
+cyclic_prefix fapi_interface_ue_sim.h /^ uint8_t cyclic_prefix;$/;" m struct:fapi_ul_srs_pdu
+cyclic_shift fapi_interface_ue_sim.h /^ uint8_t cyclic_shift;$/;" m struct:fapi_ul_srs_pdu
+data_scrambling_id fapi_interface_ue_sim.h /^ uint16_t data_scrambling_id;$/;" m struct:fapi_dl_pdsch_pdu
+data_scrambling_id fapi_interface_ue_sim.h /^ uint16_t data_scrambling_id;$/;" m struct:fapi_ul_pucch_pdu
+data_scrambling_id fapi_interface_ue_sim.h /^ uint16_t data_scrambling_id;$/;" m struct:fapi_ul_pusch_pdu
+dciIndex fapi_interface_ue_sim.h /^ uint16_t dciIndex;$/;" m struct:fapi_dl_rate_match_ref
+dciIndex fapi_interface_ue_sim.h /^ uint16_t dciIndex;$/;" m struct:fapi_dci_specific_parms
+dciSpecificParms fapi_interface_ue_sim.h /^ fapi_dci_specific_parms_t dciSpecificParms;$/;" m struct:fapi_pdcch_mnt_parms
+delayManagementParms fapi_interface_ue_sim.h /^ fapi_delay_management_parms_t delayManagementParms;$/;" m struct:fapi_params
+delayMgmtConfig fapi_interface_ue_sim.h /^ fapi_delay_mgmt_config_t delayMgmtConfig;$/;" m struct:fapi_config
+deltaBwp0StartFromActiveBwp fapi_interface_ue_sim.h /^ uint16_t deltaBwp0StartFromActiveBwp;$/;" m struct:fapi_pusch_mnt_parms
+dfeProfile fapi_interface_ue_sim.h /^ fapi_dfe_profile_t dfeProfile;$/;" m struct:fapi_params
+dfe_profile fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim dfe_profile;$/;" m struct:fapi_dfe_profile
+dftsOfdmSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim dftsOfdmSupport;$/;" m struct:fapi_pusch_parms
+dfts_ofdm fapi_interface_ue_sim.h /^ fapi_dfts_ofdm_t_ue_sim dfts_ofdm;$/;" m struct:fapi_ul_pusch_pdu
+digBeam fapi_interface_ue_sim.h /^ fapi_dig_beam_config_t_ue_sim digBeam[MAX_NUMBER_OF_BEAMS];$/;" m struct:fapi_beamforming_table
+digBeamWeight fapi_interface_ue_sim.h /^ fapi_dig_beam_weight_t_ue_sim digBeamWeight[MAX_NUMBER_TX_RUS];$/;" m struct:fapi_dig_beam_config
+digBeamWeightIm fapi_interface_ue_sim.h /^ int16_t digBeamWeightIm;$/;" m struct:fapi_dig_beam_weight
+digBeamWeightRe fapi_interface_ue_sim.h /^ int16_t digBeamWeightRe;$/;" m struct:fapi_dig_beam_weight
+dig_bf_interfaces fapi_interface_ue_sim.h /^ uint8_t dig_bf_interfaces;$/;" m struct:fapi_bmform
+dig_bf_interfaces fapi_interface_ue_sim.h /^ uint8_t dig_bf_interfaces;$/;" m struct:fapi_precoding_bmform
+dlBandwidth fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim dlBandwidth;$/;" m struct:fapi_carrier_config
+dlBandwidth fapi_interface_ue_sim.h /^ uint16_t dlBandwidth;$/;" m struct:fapi_carrier_config
+dlFrequency fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim dlFrequency;$/;" m struct:fapi_carrier_config
+dlFrequency fapi_interface_ue_sim.h /^ uint32_t dlFrequency;$/;" m struct:fapi_carrier_config
+dlGridSize fapi_interface_ue_sim.h /^ fapi_config_num_tlv_t dlGridSize;$/;" m struct:fapi_carrier_config
+dlGridSize fapi_interface_ue_sim.h /^ fapi_config_num_tlv_t dlGridSize;$/;" m struct:fapi_carrier_config
+dlGridSize fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim dlGridSize[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+dlGridSize fapi_interface_ue_sim.h /^ uint16_t dlGridSize[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+dlPdschMntparms fapi_interface_ue_sim.h /^ fapi_dl_pdsch_mnt_parms_t dlPdschMntparms;$/;" m struct:fapi_dl_pdsch_pdu
+dlPdschPtrsMntParms fapi_interface_ue_sim.h /^ fapi_dl_pdsch_ptrs_mnt_parms_t dlPdschPtrsMntParms;$/;" m struct:fapi_dl_pdsch_pdu
+dlPortRangeLen fapi_interface_ue_sim.h /^ uint16_t dlPortRangeLen[0];$/;" m struct:fapi_phy_port
+dlPortRangeStart fapi_interface_ue_sim.h /^ uint16_t dlPortRangeStart[0]; \/* Start of each range of DL ports, depends on Number of DL port ranges for this PHYs*\/$/;" m struct:fapi_phy_port
+dlTbCrc fapi_interface_ue_sim.h /^ uint32_t dlTbCrc[2];$/;" m struct:fapi_dl_pdsch_cbg_info
+dl_dci fapi_interface_ue_sim.h /^ fapi_dl_dci_t_ue_sim dl_dci[0];$/;" m struct:fapi_dl_pdcch_pdu
+dl_dmrs_scrambling_id fapi_interface_ue_sim.h /^ uint16_t dl_dmrs_scrambling_id;$/;" m struct:fapi_dmrs
+dl_dmrs_symb_pos fapi_interface_ue_sim.h /^ uint16_t dl_dmrs_symb_pos; \/*SCF: DMRS Config Start *\/$/;" m struct:fapi_dmrs
+dl_tb_crc fapi_interface_ue_sim.h /^ uint32_t dl_tb_crc;$/;" m struct:fapi_dl_pdsch_cbg_info
+dl_tti_timing_offset fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim dl_tti_timing_offset;$/;" m struct:fapi_delay_management_parms
+dlk0 fapi_interface_ue_sim.h /^ fapi_config_num_tlv_t dlk0;$/;" m struct:fapi_carrier_config
+dlk0 fapi_interface_ue_sim.h /^ fapi_config_num_tlv_t dlk0;$/;" m struct:fapi_carrier_config
+dlk0 fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim dlk0[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+dlk0 fapi_interface_ue_sim.h /^ uint16_t dlk0[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+dmrs fapi_interface_ue_sim.h /^ fapi_dmrs_t dmrs;$/;" m struct:fapi_dl_pdsch_pdu
+dmrs_config_type fapi_interface_ue_sim.h /^ uint8_t dmrs_config_type;$/;" m struct:fapi_dmrs
+dmrs_config_type fapi_interface_ue_sim.h /^ uint8_t dmrs_config_type;$/;" m struct:fapi_ul_pusch_pdu
+dmrs_cyclic_shift fapi_interface_ue_sim.h /^ uint8_t dmrs_cyclic_shift;$/;" m struct:fapi_ul_pucch_pdu
+dmrs_ports fapi_interface_ue_sim.h /^ uint16_t dmrs_ports; \/*SCF: DMRS Config End *\/$/;" m struct:fapi_dmrs
+dmrs_ports fapi_interface_ue_sim.h /^ uint16_t dmrs_ports;$/;" m struct:fapi_ul_pusch_pdu
+dmrs_scrambling_id fapi_interface_ue_sim.h /^ uint16_t dmrs_scrambling_id;$/;" m struct:fapi_ul_pucch_pdu
+dmrs_type_a_position fapi_interface_ue_sim.h /^ uint8_t dmrs_type_a_position;$/;" m struct:fapi_phy_mib_pdu
+dstAddr fapi_cl.h /^ struct sockaddr_in dstAddr;$/;" m struct:clCb typeref:struct:clCb::sockaddr_in
+duration_symbols fapi_interface_ue_sim.h /^ uint8_t duration_symbols;$/;" m struct:fapi_coreset
+errorCode fapi_interface_ue_sim.h /^ uint8_t errorCode;$/;" m struct:fapi_start_resp
+error_code fapi_interface_ue_sim.h /^ uint8_t error_code;$/;" m struct:fapi_config_resp
+error_code fapi_interface_ue_sim.h /^ uint8_t error_code;$/;" m struct:fapi_error_ind
+error_code fapi_interface_ue_sim.h /^ uint8_t error_code;$/;" m struct:fapi_param_resp
+expectedSFN fapi_interface_ue_sim.h /^ uint16_t expectedSFN;$/;" m struct:fapi_error_ind
+expectedSlot fapi_interface_ue_sim.h /^ uint16_t expectedSlot;$/;" m struct:fapi_error_ind
+fapiClProcessMac2UeSimFapiMsg fapi_cl_mac2phy.c /^void fapiClProcessMac2UeSimFapiMsg(void *msg)$/;" f
+fapiClProcessUeSim2MacFapiMsg fapi_cl_phy2mac.c /^void fapiClProcessUeSim2MacFapiMsg(Data *msg)$/;" f
+fapi_basic_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_basic_parms$/;" s
+fapi_basic_parms_t fapi_interface_ue_sim.h /^} fapi_basic_parms_t;$/;" t typeref:struct:fapi_basic_parms
+fapi_bch_payload fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_bch_payload$/;" s
+fapi_bch_payload_t_ue_sim fapi_interface_ue_sim.h /^} fapi_bch_payload_t_ue_sim;$/;" t typeref:struct:fapi_bch_payload
+fapi_beamforming_table fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_beamforming_table$/;" s
+fapi_beamforming_table_t_ue_sim fapi_interface_ue_sim.h /^} fapi_beamforming_table_t_ue_sim;$/;" t typeref:struct:fapi_beamforming_table
+fapi_bmform fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_bmform$/;" s
+fapi_bmform_t fapi_interface_ue_sim.h /^} fapi_bmform_t;$/;" t typeref:struct:fapi_bmform
+fapi_bmi fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_bmi$/;" s
+fapi_bmi_t_ue_sim fapi_interface_ue_sim.h /^} fapi_bmi_t_ue_sim;$/;" t typeref:struct:fapi_bmi
+fapi_bwp fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_bwp$/;" s
+fapi_bwp_t fapi_interface_ue_sim.h /^}fapi_bwp_t;$/;" t typeref:struct:fapi_bwp
+fapi_capability fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_capability$/;" s
+fapi_capability_t fapi_interface_ue_sim.h /^} fapi_capability_t;$/;" t typeref:struct:fapi_capability
+fapi_capability_validity fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim fapi_capability_validity;$/;" m struct:fapi_capability_validity
+fapi_capability_validity fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_capability_validity$/;" s
+fapi_capability_validity_t fapi_interface_ue_sim.h /^} fapi_capability_validity_t;$/;" t typeref:struct:fapi_capability_validity
+fapi_carrier_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_carrier_config$/;" s
+fapi_carrier_config_t_ue_sim fapi_interface_ue_sim.h /^} fapi_carrier_config_t_ue_sim;$/;" t typeref:struct:fapi_carrier_config
+fapi_carrier_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_carrier_parms$/;" s
+fapi_carrier_parms_t_ue_sim fapi_interface_ue_sim.h /^} fapi_carrier_parms_t_ue_sim;$/;" t typeref:struct:fapi_carrier_parms
+fapi_cell_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_cell_config$/;" s
+fapi_cell_config_t_ue_sim fapi_interface_ue_sim.h /^} fapi_cell_config_t_ue_sim;$/;" t typeref:struct:fapi_cell_config
+fapi_cell_params fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_cell_params$/;" s
+fapi_cell_parms_t_ue_sim fapi_interface_ue_sim.h /^} fapi_cell_parms_t_ue_sim;$/;" t typeref:struct:fapi_cell_params
+fapi_codeword_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_codeword_pdu$/;" s
+fapi_codeword_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_codeword_pdu_t_ue_sim;$/;" t typeref:struct:fapi_codeword_pdu
+fapi_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_config$/;" s
+fapi_config_num_tlv_t fapi_interface_ue_sim.h /^} fapi_config_num_tlv_t;$/;" t typeref:struct:__anon1
+fapi_config_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_config_req$/;" s
+fapi_config_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_config_req_t_ue_sim;$/;" t typeref:struct:fapi_config_req
+fapi_config_resp fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_config_resp$/;" s
+fapi_config_resp_t_ue_sim fapi_interface_ue_sim.h /^} fapi_config_resp_t_ue_sim;$/;" t typeref:struct:fapi_config_resp
+fapi_config_t_ue_sim fapi_interface_ue_sim.h /^}fapi_config_t_ue_sim;$/;" t typeref:struct:fapi_config
+fapi_config_tlv fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_config_tlv$/;" s
+fapi_config_tlv_t_ue_sim fapi_interface_ue_sim.h /^} fapi_config_tlv_t_ue_sim;$/;" t typeref:struct:fapi_config_tlv
+fapi_coreset fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_coreset$/;" s
+fapi_coreset_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_coreset_parms$/;" s
+fapi_coreset_parms_t fapi_interface_ue_sim.h /^} fapi_coreset_parms_t;$/;" t typeref:struct:fapi_coreset_parms
+fapi_coreset_t fapi_interface_ue_sim.h /^}fapi_coreset_t;$/;" t typeref:struct:fapi_coreset
+fapi_crc_ind fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_crc_ind$/;" s
+fapi_crc_ind_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_crc_ind_info$/;" s
+fapi_crc_ind_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_crc_ind_info_t_ue_sim;$/;" t typeref:struct:fapi_crc_ind_info
+fapi_crc_ind_t_ue_sim fapi_interface_ue_sim.h /^} fapi_crc_ind_t_ue_sim;$/;" t typeref:struct:fapi_crc_ind
+fapi_csi_p1_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_csi_p1_info$/;" s
+fapi_csi_p1_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_csi_p1_info_t_ue_sim;$/;" t typeref:struct:fapi_csi_p1_info
+fapi_csi_p2_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_csi_p2_info$/;" s
+fapi_csi_p2_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_csi_p2_info_t_ue_sim;$/;" t typeref:struct:fapi_csi_p2_info
+fapi_csi_rs_tx_pwr_info_t fapi_interface_ue_sim.h /^} fapi_csi_rs_tx_pwr_info_t;$/;" t typeref:struct:ifapi_csi_rs_tx_pwr_info
+fapi_dci_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dci_pdu$/;" s
+fapi_dci_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dci_pdu_t_ue_sim;$/;" t typeref:struct:fapi_dci_pdu
+fapi_dci_specific_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dci_specific_parms$/;" s
+fapi_dci_specific_parms_t fapi_interface_ue_sim.h /^} fapi_dci_specific_parms_t;$/;" t typeref:struct:fapi_dci_specific_parms
+fapi_delay_management_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_delay_management_parms$/;" s
+fapi_delay_management_parms_t fapi_interface_ue_sim.h /^}fapi_delay_management_parms_t;$/;" t typeref:struct:fapi_delay_management_parms
+fapi_delay_mgmt_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_delay_mgmt_config$/;" s
+fapi_delay_mgmt_config_t fapi_interface_ue_sim.h /^}fapi_delay_mgmt_config_t;$/;" t typeref:struct:fapi_delay_mgmt_config
+fapi_dfe_profile fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dfe_profile$/;" s
+fapi_dfe_profile_t fapi_interface_ue_sim.h /^}fapi_dfe_profile_t;$/;" t typeref:struct:fapi_dfe_profile
+fapi_dfts_ofdm fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dfts_ofdm$/;" s
+fapi_dfts_ofdm_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dfts_ofdm_t_ue_sim;$/;" t typeref:struct:fapi_dfts_ofdm
+fapi_dig_beam_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dig_beam_config$/;" s
+fapi_dig_beam_config_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dig_beam_config_t_ue_sim;$/;" t typeref:struct:fapi_dig_beam_config
+fapi_dig_beam_weight fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dig_beam_weight$/;" s
+fapi_dig_beam_weight_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dig_beam_weight_t_ue_sim;$/;" t typeref:struct:fapi_dig_beam_weight
+fapi_dl_code_word fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_code_word$/;" s
+fapi_dl_code_word_t fapi_interface_ue_sim.h /^} fapi_dl_code_word_t;$/;" t typeref:struct:fapi_dl_code_word
+fapi_dl_codeword_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_codeword_info$/;" s
+fapi_dl_codeword_info_t fapi_interface_ue_sim.h /^} fapi_dl_codeword_info_t;$/;" t typeref:struct:fapi_dl_codeword_info
+fapi_dl_coreset_rm_patrn fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_coreset_rm_patrn$/;" s
+fapi_dl_coreset_rm_patrn_t fapi_interface_ue_sim.h /^} fapi_dl_coreset_rm_patrn_t;$/;" t typeref:struct:fapi_dl_coreset_rm_patrn
+fapi_dl_csi_rs_mnt_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_csi_rs_mnt_parms$/;" s
+fapi_dl_csi_rs_mnt_parms_t fapi_interface_ue_sim.h /^}fapi_dl_csi_rs_mnt_parms_t;$/;" t typeref:struct:fapi_dl_csi_rs_mnt_parms
+fapi_dl_csi_rs_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_csi_rs_pdu$/;" s
+fapi_dl_csi_rs_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_csi_rs_pdu_t_ue_sim;$/;" t typeref:struct:fapi_dl_csi_rs_pdu
+fapi_dl_dci fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_dci$/;" s
+fapi_dl_dci_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_dci_t_ue_sim;$/;" t typeref:struct:fapi_dl_dci
+fapi_dl_pdcch_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdcch_pdu$/;" s
+fapi_dl_pdcch_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_pdcch_pdu_t_ue_sim;$/;" t typeref:struct:fapi_dl_pdcch_pdu
+fapi_dl_pdsch_cbg_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_cbg_info$/;" s
+fapi_dl_pdsch_cbg_info_t fapi_interface_ue_sim.h /^} fapi_dl_pdsch_cbg_info_t;$/;" t typeref:struct:fapi_dl_pdsch_cbg_info
+fapi_dl_pdsch_mnt_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_mnt_parms$/;" s
+fapi_dl_pdsch_mnt_parms_t fapi_interface_ue_sim.h /^} fapi_dl_pdsch_mnt_parms_t;$/;" t typeref:struct:fapi_dl_pdsch_mnt_parms
+fapi_dl_pdsch_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_pdu$/;" s
+fapi_dl_pdsch_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_pdsch_pdu_t_ue_sim;$/;" t typeref:struct:fapi_dl_pdsch_pdu
+fapi_dl_pdsch_ptrs2 fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_ptrs2$/;" s
+fapi_dl_pdsch_ptrs2_t fapi_interface_ue_sim.h /^} fapi_dl_pdsch_ptrs2_t;$/;" t typeref:struct:fapi_dl_pdsch_ptrs2
+fapi_dl_pdsch_ptrs_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_ptrs_info$/;" s
+fapi_dl_pdsch_ptrs_info_t fapi_interface_ue_sim.h /^} fapi_dl_pdsch_ptrs_info_t;$/;" t typeref:struct:fapi_dl_pdsch_ptrs_info
+fapi_dl_pdsch_ptrs_mnt_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_ptrs_mnt_parms$/;" s
+fapi_dl_pdsch_ptrs_mnt_parms_t fapi_interface_ue_sim.h /^} fapi_dl_pdsch_ptrs_mnt_parms_t;$/;" t typeref:struct:fapi_dl_pdsch_ptrs_mnt_parms
+fapi_dl_pdsch_ptrsv3 fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_pdsch_ptrsv3$/;" s
+fapi_dl_pdsch_ptrsv3_t fapi_interface_ue_sim.h /^}fapi_dl_pdsch_ptrsv3_t;$/;" t typeref:struct:fapi_dl_pdsch_ptrsv3
+fapi_dl_prb_sym_rm_patrn_by_val fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_prb_sym_rm_patrn_by_val$/;" s
+fapi_dl_prb_sym_rm_patrn_by_val_t fapi_interface_ue_sim.h /^} fapi_dl_prb_sym_rm_patrn_by_val_t;$/;" t typeref:struct:fapi_dl_prb_sym_rm_patrn_by_val
+fapi_dl_ptrs_tx_pwr_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_ptrs_tx_pwr_info$/;" s
+fapi_dl_ptrs_tx_pwr_info_t fapi_interface_ue_sim.h /^}fapi_dl_ptrs_tx_pwr_info_t; $/;" t typeref:struct:fapi_dl_ptrs_tx_pwr_info
+fapi_dl_rate_match_ref fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_rate_match_ref$/;" s
+fapi_dl_rate_match_ref_t fapi_interface_ue_sim.h /^} fapi_dl_rate_match_ref_t;$/;" t typeref:struct:fapi_dl_rate_match_ref
+fapi_dl_rel16_pdsch_parms_t fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_rel16_pdsch_parms_t$/;" s
+fapi_dl_rel16_pdsch_parms_t fapi_interface_ue_sim.h /^} fapi_dl_rel16_pdsch_parms_t;$/;" t typeref:struct:fapi_dl_rel16_pdsch_parms_t
+fapi_dl_ssb_pbch_mnt_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_ssb_pbch_mnt_parms$/;" s
+fapi_dl_ssb_pbch_mnt_parms_t fapi_interface_ue_sim.h /^}fapi_dl_ssb_pbch_mnt_parms_t;$/;" t typeref:struct:fapi_dl_ssb_pbch_mnt_parms
+fapi_dl_ssb_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_ssb_pdu$/;" s
+fapi_dl_ssb_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_ssb_pdu_t_ue_sim;$/;" t typeref:struct:fapi_dl_ssb_pdu
+fapi_dl_tti_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_tti_req$/;" s
+fapi_dl_tti_req_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_tti_req_pdu$/;" s
+fapi_dl_tti_req_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_tti_req_pdu_t_ue_sim;$/;" t typeref:struct:fapi_dl_tti_req_pdu
+fapi_dl_tti_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_dl_tti_req_t_ue_sim;$/;" t typeref:struct:fapi_dl_tti_req
+fapi_dl_tx_pwr_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dl_tx_pwr_info$/;" s
+fapi_dl_tx_pwr_info_t fapi_interface_ue_sim.h /^} fapi_dl_tx_pwr_info_t;$/;" t typeref:struct:fapi_dl_tx_pwr_info
+fapi_dmrs fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_dmrs$/;" s
+fapi_dmrs_t fapi_interface_ue_sim.h /^} fapi_dmrs_t;$/;" t typeref:struct:fapi_dmrs
+fapi_error_ind fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_error_ind$/;" s
+fapi_error_ind_t_ue_sim fapi_interface_ue_sim.h /^} fapi_error_ind_t_ue_sim;$/;" t typeref:struct:fapi_error_ind
+fapi_harq_f0f1_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_harq_f0f1_info$/;" s
+fapi_harq_f0f1_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_harq_f0f1_info_t_ue_sim;$/;" t typeref:struct:fapi_harq_f0f1_info
+fapi_harq_f2f3f4_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_harq_f2f3f4_info$/;" s
+fapi_harq_f2f3f4_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_harq_f2f3f4_info_t_ue_sim;$/;" t typeref:struct:fapi_harq_f2f3f4_info
+fapi_harq_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_harq_info$/;" s
+fapi_harq_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_harq_info_t_ue_sim;$/;" t typeref:struct:fapi_harq_info
+fapi_int16_tlv fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_int16_tlv$/;" s
+fapi_int16_tlv_t_ue_sim fapi_interface_ue_sim.h /^} fapi_int16_tlv_t_ue_sim;$/;" t typeref:struct:fapi_int16_tlv
+fapi_lte_crs_rm_pattern fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_lte_crs_rm_pattern$/;" s
+fapi_lte_crs_rm_pattern_t fapi_interface_ue_sim.h /^}fapi_lte_crs_rm_pattern_t;$/;" t typeref:struct:fapi_lte_crs_rm_pattern
+fapi_lte_crs_rm_ptrn fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_lte_crs_rm_ptrn $/;" s
+fapi_lte_crs_rm_ptrn_t fapi_interface_ue_sim.h /^}fapi_lte_crs_rm_ptrn_t; $/;" t typeref:struct:fapi_lte_crs_rm_ptrn
+fapi_map_index fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_map_index$/;" s
+fapi_map_index_t fapi_interface_ue_sim.h /^}fapi_map_index_t;$/;" t typeref:struct:fapi_map_index
+fapi_mbsfn_sf_config_list fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_mbsfn_sf_config_list$/;" s
+fapi_mbsfn_sf_config_list_t fapi_interface_ue_sim.h /^}fapi_mbsfn_sf_config_list_t;$/;" t typeref:struct:fapi_mbsfn_sf_config_list
+fapi_meas_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_meas_config$/;" s
+fapi_meas_config_t_ue_sim fapi_interface_ue_sim.h /^} fapi_meas_config_t_ue_sim;$/;" t typeref:struct:fapi_meas_config
+fapi_meas_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_meas_parms$/;" s
+fapi_meas_parms_t_ue_sim fapi_interface_ue_sim.h /^} fapi_meas_parms_t_ue_sim;$/;" t typeref:struct:fapi_meas_parms
+fapi_msg fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_msg$/;" s
+fapi_msg_header fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_msg_header$/;" s
+fapi_msg_header_t_ue_sim fapi_interface_ue_sim.h /^} fapi_msg_header_t_ue_sim;$/;" t typeref:struct:fapi_msg_header
+fapi_msg_t_ue_sim fapi_interface_ue_sim.h /^} fapi_msg_t_ue_sim;$/;" t typeref:struct:fapi_msg
+fapi_multi_prach_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_multi_prach_config$/;" s
+fapi_multi_prach_config_t fapi_interface_ue_sim.h /^}fapi_multi_prach_config_t;$/;" t typeref:struct:fapi_multi_prach_config
+fapi_multi_ssb_resource_config_table fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_multi_ssb_resource_config_table$/;" s
+fapi_multi_ssb_resource_config_table_t fapi_interface_ue_sim.h /^}fapi_multi_ssb_resource_config_table_t;$/;" t typeref:struct:fapi_multi_ssb_resource_config_table
+fapi_optional_pusch_uci fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_optional_pusch_uci$/;" s
+fapi_optional_pusch_uci_t fapi_interface_ue_sim.h /^} fapi_optional_pusch_uci_t;$/;" t typeref:struct:fapi_optional_pusch_uci
+fapi_pRACH_Mntnc_param fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pRACH_Mntnc_param$/;" s
+fapi_pRACH_Mntnc_param_t fapi_interface_ue_sim.h /^}fapi_pRACH_Mntnc_param_t;$/;" t typeref:struct:fapi_pRACH_Mntnc_param
+fapi_pUCCH_Mntnnc_params fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pUCCH_Mntnnc_params$/;" s
+fapi_param_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_param_req$/;" s
+fapi_param_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_param_req_t_ue_sim;$/;" t typeref:struct:fapi_param_req
+fapi_param_resp fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_param_resp$/;" s
+fapi_param_resp_t_ue_sim fapi_interface_ue_sim.h /^} fapi_param_resp_t_ue_sim;$/;" t typeref:struct:fapi_param_resp
+fapi_params fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_params$/;" s
+fapi_params_t_ue_sim fapi_interface_ue_sim.h /^} fapi_params_t_ue_sim;$/;" t typeref:struct:fapi_params
+fapi_part2_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_part2_parms$/;" s
+fapi_part2_parms_t fapi_interface_ue_sim.h /^} fapi_part2_parms_t;$/;" t typeref:struct:fapi_part2_parms
+fapi_pdcch_mnt_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdcch_mnt_parms $/;" s
+fapi_pdcch_mnt_parms_t fapi_interface_ue_sim.h /^} fapi_pdcch_mnt_parms_t;$/;" t typeref:struct:fapi_pdcch_mnt_parms
+fapi_pdcch_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdcch_parms$/;" s
+fapi_pdcch_parms_t_ue_sim fapi_interface_ue_sim.h /^} fapi_pdcch_parms_t_ue_sim;$/;" t typeref:struct:fapi_pdcch_parms
+fapi_pdsch_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdsch_config$/;" s
+fapi_pdsch_config_t fapi_interface_ue_sim.h /^}fapi_pdsch_config_t;$/;" t typeref:struct:fapi_pdsch_config
+fapi_pdsch_freq_dom_alloc fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdsch_freq_dom_alloc$/;" s
+fapi_pdsch_freq_dom_alloc_t fapi_interface_ue_sim.h /^} fapi_pdsch_freq_dom_alloc_t;$/;" t typeref:struct:fapi_pdsch_freq_dom_alloc
+fapi_pdsch_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdsch_parms$/;" s
+fapi_pdsch_parms_t_ue_sim fapi_interface_ue_sim.h /^} fapi_pdsch_parms_t_ue_sim;$/;" t typeref:struct:fapi_pdsch_parms
+fapi_pdsch_time_dom_alloc fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdsch_time_dom_alloc$/;" s
+fapi_pdsch_time_dom_alloc_t fapi_interface_ue_sim.h /^} fapi_pdsch_time_dom_alloc_t;$/;" t typeref:struct:fapi_pdsch_time_dom_alloc
+fapi_pdu_ind_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_pdu_ind_info$/;" s
+fapi_pdu_ind_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_pdu_ind_info_t_ue_sim;$/;" t typeref:struct:fapi_pdu_ind_info
+fapi_phy_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_phy_config$/;" s
+fapi_phy_config_t fapi_interface_ue_sim.h /^}fapi_phy_config_t;$/;" t typeref:struct:fapi_phy_config
+fapi_phy_mib_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_phy_mib_pdu$/;" s
+fapi_phy_mib_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_phy_mib_pdu_t_ue_sim;$/;" t typeref:struct:fapi_phy_mib_pdu
+fapi_phy_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_phy_parms$/;" s
+fapi_phy_port fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_phy_port$/;" s
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+fapi_precoderWeight fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_precoderWeight$/;" s
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+fapi_pusch_parms_t_ue_sim fapi_interface_ue_sim.h /^}fapi_pusch_parms_t_ue_sim;$/;" t typeref:struct:fapi_pusch_parms
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+fapi_rach_indication fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_rach_indication$/;" s
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+fapi_rach_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_rach_pdu_t_ue_sim;$/;" t typeref:struct:fapi_rach_pdu
+fapi_rel16_mTRP_parameters fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_rel16_mTRP_parameters$/;" s
+fapi_rel16_mTRP_parameters_t fapi_interface_ue_sim.h /^}fapi_rel16_mTRP_parameters_t;$/;" t typeref:struct:fapi_rel16_mTRP_parameters
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+fapi_rel16_mtrp_config_t fapi_interface_ue_sim.h /^}fapi_rel16_mtrp_config_t;$/;" t typeref:struct:fapi_rel16_mtrp_config
+fapi_rx_data_indication fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_rx_data_indication$/;" s
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+fapi_signal_index fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_signal_index$/;" s
+fapi_signal_index_t fapi_interface_ue_sim.h /^} fapi_signal_index_t;$/;" t typeref:struct:fapi_signal_index
+fapi_slot_ind fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_slot_ind$/;" s
+fapi_slot_ind_t_ue_sim fapi_interface_ue_sim.h /^} fapi_slot_ind_t_ue_sim;$/;" t typeref:struct:fapi_slot_ind
+fapi_slotconfig fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_slotconfig$/;" s
+fapi_slotconfig_t_ue_sim fapi_interface_ue_sim.h /^} fapi_slotconfig_t_ue_sim;$/;" t typeref:struct:fapi_slotconfig
+fapi_sr_f0f1_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_sr_f0f1_info$/;" s
+fapi_sr_f0f1_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_sr_f0f1_info_t_ue_sim;$/;" t typeref:struct:fapi_sr_f0f1_info
+fapi_sr_f2f3f4_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_sr_f2f3f4_info$/;" s
+fapi_sr_f2f3f4_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_sr_f2f3f4_info_t_ue_sim;$/;" t typeref:struct:fapi_sr_f2f3f4_info
+fapi_srs_indication fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_srs_indication$/;" s
+fapi_srs_indication_t_ue_sim fapi_interface_ue_sim.h /^} fapi_srs_indication_t_ue_sim;$/;" t typeref:struct:fapi_srs_indication
+fapi_srs_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_srs_pdu$/;" s
+fapi_srs_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_srs_pdu_t_ue_sim;$/;" t typeref:struct:fapi_srs_pdu
+fapi_ssb_basic_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ssb_basic_parms$/;" s
+fapi_ssb_basic_parms_t fapi_interface_ue_sim.h /^} fapi_ssb_basic_parms_t;$/;" t typeref:struct:fapi_ssb_basic_parms
+fapi_ssb_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ssb_config$/;" s
+fapi_ssb_config_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ssb_config_t_ue_sim;$/;" t typeref:struct:fapi_ssb_config
+fapi_ssb_pwr_pbch_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ssb_pwr_pbch_config$/;" s
+fapi_ssb_pwr_pbch_config_t fapi_interface_ue_sim.h /^}fapi_ssb_pwr_pbch_config_t;$/;" t typeref:struct:fapi_ssb_pwr_pbch_config
+fapi_ssb_res_config_table fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ssb_res_config_table$/;" s
+fapi_ssb_res_config_table_t fapi_interface_ue_sim.h /^}fapi_ssb_res_config_table_t;$/;" t typeref:struct:fapi_ssb_res_config_table
+fapi_ssb_table fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ssb_table$/;" s
+fapi_ssb_table_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ssb_table_t_ue_sim;$/;" t typeref:struct:fapi_ssb_table
+fapi_ssb_tx_pwr_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ssb_tx_pwr_info$/;" s
+fapi_ssb_tx_pwr_info_t fapi_interface_ue_sim.h /^} fapi_ssb_tx_pwr_info_t;$/;" t typeref:struct:fapi_ssb_tx_pwr_info
+fapi_start_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_start_req$/;" s
+fapi_start_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_start_req_t_ue_sim;$/;" t typeref:struct:fapi_start_req
+fapi_start_resp fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_start_resp$/;" s
+fapi_start_resp_t fapi_interface_ue_sim.h /^}fapi_start_resp_t;$/;" t typeref:struct:fapi_start_resp
+fapi_stop_ind fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_stop_ind$/;" s
+fapi_stop_ind_t_ue_sim fapi_interface_ue_sim.h /^} fapi_stop_ind_t_ue_sim;$/;" t typeref:struct:fapi_stop_ind
+fapi_stop_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_stop_req$/;" s
+fapi_stop_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_stop_req_t_ue_sim;$/;" t typeref:struct:fapi_stop_req
+fapi_symb_snr fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_symb_snr$/;" s
+fapi_symb_snr_t_ue_sim fapi_interface_ue_sim.h /^} fapi_symb_snr_t_ue_sim;$/;" t typeref:struct:fapi_symb_snr
+fapi_tdd_table fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tdd_table$/;" s
+fapi_tdd_table_t_ue_sim fapi_interface_ue_sim.h /^} fapi_tdd_table_t_ue_sim;$/;" t typeref:struct:fapi_tdd_table
+fapi_tl fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tl$/;" s
+fapi_tl_t_ue_sim fapi_interface_ue_sim.h /^} fapi_tl_t_ue_sim;$/;" t typeref:struct:fapi_tl
+fapi_tx_dat_tlv fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tx_dat_tlv$/;" s
+fapi_tx_dat_tlv_t fapi_interface_ue_sim.h /^} fapi_tx_dat_tlv_t;$/;" t typeref:struct:fapi_tx_dat_tlv
+fapi_tx_data_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tx_data_req$/;" s
+fapi_tx_data_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_tx_data_req_t_ue_sim;$/;" t typeref:struct:fapi_tx_data_req
+fapi_tx_pdu_desc fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tx_pdu_desc$/;" s
+fapi_tx_pdu_desc_t_ue_sim fapi_interface_ue_sim.h /^} fapi_tx_pdu_desc_t_ue_sim;$/;" t typeref:struct:fapi_tx_pdu_desc
+fapi_tx_power_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tx_power_info$/;" s
+fapi_tx_power_info_t fapi_interface_ue_sim.h /^} fapi_tx_power_info_t;$/;" t typeref:struct:fapi_tx_power_info
+fapi_tx_pwr_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_tx_pwr_info$/;" s
+fapi_tx_pwr_info_t fapi_interface_ue_sim.h /^} fapi_tx_pwr_info_t;$/;" t typeref:struct:fapi_tx_pwr_info
+fapi_uci_config fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_config$/;" s
+fapi_uci_config_t fapi_interface_ue_sim.h /^}fapi_uci_config_t;$/;" t typeref:struct:fapi_uci_config
+fapi_uci_indication fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_indication$/;" s
+fapi_uci_indication_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uci_indication_t_ue_sim;$/;" t typeref:struct:fapi_uci_indication
+fapi_uci_mux_typ fapi_interface_ue_sim.h /^typedef enum PACK_STRUCT fapi_uci_mux_typ$/;" g
+fapi_uci_mux_typ_t fapi_interface_ue_sim.h /^}fapi_uci_mux_typ_t;$/;" t typeref:enum:fapi_uci_mux_typ
+fapi_uci_o_pucch_f0f1 fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_o_pucch_f0f1$/;" s
+fapi_uci_o_pucch_f0f1_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uci_o_pucch_f0f1_t_ue_sim;$/;" t typeref:struct:fapi_uci_o_pucch_f0f1
+fapi_uci_o_pucch_f2f3f4 fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_o_pucch_f2f3f4$/;" s
+fapi_uci_o_pucch_f2f3f4_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uci_o_pucch_f2f3f4_t_ue_sim;$/;" t typeref:struct:fapi_uci_o_pucch_f2f3f4
+fapi_uci_o_pusch fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_o_pusch$/;" s
+fapi_uci_o_pusch_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uci_o_pusch_t_ue_sim;$/;" t typeref:struct:fapi_uci_o_pusch
+fapi_uci_parms fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_parms$/;" s
+fapi_uci_parms_t fapi_interface_ue_sim.h /^} fapi_uci_parms_t;$/;" t typeref:struct:fapi_uci_parms
+fapi_uci_part1_part2 fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_part1_part2$/;" s
+fapi_uci_part1_part2_t fapi_interface_ue_sim.h /^} fapi_uci_part1_part2_t;$/;" t typeref:struct:fapi_uci_part1_part2
+fapi_uci_part2 fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_part2$/;" s
+fapi_uci_part2_t fapi_interface_ue_sim.h /^}fapi_uci_part2_t;$/;" t typeref:struct:fapi_uci_part2
+fapi_uci_pdu_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uci_pdu_info$/;" s
+fapi_uci_pdu_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uci_pdu_info_t_ue_sim;$/;" t typeref:struct:fapi_uci_pdu_info
+fapi_ue_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ue_info$/;" s
+fapi_ue_info_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ue_info_t_ue_sim; $/;" t typeref:struct:fapi_ue_info
+fapi_uint16_tlv fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uint16_tlv$/;" s
+fapi_uint16_tlv_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uint16_tlv_t_ue_sim;$/;" t typeref:struct:fapi_uint16_tlv
+fapi_uint32_tlv fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uint32_tlv$/;" s
+fapi_uint32_tlv_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uint32_tlv_t_ue_sim;$/;" t typeref:struct:fapi_uint32_tlv
+fapi_uint8_tlv fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_uint8_tlv$/;" s
+fapi_uint8_tlv_t_ue_sim fapi_interface_ue_sim.h /^} fapi_uint8_tlv_t_ue_sim;$/;" t typeref:struct:fapi_uint8_tlv
+fapi_ul_bwp_id fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_bwp_id$/;" s
+fapi_ul_bwp_id_t fapi_interface_ue_sim.h /^}fapi_ul_bwp_id_t;$/;" t typeref:struct:fapi_ul_bwp_id
+fapi_ul_dci_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_dci_req$/;" s
+fapi_ul_dci_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_dci_req_t_ue_sim;$/;" t typeref:struct:fapi_ul_dci_req
+fapi_ul_prach_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_prach_pdu$/;" s
+fapi_ul_prach_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_prach_pdu_t_ue_sim;$/;" t typeref:struct:fapi_ul_prach_pdu
+fapi_ul_pucch_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_pucch_pdu$/;" s
+fapi_ul_pucch_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_pucch_pdu_t_ue_sim;$/;" t typeref:struct:fapi_ul_pucch_pdu
+fapi_ul_pusch_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_pusch_pdu$/;" s
+fapi_ul_pusch_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_pusch_pdu_t_ue_sim;$/;" t typeref:struct:fapi_ul_pusch_pdu
+fapi_ul_srs_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_srs_pdu$/;" s
+fapi_ul_srs_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_srs_pdu_t_ue_sim;$/;" t typeref:struct:fapi_ul_srs_pdu
+fapi_ul_tti_req fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_tti_req$/;" s
+fapi_ul_tti_req_pdu fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT fapi_ul_tti_req_pdu$/;" s
+fapi_ul_tti_req_pdu_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_tti_req_pdu_t_ue_sim;$/;" t typeref:struct:fapi_ul_tti_req_pdu
+fapi_ul_tti_req_t_ue_sim fapi_interface_ue_sim.h /^} fapi_ul_tti_req_t_ue_sim;$/;" t typeref:struct:fapi_ul_tti_req
+flagCsiPart2 fapi_interface_ue_sim.h /^ uint16_t flagCsiPart2;$/;" m struct:fapi_pusch_uci
+format_type fapi_interface_ue_sim.h /^ uint8_t format_type;$/;" m struct:fapi_ul_pucch_pdu
+frameDuplexType fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim frameDuplexType;$/;" m struct:fapi_cell_config
+freqDomainRB fapi_interface_ue_sim.h /^ uint8_t freqDomainRB[35];$/;" m struct:fapi_prb_sym_rate_match_pattern
+freqDomainRB fapi_interface_ue_sim.h /^ uint8_t freqDomainRB[35];$/;" m struct:fapi_dl_prb_sym_rm_patrn_by_val
+freqDomainResources fapi_interface_ue_sim.h /^ uint8_t freqDomainResources[6];$/;" m struct:fapi_dl_coreset_rm_patrn
+freqIndex fapi_interface_ue_sim.h /^ uint8_t freqIndex;$/;" m struct:fapi_rach_pdu
+freq_density fapi_interface_ue_sim.h /^ uint8_t freq_density;$/;" m struct:fapi_dl_csi_rs_pdu
+freq_domain fapi_interface_ue_sim.h /^ uint16_t freq_domain;$/;" m struct:fapi_dl_csi_rs_pdu
+freq_domain_resource fapi_interface_ue_sim.h /^ uint8_t freq_domain_resource[FAPI_MAX_FREQ_DOMAIN_RES];$/;" m struct:fapi_coreset
+freq_hop_flag fapi_interface_ue_sim.h /^ uint8_t freq_hop_flag;$/;" m struct:fapi_ul_pucch_pdu
+frequencyShift7p5KHz fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim frequencyShift7p5KHz;$/;" m struct:fapi_carrier_config
+frequencyShift7p5KHz fapi_interface_ue_sim.h /^ uint8_t frequencyShift7p5KHz;$/;" m struct:fapi_carrier_config
+frequency_hopping fapi_interface_ue_sim.h /^ uint8_t frequency_hopping;$/;" m struct:fapi_ul_pusch_pdu
+frequency_hopping fapi_interface_ue_sim.h /^ uint8_t frequency_hopping;$/;" m struct:fapi_ul_srs_pdu
+frequency_position fapi_interface_ue_sim.h /^ uint8_t frequency_position;$/;" m struct:fapi_ul_srs_pdu
+frequency_shift fapi_interface_ue_sim.h /^ uint16_t frequency_shift;$/;" m struct:fapi_ul_srs_pdu
+groupOrSequenceHopping fapi_interface_ue_sim.h /^ uint8_t groupOrSequenceHopping;$/;" m struct:fapi_pusch_mnt_parms
+group_hop_flag fapi_interface_ue_sim.h /^ uint8_t group_hop_flag;$/;" m struct:fapi_ul_pucch_pdu
+group_or_sequence_hopping fapi_interface_ue_sim.h /^ uint8_t group_or_sequence_hopping;$/;" m struct:fapi_ul_srs_pdu
+handle fapi_interface_ue_sim.h /^ uint16_t handle;$/;" m struct:fapi_rach_pdu
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_crc_ind_info
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_pdu_ind_info
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_srs_pdu
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_uci_o_pucch_f0f1
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_uci_o_pusch
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_ul_pucch_pdu
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_ul_pusch_pdu
+handle fapi_interface_ue_sim.h /^ uint32_t handle;$/;" m struct:fapi_ul_srs_pdu
+handle fapi_interface_ue_sim.h /^ uint8_t handle; \/\/ Can be used for Phy Id or Carrier Id$/;" m struct:fapi_msg_header
+handle fapi_interface_ue_sim.h /^ uint32_t handle; $/;" m struct:fapi_pRACH_Mntnc_param
+harqInfo fapi_interface_ue_sim.h /^ fapi_harq_f0f1_info_t_ue_sim harqInfo; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pucch_f0f1
+harqInfo fapi_interface_ue_sim.h /^ fapi_harq_f2f3f4_info_t_ue_sim harqInfo; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pucch_f2f3f4
+harqInfo fapi_interface_ue_sim.h /^ fapi_harq_info_t_ue_sim harqInfo; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pusch
+harq_ack_bit_length fapi_interface_ue_sim.h /^ uint16_t harq_ack_bit_length;$/;" m struct:fapi_pusch_uci
+harq_bit_len fapi_interface_ue_sim.h /^ uint16_t harq_bit_len;$/;" m struct:fapi_harq_info
+harq_bit_len fapi_interface_ue_sim.h /^ uint16_t harq_bit_len;$/;" m struct:fapi_harq_f2f3f4_info
+harq_confidence_level fapi_interface_ue_sim.h /^ uint8_t harq_confidence_level;$/;" m struct:fapi_harq_f0f1_info
+harq_crc fapi_interface_ue_sim.h /^ uint8_t harq_crc;$/;" m struct:fapi_harq_info
+harq_crc fapi_interface_ue_sim.h /^ uint8_t harq_crc;$/;" m struct:fapi_harq_f2f3f4_info
+harq_id fapi_interface_ue_sim.h /^ uint8_t harq_id;$/;" m struct:fapi_crc_ind_info
+harq_id fapi_interface_ue_sim.h /^ uint8_t harq_id;$/;" m struct:fapi_pdu_ind_info
+harq_payload fapi_interface_ue_sim.h /^ uint8_t harq_payload[MAX_HARQ_INFO_LEN_BYTES];$/;" m struct:fapi_harq_info
+harq_payload fapi_interface_ue_sim.h /^ uint8_t harq_payload[MAX_HARQ_PAYLOAD_SIZE];$/;" m struct:fapi_harq_f2f3f4_info
+harq_process_id fapi_interface_ue_sim.h /^ uint8_t harq_process_id;$/;" m struct:fapi_pusch_data
+harq_value fapi_interface_ue_sim.h /^ uint8_t harq_value[MAX_NUMBER_OF_HARQS_PER_IND];$/;" m struct:fapi_harq_f0f1_info
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header; \/\/ Message Length is zero for START.request$/;" m struct:fapi_start_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header; \/\/ Message Length is zero for STOP.request$/;" m struct:fapi_stop_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header; \/\/ Message Length is zero for STOP.indication$/;" m struct:fapi_stop_ind
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header; \/\/ For PARAM.req message length in fapi_msg_t_ue_sim is zero$/;" m struct:fapi_param_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_config_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_config_resp
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_crc_ind
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_dl_tti_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_error_ind
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_param_resp
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_rach_indication
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_rx_data_indication
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_slot_ind
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_srs_indication
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_tx_data_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_uci_indication
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_ul_dci_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_ul_tti_req
+header fapi_interface_ue_sim.h /^ fapi_msg_header_t_ue_sim header;$/;" m struct:fapi_start_resp
+hopping_id fapi_interface_ue_sim.h /^ uint16_t hopping_id;$/;" m struct:fapi_ul_pucch_pdu
+ifapi_csi_rs_tx_pwr_info fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT ifapi_csi_rs_tx_pwr_info$/;" s
+imax fapi_interface_ue_sim.h /^ uint8_t imax;$/;" m struct:fapi_ssb_res_config_table
+indexFdRa fapi_interface_ue_sim.h /^ uint8_t indexFdRa;$/;" m struct:fapi_ul_prach_pdu
+indicationInstancePerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim indicationInstancePerSlot[6];$/;" m struct:fapi_phy_config
+initialDlBwpSize fapi_interface_ue_sim.h /^ uint16_t initialDlBwpSize;$/;" m struct:fapi_dl_pdsch_mnt_parms
+initialUlBwpSize fapi_interface_ue_sim.h /^ uint16_t initialUlBwpSize;$/;" m struct:fapi_pusch_mnt_parms
+initial_cyclic_shift fapi_interface_ue_sim.h /^ uint16_t initial_cyclic_shift;$/;" m struct:fapi_ul_pucch_pdu
+int16_t fapi_interface_ue_sim.h /^typedef int16_t int16_t;$/;" t
+int32_t fapi_interface_ue_sim.h /^typedef int32_t int32_t;$/;" t
+int8_t fapi_interface_ue_sim.h /^typedef signed char int8_t;$/;" t
+interleaver_size fapi_interface_ue_sim.h /^ uint8_t interleaver_size;$/;" m struct:fapi_coreset
+intraSlotFrequencyHopping fapi_interface_ue_sim.h /^ uint8_t intraSlotFrequencyHopping;$/;" m struct:fapi_ul_pucch_pdu
+intra_freq_reselction fapi_interface_ue_sim.h /^ uint8_t intra_freq_reselction;$/;" m struct:fapi_phy_mib_pdu
+is_inline_tb_crc fapi_interface_ue_sim.h /^ uint8_t is_inline_tb_crc;$/;" m struct:fapi_dl_pdsch_cbg_info
+is_last_cb_present fapi_interface_ue_sim.h /^ uint8_t is_last_cb_present;$/;" m struct:fapi_dl_pdsch_cbg_info
+k1 fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim k1;$/;" m struct:fapi_prachFdOccasion
+k1 fapi_interface_ue_sim.h /^ int16_t k1;$/;" m struct:fapi_prachFdOccasion
+lMax fapi_interface_ue_sim.h /^ uint8_t lMax;$/;" m struct:fapi_ssb_basic_parms
+ldpcBaseGraph fapi_interface_ue_sim.h /^ uint8_t ldpcBaseGraph;$/;" m struct:fapi_pusch_mnt_parms
+ldpcBaseGraph fapi_interface_ue_sim.h /^ uint8_t ldpcBaseGraph;$/;" m struct:fapi_dl_codeword_info
+length fapi_interface_ue_sim.h /^ uint16_t length;$/;" m struct:fapi_tl
+length fapi_interface_ue_sim.h /^ uint32_t length; \/\/ Length of the message body in bytes$/;" m struct:fapi_msg
+length fapi_interface_ue_sim.h /^ uint32_t length;$/;" m struct:fapi_tx_dat_tlv
+length fapi_interface_ue_sim.h /^ uint8_t length;$/;" m struct:fapi_config_tlv
+low_papr_group_number fapi_interface_ue_sim.h /^ uint8_t low_papr_group_number;$/;" m struct:fapi_dfts_ofdm
+low_papr_sequence_number fapi_interface_ue_sim.h /^ uint16_t low_papr_sequence_number;$/;" m struct:fapi_dfts_ofdm
+lteCrsRaMaPatrn fapi_interface_ue_sim.h /^ uint8_t lteCrsRaMaPatrn[0]; \/\/ side depends on ceil(lteCrsRaMaPatrnBitmapSize \/ 8)$/;" m struct:fapi_dl_rate_match_ref
+lteCrsRaMaPatrnBitmapSize fapi_interface_ue_sim.h /^ uint8_t lteCrsRaMaPatrnBitmapSize;$/;" m struct:fapi_dl_rate_match_ref
+lteCrsRmPattern fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim lteCrsRmPattern;$/;" m struct:fapi_lte_crs_rm_pattern
+lteCrsRmPtrn fapi_interface_ue_sim.h /^ fapi_lte_crs_rm_pattern_t lteCrsRmPtrn;$/;" m struct:fapi_config
+lteCrsRmPtrn fapi_interface_ue_sim.h /^ fapi_lte_crs_rm_ptrn_t lteCrsRmPtrn[0];$/;" m struct:fapi_lte_crs_rm_pattern
+lteFrameStructureType fapi_interface_ue_sim.h /^ uint8_t lteFrameStructureType;$/;" m struct:fapi_mbsfn_sf_config_list
+mTRP_Support fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim mTRP_Support; $/;" m struct:fapi_rel16_mTRP_parameters
+map fapi_interface_ue_sim.h /^ uint16_t map[0];$/;" m struct:fapi_map_index
+mapIndex fapi_interface_ue_sim.h /^ fapi_map_index_t mapIndex[];$/;" m struct:fapi_uci_config
+maxCodeRate fapi_interface_ue_sim.h /^ uint8_t maxCodeRate;$/;" m struct:fapi_pUCCH_Mntnnc_params
+maxMuMimoUsersDl fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxMuMimoUsersDl;$/;" m struct:fapi_pdsch_parms
+maxMuMimoUsersUl fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxMuMimoUsersUl;$/;" m struct:fapi_pusch_parms
+maxNumCbgPerTb fapi_interface_ue_sim.h /^ uint8_t maxNumCbgPerTb;$/;" m struct:fapi_dl_tx_pwr_info
+maxNumPDUsInDL_TTI fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim maxNumPDUsInDL_TTI;$/;" m struct:fapi_cell_params
+maxNumPDUsInUL_DCI fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim maxNumPDUsInUL_DCI; $/;" m struct:fapi_cell_params
+maxNumPDUsInUL_TTI fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim maxNumPDUsInUL_TTI;$/;" m struct:fapi_cell_params
+maxNumPhys fapi_interface_ue_sim.h /^ uint8_t maxNumPhys;$/;" m struct:fapi_phy_profile
+maxNumPrachConfigurations fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim maxNumPrachConfigurations;$/;" m struct:fapi_prach_parms
+maxNumUciMaps fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim maxNumUciMaps;$/;" m struct:fapi_uci_parms
+maxNumUlBwpIds fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxNumUlBwpIds;$/;" m struct:fapi_pucch_parms
+maxNumberMimoLayersCbPusch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxNumberMimoLayersCbPusch;$/;" m struct:fapi_pusch_parms
+maxNumberMimoLayersPdsch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxNumberMimoLayersPdsch;$/;" m struct:fapi_pdsch_parms
+maxNumberMimoLayersnonCbPusch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxNumberMimoLayersnonCbPusch;$/;" m struct:fapi_pusch_parms
+maxPdcchsPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxPdcchsPerSlot;$/;" m struct:fapi_pdcch_parms
+maxPdschsTBsPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxPdschsTBsPerSlot;$/;" m struct:fapi_pdsch_parms
+maxPduschsTBsPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxPduschsTBsPerSlot;$/;" m struct:fapi_pusch_parms
+maxPrachFdOccasionsInASlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxPrachFdOccasionsInASlot;$/;" m struct:fapi_prach_parms
+maxPucchsPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim maxPucchsPerSlot;$/;" m struct:fapi_pucch_parms
+mbsfnSFConfigList fapi_interface_ue_sim.h /^ fapi_mbsfn_sf_config_list_t mbsfnSFConfigList[0];$/;" m struct:fapi_lte_crs_rm_ptrn
+mcs_index fapi_interface_ue_sim.h /^ uint8_t mcs_index;$/;" m struct:fapi_codeword_pdu
+mcs_index fapi_interface_ue_sim.h /^ uint8_t mcs_index;$/;" m struct:fapi_ul_pusch_pdu
+mcs_table fapi_interface_ue_sim.h /^ uint8_t mcs_table;$/;" m struct:fapi_codeword_pdu
+mcs_table fapi_interface_ue_sim.h /^ uint8_t mcs_table;$/;" m struct:fapi_ul_pusch_pdu
+measConfig fapi_interface_ue_sim.h /^ fapi_meas_config_t_ue_sim measConfig;$/;" m struct:fapi_config
+measConfig fapi_interface_ue_sim.h /^ fapi_meas_config_t_ue_sim measConfig;$/;" m struct:fapi_config
+measParms fapi_interface_ue_sim.h /^ fapi_meas_parms_t_ue_sim measParms;$/;" m struct:fapi_params
+message_id fapi_interface_ue_sim.h /^ uint8_t message_id;$/;" m struct:fapi_error_ind
+message_type_id fapi_interface_ue_sim.h /^ uint16_t message_type_id;$/;" m struct:fapi_msg
+mib fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim mib;$/;" m struct:fapi_ssb_table
+moreThanOneIndicationPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim moreThanOneIndicationPerSlot[6];$/;" m struct:fapi_phy_parms
+moreThanOneRequestPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim moreThanOneRequestPerSlot[4]; $/;" m struct:fapi_phy_parms
+msg_body fapi_interface_ue_sim.h /^ uint8_t* msg_body;$/;" m struct:pkd_fapi_l1api_msg_frmt
+msg_details fapi_interface_ue_sim.h /^ fapi_msg_t_ue_sim msg_details;$/;" m struct:fapi_msg_header
+msg_id fapi_interface_ue_sim.h /^ uint8_t msg_id;$/;" m struct:pkd_fapi_l1api_msg_frmt
+msg_len fapi_interface_ue_sim.h /^ uint16_t msg_len;$/;" m struct:pkd_fapi_l1api_msg_frmt
+multiPrachConfig fapi_interface_ue_sim.h /^ fapi_multi_prach_config_t multiPrachConfig;$/;" m struct:fapi_config
+multiPrachConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim multiPrachConfig;$/;" m struct:fapi_multi_prach_config
+multiSsbResourceConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim multiSsbResourceConfig;$/;" m struct:fapi_multi_ssb_resource_config_table
+multiSsbResourceConfigTable fapi_interface_ue_sim.h /^ fapi_multi_ssb_resource_config_table_t multiSsbResourceConfigTable;$/;" m struct:fapi_config
+multi_slot_tx_indicator fapi_interface_ue_sim.h /^ uint8_t multi_slot_tx_indicator;$/;" m struct:fapi_ul_pucch_pdu
+multipleCellsSsPbchInACarrier fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim multipleCellsSsPbchInACarrier;$/;" m struct:fapi_carrier_parms
+multipleCellsSsPbchInACarrier fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim multipleCellsSsPbchInACarrier;$/;" m struct:fapi_ssb_table
+nDlTypes fapi_interface_ue_sim.h /^ uint8_t nDlTypes;$/;" m struct:fapi_dl_tti_req
+nDlTypes fapi_interface_ue_sim.h /^ uint8_t nDlTypes;$/;" m struct:fapi_ul_dci_req
+nEpreRatOfPdschToPtrsProfNR fapi_interface_ue_sim.h /^ uint8_t nEpreRatOfPdschToPtrsProfNR; $/;" m struct:fapi_dl_pdsch_ptrs2
+nIdPdcchData fapi_interface_ue_sim.h /^ uint16_t nIdPdcchData;$/;" m struct:fapi_dl_dci
+nIdPdcchDmrs fapi_interface_ue_sim.h /^ uint16_t nIdPdcchDmrs; $/;" m struct:fapi_coreset_parms
+nIdPdsch fapi_interface_ue_sim.h /^ uint16_t nIdPdsch;$/;" m struct:fapi_dl_pdsch_pdu
+nIdPucchHopping fapi_interface_ue_sim.h /^ uint16_t nIdPucchHopping;$/;" m struct:fapi_ul_bwp_id
+nIdPucchHopping fapi_interface_ue_sim.h /^ uint8_t nIdPucchHopping;$/;" m struct:fapi_ul_pucch_pdu
+nIdPucchScrambling fapi_interface_ue_sim.h /^ uint16_t nIdPucchScrambling;$/;" m struct:fapi_ul_pucch_pdu
+nIdPusch fapi_interface_ue_sim.h /^ uint16_t nIdPusch;$/;" m struct:fapi_ul_pusch_pdu
+nPDUsOfEachType fapi_interface_ue_sim.h /^ uint16_t nPDUsOfEachType[MAX_NDLTYPES_DL_TTI_REQ]; $/;" m struct:fapi_dl_tti_req
+nPDUsOfEachType fapi_interface_ue_sim.h /^ uint16_t nPDUsOfEachType[MAX_NDLTYPES_UL_DCI_REQ];$/;" m struct:fapi_ul_dci_req
+nPDUsOfEachType fapi_interface_ue_sim.h /^ uint16_t nPDUsOfEachType[MAX_NUM_UL_TYPES]; $/;" m struct:fapi_ul_tti_req
+nRntiPdcchData fapi_interface_ue_sim.h /^ uint16_t nRntiPdcchData;$/;" m struct:fapi_dl_dci
+nScid fapi_interface_ue_sim.h /^ uint8_t nScid;$/;" m struct:fapi_ul_pusch_pdu
+nUlTypes fapi_interface_ue_sim.h /^ uint8_t nUlTypes;$/;" m struct:fapi_ul_tti_req
+n_epre_ratio_of_pdsch_to_ptrs fapi_interface_ue_sim.h /^ uint8_t n_epre_ratio_of_pdsch_to_ptrs;$/;" m struct:fapi_dl_pdsch_ptrs_info
+n_group fapi_interface_ue_sim.h /^ uint8_t n_group; \/* Number of UE Groups included in this message.*\/$/;" m struct:fapi_ul_tti_req
+n_group fapi_interface_ue_sim.h /^ uint8_t n_group;$/;" m struct:fapi_dl_tti_req
+n_pdus fapi_interface_ue_sim.h /^ uint16_t n_pdus;$/;" m struct:fapi_dl_tti_req
+n_pdus fapi_interface_ue_sim.h /^ uint16_t n_pdus;$/;" m struct:fapi_ul_tti_req
+n_pdus fapi_interface_ue_sim.h /^ uint8_t n_pdus;$/;" m struct:fapi_dl_tti_req
+n_pdus fapi_interface_ue_sim.h /^ uint8_t n_pdus;$/;" m struct:fapi_ul_tti_req
+n_ue fapi_interface_ue_sim.h /^ uint8_t n_ue;$/;" m struct:fapi_ue_info
+n_ulcch fapi_interface_ue_sim.h /^ uint8_t n_ulcch; \/* Number of ULCCH PDUs that are included in this message.*\/$/;" m struct:fapi_ul_tti_req
+n_ulsch fapi_interface_ue_sim.h /^ uint8_t n_ulsch; \/* Number of ULSCH PDUs that are included in this message.*\/$/;" m struct:fapi_ul_tti_req
+new_data_indicator fapi_interface_ue_sim.h /^ uint8_t new_data_indicator;$/;" m struct:fapi_pusch_data
+nrCrsPorts fapi_interface_ue_sim.h /^ uint8_t nrCrsPorts;$/;" m struct:fapi_lte_crs_rm_ptrn
+nr_of_code_words fapi_interface_ue_sim.h /^ uint8_t nr_of_code_words; \/* SCF : Code Word Info Start *\/$/;" m struct:fapi_dl_pdsch_pdu
+nr_of_layers fapi_interface_ue_sim.h /^ uint8_t nr_of_layers;$/;" m struct:fapi_dl_pdsch_pdu
+nr_of_layers fapi_interface_ue_sim.h /^ uint8_t nr_of_layers;$/;" m struct:fapi_ul_pusch_pdu
+nr_of_rbs fapi_interface_ue_sim.h /^ uint16_t nr_of_rbs;$/;" m struct:fapi_dl_csi_rs_pdu
+nr_of_symbols fapi_interface_ue_sim.h /^ uint8_t nr_of_symbols; \/*SCF : PDSCH Allocation in Time Domain End *\/$/;" m struct:fapi_pdsch_time_dom_alloc
+nr_of_symbols fapi_interface_ue_sim.h /^ uint8_t nr_of_symbols;$/;" m struct:fapi_ul_pucch_pdu
+nr_of_symbols fapi_interface_ue_sim.h /^ uint8_t nr_of_symbols;$/;" m struct:fapi_ul_pusch_pdu
+nr_ssb_periodicity fapi_interface_ue_sim.h /^typedef enum nr_ssb_periodicity$/;" g
+nr_ssb_periodicity_t fapi_interface_ue_sim.h /^} nr_ssb_periodicity_t;$/;" t typeref:enum:nr_ssb_periodicity
+numAntPorts fapi_interface_ue_sim.h /^ uint16_t numAntPorts;$/;" m struct:PACK_STRUCT
+numBasebandPorts fapi_interface_ue_sim.h /^ uint16_t numBasebandPorts;$/;" m struct:fapi_beamforming_table
+numCapabilities fapi_interface_ue_sim.h /^ uint16_t numCapabilities;$/;" m struct:fapi_capability_validity
+numCoresetRmPatrn fapi_interface_ue_sim.h /^ uint8_t numCoresetRmPatrn;$/;" m struct:fapi_dl_rate_match_ref
+numCsiRsForRaMa fapi_interface_ue_sim.h /^ uint8_t numCsiRsForRaMa;$/;" m struct:fapi_dl_rate_match_ref
+numDfeProfiles fapi_interface_ue_sim.h /^ uint16_t numDfeProfiles;$/;" m struct:fapi_dfe_profile
+numDigBeams fapi_interface_ue_sim.h /^ uint16_t numDigBeams;$/;" m struct:fapi_beamforming_table
+numDlBbPorts fapi_interface_ue_sim.h /^ uint16_t numDlBbPorts;$/;" m struct:fapi_phy_parms
+numDlPortRanges fapi_interface_ue_sim.h /^ uint8_t numDlPortRanges; \/* Number of DL port ranges for this PHYs *\/$/;" m struct:fapi_phy_port
+numFdRa fapi_interface_ue_sim.h /^ uint8_t numFdRa;$/;" m struct:fapi_pRACH_Mntnc_param
+numLayers fapi_interface_ue_sim.h /^ uint16_t numLayers;$/;" m struct:PACK_STRUCT
+numLteCrsRmPattern fapi_interface_ue_sim.h /^ uint8_t numLteCrsRmPattern;$/;" m struct:fapi_lte_crs_rm_pattern
+numOfRateMatchPatternLTECrsInPhy fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numOfRateMatchPatternLTECrsInPhy;$/;" m struct:fapi_pdsch_parms
+numOfRateMatchPatternLTECrsPerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numOfRateMatchPatternLTECrsPerSlot;$/;" m struct:fapi_pdsch_parms
+numPart1Params fapi_interface_ue_sim.h /^ uint8_t numPart1Params;$/;" m struct:fapi_map_index
+numPart1Params fapi_interface_ue_sim.h /^ uint8_t numPart1Params;$/;" m struct:fapi_part2_parms
+numPart1Params fapi_interface_ue_sim.h /^ uint8_t numPart1Params;$/;" m struct:fapi_uci_part2
+numPart2s fapi_interface_ue_sim.h /^ uint16_t numPart2s;$/;" m struct:fapi_optional_pusch_uci
+numPart2s fapi_interface_ue_sim.h /^ uint16_t numPart2s;$/;" m struct:fapi_uci_part1_part2
+numPdus fapi_interface_ue_sim.h /^ uint16_t numPdus;$/;" m struct:fapi_tx_data_req
+numPdus fapi_interface_ue_sim.h /^ uint8_t numPdus;$/;" m struct:fapi_rach_indication
+numPdus fapi_interface_ue_sim.h /^ uint8_t numPdus;$/;" m struct:fapi_srs_indication
+numPhyProfiles fapi_interface_ue_sim.h /^ uint16_t numPhyProfiles;$/;" m struct:fapi_phy_parms
+numPhyProfiles fapi_interface_ue_sim.h /^ uint16_t numPhyProfiles;$/;" m struct:fapi_dfe_profile
+numPrachConfigurations fapi_interface_ue_sim.h /^ uint16_t numPrachConfigurations;$/;" m struct:fapi_multi_prach_config
+numPrachConfigurationsTlv fapi_interface_ue_sim.h /^ fapi_prach_configuration_t_ue_sim numPrachConfigurationsTlv[]; $/;" m struct:fapi_multi_prach_config
+numPrachFdOccasions fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numPrachFdOccasions;$/;" m struct:fapi_prach_configuration
+numPrachFdOccasions fapi_interface_ue_sim.h /^ uint8_t numPrachFdOccasions;$/;" m struct:fapi_prach_configuration
+numPrbSymRmPatrnByVal fapi_interface_ue_sim.h /^ uint8_t numPrbSymRmPatrnByVal; $/;" m struct:fapi_dl_rate_match_ref
+numPrbSymbRatePattern fapi_interface_ue_sim.h /^ uint8_t numPrbSymbRatePattern;$/;" m struct:fapi_prb_symbol_rate_match_pattern
+numPreamble fapi_interface_ue_sim.h /^ uint8_t numPreamble;$/;" m struct:fapi_rach_pdu
+numPreambleIndices fapi_interface_ue_sim.h /^ uint8_t numPreambleIndices;$/;" m struct:fapi_pRACH_Mntnc_param
+numRbs fapi_interface_ue_sim.h /^ uint16_t numRbs;$/;" m struct:fapi_symb_snr
+numReportedSymbols fapi_interface_ue_sim.h /^ uint8_t numReportedSymbols;$/;" m struct:fapi_srs_pdu
+numRootSequences fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numRootSequences;$/;" m struct:fapi_prachFdOccasion
+numRootSequences fapi_interface_ue_sim.h /^ uint8_t numRootSequences;$/;" m struct:fapi_prachFdOccasion
+numRxAnt fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim numRxAnt;$/;" m struct:fapi_carrier_config
+numRxAnt fapi_interface_ue_sim.h /^ uint16_t numRxAnt;$/;" m struct:fapi_carrier_config
+numRxPortsTRP1 fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numRxPortsTRP1;$/;" m struct:fapi_rel16_mtrp_config
+numSsbConfigurations fapi_interface_ue_sim.h /^ uint8_t numSsbConfigurations;$/;" m struct:fapi_multi_ssb_resource_config_table
+numSymbols fapi_interface_ue_sim.h /^ uint8_t numSymbols;$/;" m struct:fapi_srs_pdu
+numTlvs fapi_interface_ue_sim.h /^ uint32_t numTlvs;$/;" m struct:fapi_tx_pdu_desc
+numTlvsToReport fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim numTlvsToReport;$/;" m struct:fapi_cell_params
+numTxAnt fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim numTxAnt;$/;" m struct:fapi_carrier_config
+numTxAnt fapi_interface_ue_sim.h /^ uint16_t numTxAnt;$/;" m struct:fapi_carrier_config
+numTxPortsTRP1 fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numTxPortsTRP1;$/;" m struct:fapi_rel16_mtrp_config
+numTxRus fapi_interface_ue_sim.h /^ uint16_t numTxRus;$/;" m struct:fapi_beamforming_table
+numUci2Maps fapi_interface_ue_sim.h /^ uint16_t numUci2Maps; $/;" m struct:fapi_uci_config
+numUlBbPorts fapi_interface_ue_sim.h /^ uint16_t numUlBbPorts;$/;" m struct:fapi_phy_parms
+numUlBwpIds fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim numUlBwpIds;$/;" m struct:fapi_pucch_semi_static_config
+numUlPortRanges fapi_interface_ue_sim.h /^ uint8_t numUlPortRanges;$/;" m struct:fapi_phy_port
+numUnusedRootSequences fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim numUnusedRootSequences; \/\/ 5G FAPI Table 3-24 Subset$/;" m struct:fapi_prachFdOccasion
+numUnusedRootSequences fapi_interface_ue_sim.h /^ uint16_t numUnusedRootSequences; \/\/ 5G FAPI Table 3-24 Subset$/;" m struct:fapi_prachFdOccasion
+num_ant_ports fapi_interface_ue_sim.h /^ uint8_t num_ant_ports;$/;" m struct:fapi_ul_srs_pdu
+num_cb fapi_interface_ue_sim.h /^ uint16_t num_cb;$/;" m struct:fapi_crc_ind_info
+num_cb fapi_interface_ue_sim.h /^ uint16_t num_cb;$/;" m struct:fapi_pusch_data
+num_crcs fapi_interface_ue_sim.h /^ uint16_t num_crcs;$/;" m struct:fapi_crc_ind
+num_cs fapi_interface_ue_sim.h /^ uint16_t num_cs;$/;" m struct:fapi_ul_prach_pdu
+num_dl_dci fapi_interface_ue_sim.h /^ uint16_t num_dl_dci; \/*Number of DCIs in this CORESET *\/ $/;" m struct:fapi_dl_pdcch_pdu
+num_dmrs_cdm_grps_no_data fapi_interface_ue_sim.h /^ uint8_t num_dmrs_cdm_grps_no_data;$/;" m struct:fapi_dmrs
+num_dmrs_cdm_grps_no_data fapi_interface_ue_sim.h /^ uint8_t num_dmrs_cdm_grps_no_data;$/;" m struct:fapi_ul_pusch_pdu
+num_harq fapi_interface_ue_sim.h /^ uint8_t num_harq;$/;" m struct:fapi_harq_f0f1_info
+num_pdus fapi_interface_ue_sim.h /^ uint16_t num_pdus;$/;" m struct:fapi_rx_data_indication
+num_pdus fapi_interface_ue_sim.h /^ uint8_t num_pdus;$/;" m struct:fapi_ul_dci_req
+num_prach_ocas fapi_interface_ue_sim.h /^ uint8_t num_prach_ocas;$/;" m struct:fapi_ul_prach_pdu
+num_prgs fapi_interface_ue_sim.h /^ uint16_t num_prgs;$/;" m struct:fapi_bmform
+num_prgs fapi_interface_ue_sim.h /^ uint16_t num_prgs;$/;" m struct:fapi_precoding_bmform
+num_ptrs_ports fapi_interface_ue_sim.h /^ uint8_t num_ptrs_ports;$/;" m struct:fapi_pusch_ptrs
+num_ra fapi_interface_ue_sim.h /^ uint8_t num_ra;$/;" m struct:fapi_ul_prach_pdu
+num_repetitions fapi_interface_ue_sim.h /^ uint8_t num_repetitions;$/;" m struct:fapi_ul_srs_pdu
+num_symbols fapi_interface_ue_sim.h /^ uint8_t num_symbols;$/;" m struct:fapi_ul_srs_pdu
+num_ucis fapi_interface_ue_sim.h /^ uint16_t num_ucis;$/;" m struct:fapi_uci_indication
+numberOfMessagesIncluded fapi_interface_ue_sim.h /^ uint8_t numberOfMessagesIncluded;$/;" m struct:fapi_msg_header
+number_of_inv_tlvs_idle_only fapi_interface_ue_sim.h /^ uint8_t number_of_inv_tlvs_idle_only;$/;" m struct:fapi_config_resp
+number_of_inv_tlvs_running_only fapi_interface_ue_sim.h /^ uint8_t number_of_inv_tlvs_running_only; $/;" m struct:fapi_config_resp
+number_of_invalid_tlvs fapi_interface_ue_sim.h /^ uint8_t number_of_invalid_tlvs;$/;" m struct:fapi_config_resp
+number_of_missing_tlvs fapi_interface_ue_sim.h /^ uint8_t number_of_missing_tlvs;$/;" m struct:fapi_config_resp
+number_of_tlvs fapi_interface_ue_sim.h /^ uint8_t number_of_tlvs;$/;" m struct:fapi_config_req
+number_of_tlvs fapi_interface_ue_sim.h /^ uint8_t number_of_tlvs;$/;" m struct:fapi_param_resp
+obsolete8bit fapi_interface_ue_sim.h /^ uint8_t obsolete8bit;$/;" m struct:fapi_ul_pucch_pdu
+oneOrTwoSlots fapi_interface_ue_sim.h /^ uint8_t oneOrTwoSlots;$/;" m struct:fapi_prb_sym_rate_match_pattern
+optionalPuschUci fapi_interface_ue_sim.h /^ fapi_optional_pusch_uci_t optionalPuschUci; $/;" m struct:fapi_ul_pusch_pdu
+pRACH_Mntnc fapi_interface_ue_sim.h /^ fapi_pRACH_Mntnc_param_t pRACH_Mntnc; $/;" m struct:fapi_ul_prach_pdu
+paramOffsets fapi_interface_ue_sim.h /^ uint16_t paramOffsets[0];$/;" m struct:fapi_part2_parms
+paramOffsets fapi_interface_ue_sim.h /^ uint16_t paramOffsets[0];$/;" m struct:fapi_uci_part2
+paramSizes fapi_interface_ue_sim.h /^ uint8_t paramSizes[0];$/;" m struct:fapi_part2_parms
+paramSizes fapi_interface_ue_sim.h /^ uint8_t paramSizes[0];$/;" m struct:fapi_uci_part2
+part2SizeMapIndex fapi_interface_ue_sim.h /^ uint16_t part2SizeMapIndex; $/;" m struct:fapi_part2_parms
+part2SizeMapIndex fapi_interface_ue_sim.h /^ uint8_t part2SizeMapIndex;$/;" m struct:fapi_uci_part2
+part2_parms fapi_interface_ue_sim.h /^ fapi_part2_parms_t part2_parms[0]; $/;" m struct:fapi_optional_pusch_uci
+payload fapi_interface_ue_sim.h /^ uint8_t payload[];$/;" m struct:fapi_dl_dci
+payload_size_bits fapi_interface_ue_sim.h /^ uint16_t payload_size_bits;$/;" m struct:fapi_dl_dci
+pc_and_bform fapi_interface_ue_sim.h /^ fapi_precoding_bmform_t_ue_sim pc_and_bform;$/;" m struct:fapi_dl_dci
+pdcchDataPowerOffsetProfileSSS fapi_interface_ue_sim.h /^ int16_t pdcchDataPowerOffsetProfileSSS; $/;" m struct:fapi_dci_specific_parms
+pdcchDmrsPowerOffsetProfileSSS fapi_interface_ue_sim.h /^ int16_t pdcchDmrsPowerOffsetProfileSSS;$/;" m struct:fapi_dci_specific_parms
+pdcchMntParms fapi_interface_ue_sim.h /^ fapi_pdcch_mnt_parms_t pdcchMntParms;$/;" m struct:fapi_dl_pdcch_pdu
+pdcchMuMimo fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdcchMuMimo;$/;" m struct:fapi_pdcch_parms
+pdcchParms fapi_interface_ue_sim.h /^ fapi_pdcch_parms_t_ue_sim pdcchParms;$/;" m struct:fapi_params
+pdcchPduIndex fapi_interface_ue_sim.h /^ uint16_t pdcchPduIndex;$/;" m struct:fapi_dl_rate_match_ref
+pdcchPduIndex fapi_interface_ue_sim.h /^ uint16_t pdcchPduIndex; $/;" m struct:fapi_coreset_parms
+pdcchPrecoderCycling fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdcchPrecoderCycling;$/;" m struct:fapi_pdcch_parms
+pdcchRateMatch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdcchRateMatch; $/;" m struct:fapi_pdsch_parms
+pdcch_config_sib1 fapi_interface_ue_sim.h /^ uint8_t pdcch_config_sib1;$/;" m struct:fapi_phy_mib_pdu
+pdcch_pdu fapi_interface_ue_sim.h /^ fapi_dl_pdcch_pdu_t_ue_sim pdcch_pdu;$/;" m union:fapi_dl_tti_req_pdu::__anon3
+pdcch_pdu fapi_interface_ue_sim.h /^ fapi_dl_pdcch_pdu_t_ue_sim pdcch_pdu;$/;" m struct:fapi_dci_pdu
+pdschAllocationTypes fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschAllocationTypes;$/;" m struct:fapi_pdsch_parms
+pdschCbg fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschCbg;$/;" m struct:fapi_pdsch_parms
+pdschCbgScheme fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschCbgScheme;$/;" m struct:fapi_pdsch_config
+pdschConfig fapi_interface_ue_sim.h /^ fapi_pdsch_config_t pdschConfig;$/;" m struct:fapi_config
+pdschDataInDmrsSymbols fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschDataInDmrsSymbols;$/;" m struct:fapi_pdsch_parms
+pdschDataPwrOffsetPrfSSS fapi_interface_ue_sim.h /^ uint16_t pdschDataPwrOffsetPrfSSS;$/;" m struct:fapi_dl_tx_pwr_info
+pdschDmrsAdditionalPos fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschDmrsAdditionalPos;$/;" m struct:fapi_pdsch_parms
+pdschDmrsConfigTypes fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschDmrsConfigTypes;$/;" m struct:fapi_pdsch_parms
+pdschDmrsMaxLength fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschDmrsMaxLength;$/;" m struct:fapi_pdsch_parms
+pdschDmrsPwrOffsetPrfSSS fapi_interface_ue_sim.h /^ uint16_t pdschDmrsPwrOffsetPrfSSS;$/;" m struct:fapi_dl_tx_pwr_info
+pdschMacPduBitAlignment fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschMacPduBitAlignment;$/;" m struct:fapi_pdsch_parms
+pdschMappingType fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschMappingType;$/;" m struct:fapi_pdsch_parms
+pdschNonSlotSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschNonSlotSupport;$/;" m struct:fapi_pdsch_parms
+pdschParms fapi_interface_ue_sim.h /^ fapi_pdsch_parms_t_ue_sim pdschParms;$/;" m struct:fapi_params
+pdschPtrs2 fapi_interface_ue_sim.h /^ fapi_dl_pdsch_ptrs2_t pdschPtrs2;$/;" m struct:fapi_dl_rel16_pdsch_parms_t
+pdschPtrsPwrOffsetPrfSSS fapi_interface_ue_sim.h /^ uint16_t pdschPtrsPwrOffsetPrfSSS; $/;" m struct:fapi_dl_ptrs_tx_pwr_info
+pdschPtrsV3 fapi_interface_ue_sim.h /^ fapi_dl_pdsch_ptrsv3_t pdschPtrsV3;$/;" m struct:fapi_dl_rel16_pdsch_parms_t
+pdschTransType fapi_interface_ue_sim.h /^ uint8_t pdschTransType;$/;" m struct:fapi_dl_pdsch_mnt_parms
+pdschTransTypeSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschTransTypeSupport;$/;" m struct:fapi_pdsch_parms
+pdschTransTypeValidity fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschTransTypeValidity;$/;" m struct:fapi_cell_config
+pdschVrbToPrbMapping fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pdschVrbToPrbMapping;$/;" m struct:fapi_pdsch_parms
+pdsch_freq_dom_alloc fapi_interface_ue_sim.h /^ fapi_pdsch_freq_dom_alloc_t pdsch_freq_dom_alloc;$/;" m struct:fapi_dl_pdsch_pdu
+pdsch_pdu fapi_interface_ue_sim.h /^ fapi_dl_pdsch_pdu_t_ue_sim pdsch_pdu;$/;" m union:fapi_dl_tti_req_pdu::__anon3
+pdsch_ptrs_info fapi_interface_ue_sim.h /^ fapi_dl_pdsch_ptrs_info_t pdsch_ptrs_info;$/;" m struct:fapi_dl_pdsch_pdu
+pdsch_time_dom_alloc fapi_interface_ue_sim.h /^ fapi_pdsch_time_dom_alloc_t pdsch_time_dom_alloc; $/;" m struct:fapi_dl_pdsch_pdu
+pduDataOrOffset fapi_interface_ue_sim.h /^ uint64_t pduDataOrOffset; \/\/Shared memory offset \/\/ 5G FAPI Table 3-61 Subset$/;" m struct:fapi_pdu_ind_info
+pduDesc fapi_interface_ue_sim.h /^ fapi_tx_pdu_desc_t_ue_sim pduDesc[];$/;" m struct:fapi_tx_data_req
+pduIndex fapi_interface_ue_sim.h /^ uint16_t pduIndex;$/;" m struct:fapi_tx_pdu_desc
+pduLength fapi_interface_ue_sim.h /^ uint32_t pduLength;$/;" m struct:fapi_tx_pdu_desc
+pduTag fapi_interface_ue_sim.h /^ uint16_t pduTag;$/;" m struct:fapi_pdu_ind_info
+pdu_bit_map fapi_interface_ue_sim.h /^ uint16_t pdu_bit_map; \/* Bit 0: pdschPtrs - Indicates PTRS included (FR2)$/;" m struct:fapi_dl_pdsch_pdu
+pdu_bitmap fapi_interface_ue_sim.h /^ uint16_t pdu_bitmap;$/;" m struct:fapi_ul_pusch_pdu
+pdu_bitmap fapi_interface_ue_sim.h /^ uint8_t pdu_bitmap;$/;" m struct:fapi_uci_o_pucch_f0f1
+pdu_bitmap fapi_interface_ue_sim.h /^ uint8_t pdu_bitmap;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+pdu_bitmap fapi_interface_ue_sim.h /^ uint8_t pdu_bitmap;$/;" m struct:fapi_uci_o_pusch
+pdu_data fapi_interface_ue_sim.h /^ void* pdu_data;$/;" m struct:fapi_pdu_ind_info
+pdu_idx fapi_interface_ue_sim.h /^ uint8_t pdu_idx[];$/;" m struct:fapi_ue_info
+pdu_index fapi_interface_ue_sim.h /^ uint16_t pdu_index;$/;" m struct:fapi_dl_pdsch_pdu
+pdu_length fapi_interface_ue_sim.h /^ uint32_t pdu_length;$/;" m struct:fapi_pdu_ind_info
+pdu_length fapi_interface_ue_sim.h /^ uint16_t pdu_length;$/;" m struct:fapi_pdu_ind_info
+pdu_size fapi_interface_ue_sim.h /^ uint16_t pdu_size;$/;" m struct:fapi_dci_pdu
+pdu_size fapi_interface_ue_sim.h /^ uint16_t pdu_size;$/;" m struct:fapi_dl_tti_req_pdu
+pdu_size fapi_interface_ue_sim.h /^ uint16_t pdu_size;$/;" m struct:fapi_uci_pdu_info
+pdu_size fapi_interface_ue_sim.h /^ uint16_t pdu_size;$/;" m struct:fapi_ul_tti_req_pdu
+pdu_type fapi_interface_ue_sim.h /^ uint16_t pdu_type;$/;" m struct:fapi_dci_pdu
+pdu_type fapi_interface_ue_sim.h /^ uint16_t pdu_type;$/;" m struct:fapi_dl_tti_req_pdu
+pdu_type fapi_interface_ue_sim.h /^ uint16_t pdu_type;$/;" m struct:fapi_uci_pdu_info
+pdu_type fapi_interface_ue_sim.h /^ uint16_t pdu_type;$/;" m struct:fapi_ul_tti_req_pdu
+pdus fapi_interface_ue_sim.h /^ fapi_dci_pdu_t_ue_sim pdus[];$/;" m struct:fapi_ul_dci_req
+pdus fapi_interface_ue_sim.h /^ fapi_dl_tti_req_pdu_t_ue_sim pdus[0];$/;" m struct:fapi_dl_tti_req
+pdus fapi_interface_ue_sim.h /^ fapi_pdu_ind_info_t_ue_sim pdus[MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI];$/;" m struct:fapi_rx_data_indication
+pdus fapi_interface_ue_sim.h /^ fapi_ul_tti_req_pdu_t_ue_sim pdus[0];$/;" m struct:fapi_ul_tti_req
+phyCellId fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim phyCellId; \/\/in legacy data type mentioned was uint8_t, though in spec it was uint16_t$/;" m struct:fapi_cell_config
+phyConfig fapi_interface_ue_sim.h /^ fapi_phy_config_t phyConfig;$/;" m struct:fapi_config
+phyFapiNegotiatedProtocolVersion fapi_interface_ue_sim.h /^ uint8_t phyFapiNegotiatedProtocolVersion;$/;" m struct:fapi_phy_parms
+phyFapiProtocolVersion fapi_interface_ue_sim.h /^ uint8_t phyFapiProtocolVersion;$/;" m struct:fapi_phy_parms
+phyProfileId fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim phyProfileId;$/;" m struct:fapi_phy_config
+phyProfiles fapi_interface_ue_sim.h /^ fapi_phy_profile_t phyProfiles[0];$/;" m struct:fapi_phy_parms
+phyState fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim phyState;$/;" m struct:fapi_cell_params
+phySupport fapi_interface_ue_sim.h /^ fapi_phy_support_t phySupport;$/;" m struct:fapi_params
+phySupport fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim phySupport;$/;" m struct:fapi_phy_parms
+phy_mib_pdu fapi_interface_ue_sim.h /^ fapi_phy_mib_pdu_t_ue_sim phy_mib_pdu;$/;" m union:fapi_bch_payload::__anon2
+phy_port fapi_interface_ue_sim.h /^ fapi_phy_port_t phy_port[0];$/;" m struct:fapi_phy_profile
+phys_cell_id fapi_interface_ue_sim.h /^ uint16_t phys_cell_id;$/;" m struct:fapi_dl_ssb_pdu
+phys_cell_id fapi_interface_ue_sim.h /^ uint16_t phys_cell_id;$/;" m struct:fapi_ul_prach_pdu
+pi2_bpsk fapi_interface_ue_sim.h /^ uint8_t pi2_bpsk;$/;" m struct:fapi_ul_pucch_pdu
+pkd_fapi_l1api_msg_frmt fapi_interface_ue_sim.h /^typedef struct PACK_STRUCT pkd_fapi_l1api_msg_frmt$/;" s
+pkd_fapi_l1api_msg_frmt_t fapi_interface_ue_sim.h /^} pkd_fapi_l1api_msg_frmt_t;$/;" t typeref:struct:pkd_fapi_l1api_msg_frmt
+pmIdx fapi_interface_ue_sim.h /^ uint16_t pmIdx;$/;" m struct:PACK_STRUCT
+pm_idx fapi_interface_ue_sim.h /^ uint16_t pm_idx;$/;" m struct:fapi_pmi_bfi
+pmi_bfi fapi_interface_ue_sim.h /^ fapi_pmi_bfi_t_ue_sim pmi_bfi[1];$/;" m struct:fapi_precoding_bmform
+powerControlOffsetSSProfileNR fapi_interface_ue_sim.h /^ int8_t powerControlOffsetSSProfileNR;$/;" m struct:fapi_tx_power_info
+powerOffsetMax fapi_interface_ue_sim.h /^ int16_t powerOffsetMax;$/;" m struct:fapi_signal_index
+powerOffsetMin fapi_interface_ue_sim.h /^ int16_t powerOffsetMin;$/;" m struct:fapi_signal_index
+powerOffsetRsIndex fapi_interface_ue_sim.h /^ uint8_t powerOffsetRsIndex;$/;" m struct:fapi_carrier_config
+powerProfile fapi_interface_ue_sim.h /^ uint8_t powerProfile;$/;" m struct:fapi_carrier_config
+powerProfilesSupported fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim powerProfilesSupported;$/;" m struct:fapi_cell_params
+power_control_offset fapi_interface_ue_sim.h /^ uint8_t power_control_offset; \/*SCF : TX Power Info Start *\/$/;" m struct:fapi_tx_pwr_info
+power_control_offset_ss fapi_interface_ue_sim.h /^ uint8_t power_control_offset_ss; \/*SCF : Tx Power Info End *\/$/;" m struct:fapi_tx_pwr_info
+power_control_ofsset_ss fapi_interface_ue_sim.h /^ uint8_t power_control_ofsset_ss;$/;" m struct:fapi_tx_power_info
+prachConfig fapi_interface_ue_sim.h /^ fapi_prach_configuration_t_ue_sim prachConfig;$/;" m struct:fapi_config
+prachConfig fapi_interface_ue_sim.h /^ fapi_prach_configuration_t_ue_sim prachConfig;$/;" m struct:fapi_config
+prachConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim prachConfig;$/;" m struct:fapi_prach_configuration
+prachConfigIndex fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachConfigIndex;$/;" m struct:fapi_prach_configuration
+prachConfigIndex fapi_interface_ue_sim.h /^ uint8_t prachConfigIndex;$/;" m struct:fapi_prach_configuration
+prachConfigScope fapi_interface_ue_sim.h /^ uint8_t prachConfigScope;$/;" m struct:fapi_pRACH_Mntnc_param
+prachFdOccasion fapi_interface_ue_sim.h /^ fapi_prachFdOccasion_t_ue_sim prachFdOccasion[MAX_NUM_PRACH_FD_OCCASIONS];$/;" m struct:fapi_prach_configuration
+prachLongFormats fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachLongFormats;$/;" m struct:fapi_prach_parms
+prachMultipleCarriersInABand fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachMultipleCarriersInABand;$/;" m struct:fapi_prach_configuration
+prachMultipleCarriersInABand fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachMultipleCarriersInABand;$/;" m struct:fapi_prach_parms
+prachParms fapi_interface_ue_sim.h /^ fapi_prach_parms_t_ue_sim prachParms;$/;" m struct:fapi_params
+prachResConfigIndex fapi_interface_ue_sim.h /^ uint16_t prachResConfigIndex;$/;" m struct:fapi_prach_configuration
+prachResConfigIndex fapi_interface_ue_sim.h /^ uint16_t prachResConfigIndex;$/;" m struct:fapi_pRACH_Mntnc_param
+prachRestrictedSets fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachRestrictedSets;$/;" m struct:fapi_prach_parms
+prachRootSequenceIndex fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim prachRootSequenceIndex;$/;" m struct:fapi_prachFdOccasion
+prachRootSequenceIndex fapi_interface_ue_sim.h /^ uint16_t prachRootSequenceIndex;$/;" m struct:fapi_prachFdOccasion
+prachSequenceLength fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachSequenceLength;$/;" m struct:fapi_prach_configuration
+prachSequenceLength fapi_interface_ue_sim.h /^ uint8_t prachSequenceLength;$/;" m struct:fapi_prach_configuration
+prachShortFormats fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachShortFormats;$/;" m struct:fapi_prach_parms
+prachSubCSpacing fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachSubCSpacing;$/;" m struct:fapi_prach_configuration
+prachSubCSpacing fapi_interface_ue_sim.h /^ uint8_t prachSubCSpacing;$/;" m struct:fapi_prach_configuration
+prachZeroCorrConf fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim prachZeroCorrConf;$/;" m struct:fapi_prachFdOccasion
+prachZeroCorrConf fapi_interface_ue_sim.h /^ uint8_t prachZeroCorrConf;$/;" m struct:fapi_prachFdOccasion
+prach_format fapi_interface_ue_sim.h /^ uint8_t prach_format;$/;" m struct:fapi_ul_prach_pdu
+prach_pdu fapi_interface_ue_sim.h /^ fapi_ul_prach_pdu_t_ue_sim prach_pdu;$/;" m union:fapi_ul_tti_req_pdu::__anon4
+prach_start_symbol fapi_interface_ue_sim.h /^ uint8_t prach_start_symbol;$/;" m struct:fapi_ul_prach_pdu
+prbSymRateMatchPattern fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim prbSymRateMatchPattern;$/;" m struct:fapi_prb_symbol_rate_match_pattern
+prbSymRmPatrnBitmapByRef fapi_interface_ue_sim.h /^ uint8_t prbSymRmPatrnBitmapByRef[0]; \/\/ side depends on ceil(prbSymRmPatrnBitmapSizeByRef \/ 8) $/;" m struct:fapi_dl_rate_match_ref
+prbSymRmPatrnBitmapSizeByRef fapi_interface_ue_sim.h /^ uint8_t prbSymRmPatrnBitmapSizeByRef;$/;" m struct:fapi_dl_rate_match_ref
+prbSymRmPatrnByValue fapi_interface_ue_sim.h /^ fapi_dl_prb_sym_rm_patrn_by_val_t prbSymRmPatrnByValue[0];$/;" m struct:fapi_dl_rate_match_ref
+prbSymRmPtrn fapi_interface_ue_sim.h /^ fapi_prb_symbol_rate_match_pattern_t prbSymRmPtrn;$/;" m struct:fapi_config
+prbSymbRateMatchPatternID fapi_interface_ue_sim.h /^ uint8_t prbSymbRateMatchPatternID;$/;" m struct:fapi_prb_sym_rate_match_pattern
+prbSymbRateMatchPatterns fapi_interface_ue_sim.h /^ fapi_prb_sym_rate_match_pattern_t prbSymbRateMatchPatterns[];$/;" m struct:fapi_prb_symbol_rate_match_pattern
+prb_size fapi_interface_ue_sim.h /^ uint16_t prb_size;$/;" m struct:fapi_ul_pucch_pdu
+prb_start fapi_interface_ue_sim.h /^ uint16_t prb_start;$/;" m struct:fapi_ul_pucch_pdu
+preCoderWeightIm fapi_interface_ue_sim.h /^ int16_t preCoderWeightIm;$/;" m struct:fapi_precoderWeight
+preCoderWeightRe fapi_interface_ue_sim.h /^ int16_t preCoderWeightRe;$/;" m struct:fapi_precoderWeight
+pre_coding_and_beamforming fapi_interface_ue_sim.h /^ fapi_precoding_bmform_t_ue_sim pre_coding_and_beamforming;$/;" m struct:fapi_dl_pdsch_pdu
+pre_coding_and_beamforming fapi_interface_ue_sim.h /^ fapi_precoding_bmform_t_ue_sim pre_coding_and_beamforming;$/;" m struct:fapi_dl_ssb_pdu
+pre_coding_and_beamforming fapi_interface_ue_sim.h /^ fapi_precoding_bmform_t_ue_sim pre_coding_and_beamforming;$/;" m struct:fapi_dl_csi_rs_pdu
+pre_dft_occ_idx fapi_interface_ue_sim.h /^ uint8_t pre_dft_occ_idx;$/;" m struct:fapi_ul_pucch_pdu
+pre_dft_occ_len fapi_interface_ue_sim.h /^ uint8_t pre_dft_occ_len;$/;" m struct:fapi_ul_pucch_pdu
+preambleIndex fapi_interface_ue_sim.h /^ uint8_t preambleIndex;$/;" m struct:fapi_preamble_info
+preambleInfo fapi_interface_ue_sim.h /^ fapi_preamble_info_t_ue_sim preambleInfo[MAX_NUM_PREAMBLES_PER_SLOT];$/;" m struct:fapi_rach_pdu
+preambleSnr fapi_interface_ue_sim.h /^ uint8_t preambleSnr;$/;" m struct:fapi_preamble_info
+precoderGranularityCoreset fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim precoderGranularityCoreset;$/;" m struct:fapi_pdcch_parms
+precoderWeight fapi_interface_ue_sim.h /^ fapi_precoder_weight_t_ue_sim precoderWeight[MAX_NUM_LAYERS];$/;" m struct:PACK_STRUCT
+precoder_granularity fapi_interface_ue_sim.h /^ uint8_t precoder_granularity; \/* Coreset Configuration End *\/$/;" m struct:fapi_coreset
+precoder_weight fapi_interface_ue_sim.h /^ fapi_precoderWeight_t_ue_sim precoder_weight[MAX_NUM_ANT_PORTS];$/;" m struct:fapi_precoder_weight
+precodingTable fapi_interface_ue_sim.h /^ fapi_precoding_table_t_ue_sim precodingTable;$/;" m struct:fapi_config
+precodingTable fapi_interface_ue_sim.h /^ fapi_precoding_table_t_ue_sim precodingTable;$/;" m struct:fapi_config
+premblePwr fapi_interface_ue_sim.h /^ uint32_t premblePwr;$/;" m struct:fapi_preamble_info
+premptionSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim premptionSupport;$/;" m struct:fapi_pdsch_parms
+prg_size fapi_interface_ue_sim.h /^ uint16_t prg_size;$/;" m struct:fapi_bmform
+prg_size fapi_interface_ue_sim.h /^ uint16_t prg_size;$/;" m struct:fapi_precoding_bmform
+priority fapi_interface_ue_sim.h /^ uint16_t priority;$/;" m struct:fapi_part2_parms
+priority fapi_interface_ue_sim.h /^ uint16_t priority;$/;" m struct:fapi_uci_part2
+profileValidityMap fapi_interface_ue_sim.h /^ uint8_t profileValidityMap;$/;" m struct:fapi_dfe_profile
+protocolVersion fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim protocolVersion;$/;" m struct:fapi_phy_parms
+protocolVersion fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim protocolVersion;$/;" m struct:fapi_param_req
+ptrsFreqDensity fapi_interface_ue_sim.h /^ uint8_t ptrsFreqDensity; $/;" m struct:fapi_dl_pdsch_ptrs2
+ptrsPortIndex fapi_interface_ue_sim.h /^ uint8_t ptrsPortIndex;$/;" m struct:fapi_dl_pdsch_ptrs2
+ptrsReOffset fapi_interface_ue_sim.h /^ uint8_t ptrsReOffset; $/;" m struct:fapi_dl_pdsch_ptrs2
+ptrsTimeDensity fapi_interface_ue_sim.h /^ uint8_t ptrsTimeDensity;$/;" m struct:fapi_dl_pdsch_ptrs2
+ptrs_dmrs_port fapi_interface_ue_sim.h /^ uint8_t ptrs_dmrs_port;$/;" m struct:fapi_ptrs_info
+ptrs_freq_density fapi_interface_ue_sim.h /^ uint8_t ptrs_freq_density;$/;" m struct:fapi_dl_pdsch_ptrs_info
+ptrs_freq_density fapi_interface_ue_sim.h /^ uint8_t ptrs_freq_density;$/;" m struct:fapi_pusch_ptrs
+ptrs_info fapi_interface_ue_sim.h /^ fapi_ptrs_info_t_ue_sim ptrs_info[MAX_NUM_PTRS_PORTS];$/;" m struct:fapi_pusch_ptrs
+ptrs_port_index fapi_interface_ue_sim.h /^ uint16_t ptrs_port_index;$/;" m struct:fapi_ptrs_info
+ptrs_port_index fapi_interface_ue_sim.h /^ uint8_t ptrs_port_index;$/;" m struct:fapi_dl_pdsch_ptrs_info
+ptrs_re_offset fapi_interface_ue_sim.h /^ uint8_t ptrs_re_offset;$/;" m struct:fapi_dl_pdsch_ptrs_info
+ptrs_re_offset fapi_interface_ue_sim.h /^ uint8_t ptrs_re_offset;$/;" m struct:fapi_ptrs_info
+ptrs_time_density fapi_interface_ue_sim.h /^ uint8_t ptrs_time_density;$/;" m struct:fapi_dl_pdsch_ptrs_info
+ptrs_time_density fapi_interface_ue_sim.h /^ uint8_t ptrs_time_density;$/;" m struct:fapi_pusch_ptrs
+pucchAggregation fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pucchAggregation;$/;" m struct:fapi_pucch_parms
+pucchFormats fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pucchFormats;$/;" m struct:fapi_pucch_parms
+pucchGroupAndSequenceHopping fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim pucchGroupAndSequenceHopping;$/;" m struct:fapi_pucch_parms
+pucchGroupHopping fapi_interface_ue_sim.h /^ uint8_t pucchGroupHopping;$/;" m struct:fapi_ul_bwp_id
+pucchGroupHopping fapi_interface_ue_sim.h /^ uint8_t pucchGroupHopping;$/;" m struct:fapi_ul_pucch_pdu
+pucchParms fapi_interface_ue_sim.h /^ fapi_pucch_parms_t_ue_sim pucchParms;$/;" m struct:fapi_params
+pucchSemiStaticConfig fapi_interface_ue_sim.h /^ fapi_pucch_semi_static_config_t pucchSemiStaticConfig;$/;" m struct:fapi_config
+pucch_basicextension fapi_interface_ue_sim.h /^ fapi_pucch_mntnnc_params_t pucch_basicextension;$/;" m struct:fapi_ul_pucch_pdu
+pucch_format fapi_interface_ue_sim.h /^ uint8_t pucch_format;$/;" m struct:fapi_uci_o_pucch_f0f1
+pucch_format fapi_interface_ue_sim.h /^ uint8_t pucch_format;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+pucch_pdu fapi_interface_ue_sim.h /^ fapi_ul_pucch_pdu_t_ue_sim pucch_pdu;$/;" m union:fapi_ul_tti_req_pdu::__anon4
+puschAggregationFactor fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschAggregationFactor;$/;" m struct:fapi_pusch_parms
+puschAllocationTypes fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschAllocationTypes;$/;" m struct:fapi_pusch_parms
+puschCbg fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschCbg;$/;" m struct:fapi_pusch_parms
+puschDmrsAditionalPos fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschDmrsAditionalPos;$/;" m struct:fapi_pusch_parms
+puschDmrsConfigTypes fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschDmrsConfigTypes;$/;" m struct:fapi_pusch_parms
+puschDmrsMaxLen fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschDmrsMaxLen;$/;" m struct:fapi_pusch_parms
+puschFrequencyHopping fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschFrequencyHopping;$/;" m struct:fapi_pusch_parms
+puschLbrmSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschLbrmSupport;$/;" m struct:fapi_pusch_parms
+puschMacPduBitAlignment fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschMacPduBitAlignment;$/;" m struct:fapi_pusch_parms
+puschMappingType fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschMappingType;$/;" m struct:fapi_pusch_parms
+puschMaxPtrsPorts fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschMaxPtrsPorts;$/;" m struct:fapi_pusch_parms
+puschMntParms fapi_interface_ue_sim.h /^ fapi_pusch_mnt_parms_t puschMntParms;$/;" m struct:fapi_ul_pusch_pdu
+puschParms fapi_interface_ue_sim.h /^ fapi_pusch_parms_t_ue_sim puschParms;$/;" m struct:fapi_params
+puschSecondHopPRB fapi_interface_ue_sim.h /^ uint16_t puschSecondHopPRB;$/;" m struct:fapi_pusch_mnt_parms
+puschTransType fapi_interface_ue_sim.h /^ uint8_t puschTransType;$/;" m struct:fapi_pusch_mnt_parms
+puschTransTypeSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschTransTypeSupport;$/;" m struct:fapi_pusch_parms
+puschTransTypeValidity fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschTransTypeValidity;$/;" m struct:fapi_cell_config
+puschVrbToPrbMapping fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim puschVrbToPrbMapping;$/;" m struct:fapi_pusch_parms
+pusch_data fapi_interface_ue_sim.h /^ fapi_pusch_data_t_ue_sim pusch_data;$/;" m struct:fapi_ul_pusch_pdu
+pusch_identity fapi_interface_ue_sim.h /^ uint16_t pusch_identity;$/;" m struct:fapi_ul_pusch_pdu
+pusch_pdu fapi_interface_ue_sim.h /^ fapi_ul_pusch_pdu_t_ue_sim pusch_pdu;$/;" m union:fapi_ul_tti_req_pdu::__anon4
+pusch_ptrs fapi_interface_ue_sim.h /^ fapi_pusch_ptrs_t_ue_sim pusch_ptrs;$/;" m struct:fapi_ul_pusch_pdu
+pusch_uci fapi_interface_ue_sim.h /^ fapi_pusch_uci_t_ue_sim pusch_uci;$/;" m struct:fapi_ul_pusch_pdu
+qam_mod_order fapi_interface_ue_sim.h /^ uint8_t qam_mod_order;$/;" m struct:fapi_codeword_pdu
+qam_mod_order fapi_interface_ue_sim.h /^ uint8_t qam_mod_order;$/;" m struct:fapi_ul_pusch_pdu
+raIndex fapi_interface_ue_sim.h /^ uint8_t raIndex;$/;" m struct:fapi_rach_pdu
+rachPdu fapi_interface_ue_sim.h /^ fapi_rach_pdu_t_ue_sim rachPdu[MAX_NUMBER_RACH_PDUS_PER_SLOT];$/;" m struct:fapi_rach_indication
+rach_present fapi_interface_ue_sim.h /^ uint8_t rach_present;$/;" m struct:fapi_ul_tti_req
+radioframeAllocationOffset fapi_interface_ue_sim.h /^ uint8_t radioframeAllocationOffset;$/;" m struct:fapi_mbsfn_sf_config_list
+radioframeAllocationPeriod fapi_interface_ue_sim.h /^ uint8_t radioframeAllocationPeriod;$/;" m struct:fapi_mbsfn_sf_config_list
+rateMatchRef fapi_interface_ue_sim.h /^ fapi_dl_rate_match_ref_t rateMatchRef;$/;" m struct:fapi_dl_pdsch_mnt_parms
+rbSNR fapi_interface_ue_sim.h /^ uint8_t rbSNR[MAX_NUMBER_RBS];$/;" m struct:fapi_symb_snr
+rb_bitmap fapi_interface_ue_sim.h /^ uint8_t rb_bitmap[36];$/;" m struct:fapi_pdsch_freq_dom_alloc
+rb_bitmap fapi_interface_ue_sim.h /^ uint8_t rb_bitmap[36];$/;" m struct:fapi_ul_pusch_pdu
+rb_size fapi_interface_ue_sim.h /^ uint16_t rb_size; $/;" m struct:fapi_pdsch_freq_dom_alloc
+rb_size fapi_interface_ue_sim.h /^ uint16_t rb_size;$/;" m struct:fapi_ul_pusch_pdu
+rb_start fapi_interface_ue_sim.h /^ uint16_t rb_start;$/;" m struct:fapi_pdsch_freq_dom_alloc
+rb_start fapi_interface_ue_sim.h /^ uint16_t rb_start;$/;" m struct:fapi_ul_pusch_pdu
+recvMsgFromUeSim fapi_cl_comm.c /^void recvMsgFromUeSim()$/;" f
+ref_point fapi_interface_ue_sim.h /^ uint8_t ref_point;$/;" m struct:fapi_dl_pdsch_pdu
+referenceRS fapi_interface_ue_sim.h /^ uint8_t referenceRS;$/;" m struct:fapi_signal_index
+reg_bundle_size fapi_interface_ue_sim.h /^ uint8_t reg_bundle_size;$/;" m struct:fapi_coreset
+rel16MtrpConfig fapi_interface_ue_sim.h /^ fapi_rel16_mtrp_config_t rel16MtrpConfig;$/;" m struct:fapi_config
+rel16PdschParms fapi_interface_ue_sim.h /^ fapi_dl_rel16_pdsch_parms_t rel16PdschParms;$/;" m struct:fapi_dl_pdsch_pdu
+rel16mTRPParameters fapi_interface_ue_sim.h /^ fapi_rel16_mTRP_parameters_t rel16mTRPParameters;$/;" m struct:fapi_params
+releaseCapability fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim releaseCapability;$/;" m struct:fapi_cell_params
+repetitionScheme fapi_interface_ue_sim.h /^ uint8_t repetitionScheme;$/;" m struct:fapi_dl_rel16_pdsch_parms_t
+requestInstancePerSlot fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim requestInstancePerSlot[4];$/;" m struct:fapi_phy_config
+resource_alloc fapi_interface_ue_sim.h /^ uint8_t resource_alloc; \/*SCF: PDSCH Allocation in Frequency Domain Start *\/$/;" m struct:fapi_pdsch_freq_dom_alloc
+resource_alloc fapi_interface_ue_sim.h /^ uint8_t resource_alloc;$/;" m struct:fapi_ul_pusch_pdu
+resource_type fapi_interface_ue_sim.h /^ uint8_t resource_type;$/;" m struct:fapi_ul_srs_pdu
+restrictedSetConfig fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim restrictedSetConfig;$/;" m struct:fapi_prach_configuration
+restrictedSetConfig fapi_interface_ue_sim.h /^ uint8_t restrictedSetConfig;$/;" m struct:fapi_prach_configuration
+rmsiPresence fapi_interface_ue_sim.h /^ uint8_t rmsiPresence;$/;" m struct:fapi_ssb_res_config_table
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_dl_pdsch_pdu
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_crc_ind_info
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_dl_dci
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_pdu_ind_info
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_srs_pdu
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_uci_o_pucch_f0f1
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_uci_o_pusch
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_ul_pucch_pdu
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_ul_pusch_pdu
+rnti fapi_interface_ue_sim.h /^ uint16_t rnti;$/;" m struct:fapi_ul_srs_pdu
+row fapi_interface_ue_sim.h /^ uint8_t row;$/;" m struct:fapi_dl_csi_rs_pdu
+rssi fapi_interface_ue_sim.h /^ uint16_t rssi;$/;" m struct:fapi_crc_ind_info
+rssi fapi_interface_ue_sim.h /^ uint16_t rssi;$/;" m struct:fapi_pdu_ind_info
+rssi fapi_interface_ue_sim.h /^ uint16_t rssi;$/;" m struct:fapi_uci_o_pucch_f0f1
+rssi fapi_interface_ue_sim.h /^ uint16_t rssi;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+rssi fapi_interface_ue_sim.h /^ uint16_t rssi;$/;" m struct:fapi_uci_o_pusch
+rssiMeasurement fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim rssiMeasurement;$/;" m struct:fapi_meas_config
+rssiMeasurementSupport fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim rssiMeasurementSupport;$/;" m struct:fapi_meas_parms
+rsv fapi_interface_ue_sim.h /^ uint16_t rsv; \/\/ To be 32-bit aligned, if FAPI_NUMEROLOGIES changes to some other value than 5 please ensure 32 bit alignment$/;" m struct:__anon1
+rsv fapi_interface_ue_sim.h /^ uint8_t rsv[3];$/;" m struct:fapi_uint8_tlv
+rsv fapi_interface_ue_sim.h /^ uint8_t rsv[2];$/;" m struct:fapi_int16_tlv
+rsv fapi_interface_ue_sim.h /^ uint8_t rsv[2];$/;" m struct:fapi_uint16_tlv
+rv_index fapi_interface_ue_sim.h /^ uint8_t rv_index;$/;" m struct:fapi_codeword_pdu
+rv_index fapi_interface_ue_sim.h /^ uint8_t rv_index;$/;" m struct:fapi_pusch_data
+scid fapi_interface_ue_sim.h /^ uint8_t scid;$/;" m struct:fapi_dmrs
+scid fapi_interface_ue_sim.h /^ uint8_t scid;$/;" m struct:fapi_ul_pusch_pdu
+scram_id fapi_interface_ue_sim.h /^ uint16_t scram_id;$/;" m struct:fapi_dl_csi_rs_pdu
+scrambling_id fapi_interface_ue_sim.h /^ uint16_t scrambling_id;$/;" m struct:fapi_dl_dci
+scrambling_rnti fapi_interface_ue_sim.h /^ uint16_t scrambling_rnti;$/;" m struct:fapi_dl_dci
+scsCommon fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim scsCommon;$/;" m struct:fapi_ssb_config
+second_hop_prb fapi_interface_ue_sim.h /^ uint16_t second_hop_prb;$/;" m struct:fapi_ul_pucch_pdu
+sendMsgToUeSim fapi_cl_comm.c /^void sendMsgToUeSim(uint8_t event, Data *msg, uint16_t msgLen)$/;" f
+sequence_hop_flag fapi_interface_ue_sim.h /^ uint8_t sequence_hop_flag;$/;" m struct:fapi_ul_pucch_pdu
+sequence_id fapi_interface_ue_sim.h /^ uint16_t sequence_id;$/;" m struct:fapi_ul_srs_pdu
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_crc_ind
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_dl_tti_req
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_error_ind
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_rach_indication
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_rx_data_indication
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_slot_ind
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_srs_indication
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_tx_data_req
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_uci_indication
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_ul_dci_req
+sfn fapi_interface_ue_sim.h /^ uint16_t sfn;$/;" m struct:fapi_ul_tti_req
+shift_index fapi_interface_ue_sim.h /^ uint16_t shift_index;$/;" m struct:fapi_coreset
+signalIndex fapi_interface_ue_sim.h /^ fapi_signal_index_t signalIndex[MAX_SIGNAL_INDEX];$/;" m struct:fapi_cell_params
+sizeMbsfnSubframeConfigList fapi_interface_ue_sim.h /^ uint8_t sizeMbsfnSubframeConfigList;$/;" m struct:fapi_lte_crs_rm_ptrn
+sizePart1Params fapi_interface_ue_sim.h /^ uint8_t sizePart1Params[0]; \/* Shall Not exced 12 *\/$/;" m struct:fapi_map_index
+skipBlankDlConfig fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim skipBlankDlConfig;$/;" m struct:fapi_cell_params
+skipBlankUlConfig fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim skipBlankUlConfig;$/;" m struct:fapi_cell_params
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_crc_ind
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_dl_tti_req
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_error_ind
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_rach_indication
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_rx_data_indication
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_slot_ind
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_srs_indication
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_tx_data_req
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_uci_indication
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_ul_dci_req
+slot fapi_interface_ue_sim.h /^ uint16_t slot;$/;" m struct:fapi_ul_tti_req
+slotConfig fapi_interface_ue_sim.h /^ fapi_slotconfig_t_ue_sim slotConfig[MAX_TDD_PERIODICITY];$/;" m struct:fapi_tdd_table
+slotConfig fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim slotConfig[MAX_NUM_OF_SYMBOLS_PER_SLOT];$/;" m struct:fapi_slotconfig
+slotConfig fapi_interface_ue_sim.h /^ uint8_t slotConfig[MAX_NUM_OF_SYMBOLS_PER_SLOT];$/;" m struct:fapi_slotconfig
+slotIndex fapi_interface_ue_sim.h /^ uint8_t slotIndex;$/;" m struct:fapi_rach_pdu
+sockfd fapi_cl.h /^ uint32_t sockfd;$/;" m struct:clCb
+srInfo fapi_interface_ue_sim.h /^ fapi_sr_f0f1_info_t_ue_sim srInfo; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pucch_f0f1
+srInfo fapi_interface_ue_sim.h /^ fapi_sr_f2f3f4_info_t_ue_sim srInfo; \/\/ This is included if indicated by the pduBitmap$/;" m struct:fapi_uci_o_pucch_f2f3f4
+sr_bitlen fapi_interface_ue_sim.h /^ uint16_t sr_bitlen;$/;" m struct:fapi_sr_f2f3f4_info
+sr_confidence_level fapi_interface_ue_sim.h /^ uint8_t sr_confidence_level;$/;" m struct:fapi_sr_f0f1_info
+sr_flag fapi_interface_ue_sim.h /^ uint8_t sr_flag;$/;" m struct:fapi_ul_pucch_pdu
+sr_indication fapi_interface_ue_sim.h /^ uint8_t sr_indication;$/;" m struct:fapi_sr_f0f1_info
+sr_payload fapi_interface_ue_sim.h /^ uint8_t sr_payload[MAX_SR_PAYLOAD_SIZE];$/;" m struct:fapi_sr_f2f3f4_info
+srcAddr fapi_cl.h /^ struct sockaddr_in srcAddr;$/;" m struct:clCb typeref:struct:clCb::sockaddr_in
+srsPdus fapi_interface_ue_sim.h /^ fapi_srs_pdu_t_ue_sim srsPdus[MAX_NUMBER_SRS_PDUS_PER_SLOT];$/;" m struct:fapi_srs_indication
+srs_pdu fapi_interface_ue_sim.h /^ fapi_ul_srs_pdu_t_ue_sim srs_pdu;$/;" m union:fapi_ul_tti_req_pdu::__anon4
+ssPbchBlockPowerScaling fapi_interface_ue_sim.h /^ fapi_int16_tlv_t_ue_sim ssPbchBlockPowerScaling;$/;" m struct:fapi_ssb_pwr_pbch_config
+ssPbchBlockPowerScaling fapi_interface_ue_sim.h /^ uint16_t ssPbchBlockPowerScaling;$/;" m struct:fapi_ssb_tx_pwr_info
+ssPbchMultipleCarriersInABand fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim ssPbchMultipleCarriersInABand;$/;" m struct:fapi_carrier_parms
+ssPbchMultipleCarriersInABand fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim ssPbchMultipleCarriersInABand;$/;" m struct:fapi_ssb_table
+ssPbchPower fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim ssPbchPower;$/;" m struct:fapi_ssb_config
+ssPbchPower fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim ssPbchPower;$/;" m struct:fapi_ssb_pwr_pbch_config
+ssbConfig fapi_interface_ue_sim.h /^ fapi_ssb_config_t_ue_sim ssbConfig;$/;" m struct:fapi_config
+ssbConfigForRateMatching fapi_interface_ue_sim.h /^ uint8_t ssbConfigForRateMatching;$/;" m struct:fapi_dl_rate_match_ref
+ssbConfigIndex fapi_interface_ue_sim.h /^ uint16_t ssbConfigIndex;$/;" m struct:fapi_ssb_res_config_table
+ssbConfigurationsTLVs fapi_interface_ue_sim.h /^ fapi_ssb_res_config_table_t ssbConfigurationsTLVs[];$/;" m struct:fapi_multi_ssb_resource_config_table
+ssbMask fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim ssbMask[2];$/;" m struct:fapi_ssb_table
+ssbMask fapi_interface_ue_sim.h /^ uint32_t ssbMask[2];$/;" m struct:fapi_ssb_res_config_table
+ssbOffsetPointA fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim ssbOffsetPointA;$/;" m struct:fapi_ssb_table
+ssbOffsetPointA fapi_interface_ue_sim.h /^ uint16_t ssbOffsetPointA;$/;" m struct:fapi_ssb_res_config_table
+ssbPbchMntParms fapi_interface_ue_sim.h /^ fapi_dl_ssb_pbch_mnt_parms_t ssbPbchMntParms;$/;" m struct:fapi_dl_ssb_pdu
+ssbPduIndex fapi_interface_ue_sim.h /^ uint8_t ssbPduIndex;$/;" m struct:fapi_ssb_basic_parms
+ssbPdusForRateMatching fapi_interface_ue_sim.h /^ uint8_t ssbPdusForRateMatching[2];$/;" m struct:fapi_dl_rate_match_ref
+ssbPerRach fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim ssbPerRach;$/;" m struct:fapi_prach_configuration
+ssbPerRach fapi_interface_ue_sim.h /^ uint8_t ssbPerRach;$/;" m struct:fapi_prach_configuration
+ssbPeriod fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim ssbPeriod;$/;" m struct:fapi_ssb_table
+ssbPeriod fapi_interface_ue_sim.h /^ uint8_t ssbPeriod;$/;" m struct:fapi_ssb_res_config_table
+ssbPowerPbchConfig fapi_interface_ue_sim.h /^ fapi_ssb_pwr_pbch_config_t ssbPowerPbchConfig;$/;" m struct:fapi_config
+ssbRateMatch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim ssbRateMatch;$/;" m struct:fapi_pdsch_parms
+ssbResConfigTable fapi_interface_ue_sim.h /^ fapi_ssb_res_config_table_t ssbResConfigTable;$/;" m struct:fapi_config
+ssbSubCarrierOffset fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim ssbSubCarrierOffset;$/;" m struct:fapi_ssb_table
+ssbSubcarrierOffset fapi_interface_ue_sim.h /^ uint8_t ssbSubcarrierOffset;$/;" m struct:fapi_ssb_res_config_table
+ssbTable fapi_interface_ue_sim.h /^ fapi_ssb_table_t_ue_sim ssbTable;$/;" m struct:fapi_config
+ssbTableConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim ssbTableConfig;$/;" m struct:fapi_ssb_res_config_table
+ssb_block_index fapi_interface_ue_sim.h /^ uint8_t ssb_block_index;$/;" m struct:fapi_dl_ssb_pdu
+ssb_offset_point_a fapi_interface_ue_sim.h /^ uint16_t ssb_offset_point_a;$/;" m struct:fapi_dl_ssb_pdu
+ssb_pdu fapi_interface_ue_sim.h /^ fapi_dl_ssb_pdu_t_ue_sim ssb_pdu;$/;" m union:fapi_dl_tti_req_pdu::__anon3
+ssb_sub_carrier_offset fapi_interface_ue_sim.h /^ uint8_t ssb_sub_carrier_offset;$/;" m struct:fapi_dl_ssb_pdu
+startPreambleIndex fapi_interface_ue_sim.h /^ uint8_t startPreambleIndex;$/;" m struct:fapi_pRACH_Mntnc_param
+startReceiver fapi_cl_comm.c /^void startReceiver()$/;" f
+start_rb fapi_interface_ue_sim.h /^ uint16_t start_rb;$/;" m struct:fapi_dl_csi_rs_pdu
+start_symb_index fapi_interface_ue_sim.h /^ uint8_t start_symb_index;$/;" m struct:fapi_ul_pusch_pdu
+start_symb_index fapi_interface_ue_sim.h /^ uint8_t start_symb_index;\/*SCF : PDSCH Allocation in Time Domain Start *\/$/;" m struct:fapi_pdsch_time_dom_alloc
+start_symbol_index fapi_interface_ue_sim.h /^ uint8_t start_symbol_index; \/* Coreset Configuration Start *\/$/;" m struct:fapi_coreset
+start_symbol_index fapi_interface_ue_sim.h /^ uint8_t start_symbol_index;$/;" m struct:fapi_ul_pucch_pdu
+subCarrierSpacing fapi_interface_ue_sim.h /^ uint8_t subCarrierSpacing;$/;" m struct:fapi_dl_csi_rs_pdu
+subCarrierSpacing fapi_interface_ue_sim.h /^ uint8_t subCarrierSpacing;$/;" m struct:fapi_prb_sym_rate_match_pattern
+subCarrierSpacing fapi_interface_ue_sim.h /^ uint8_t subCarrierSpacing;$/;" m struct:fapi_ssb_res_config_table
+subCarrierSpacingCommon fapi_interface_ue_sim.h /^ uint8_t subCarrierSpacingCommon;$/;" m struct:fapi_ssb_res_config_table
+sub_carrier_spacing fapi_interface_ue_sim.h /^ uint8_t sub_carrier_spacing;$/;" m struct:fapi_bwp
+sub_carrier_spacing fapi_interface_ue_sim.h /^ uint8_t sub_carrier_spacing;$/;" m struct:fapi_ul_pucch_pdu
+sub_carrier_spacing fapi_interface_ue_sim.h /^ uint8_t sub_carrier_spacing;$/;" m struct:fapi_ul_pusch_pdu
+sub_carrier_spacing fapi_interface_ue_sim.h /^ uint8_t sub_carrier_spacing;$/;" m struct:fapi_ul_srs_pdu
+subcarrierSpacing fapi_interface_ue_sim.h /^ uint8_t subcarrierSpacing;$/;" m struct:fapi_ssb_basic_parms
+subframeAllocLength fapi_interface_ue_sim.h /^ uint8_t subframeAllocLength;$/;" m struct:fapi_mbsfn_sf_config_list
+subframeAllocationBitmap fapi_interface_ue_sim.h /^ uint32_t subframeAllocationBitmap; \/* Ref: Table 3-42 LTE-CRS rate match patterns configuration*\/$/;" m struct:fapi_mbsfn_sf_config_list
+supportedBandwidthDl fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim supportedBandwidthDl;$/;" m struct:fapi_carrier_parms
+supportedBandwidthUl fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim supportedBandwidthUl;$/;" m struct:fapi_carrier_parms
+supportedMaxModulationOrderDl fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim supportedMaxModulationOrderDl;$/;" m struct:fapi_pdsch_parms
+supportedModulationOrderUl fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim supportedModulationOrderUl;$/;" m struct:fapi_pusch_parms
+supportedRateMatchPatternType fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim supportedRateMatchPatternType;$/;" m struct:fapi_pdsch_parms
+supportedSubcarrierSpacingDl fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim supportedSubcarrierSpacingDl;$/;" m struct:fapi_carrier_parms
+supportedSubcarrierSpecingsUl fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim supportedSubcarrierSpecingsUl;$/;" m struct:fapi_carrier_parms
+symbSnr fapi_interface_ue_sim.h /^ fapi_symb_snr_t_ue_sim symbSnr[MAX_NUMBER_OF_REP_SYMBOLS];$/;" m struct:fapi_srs_pdu
+symb_l0 fapi_interface_ue_sim.h /^ uint8_t symb_l0;$/;" m struct:fapi_dl_csi_rs_pdu
+symb_l1 fapi_interface_ue_sim.h /^ uint8_t symb_l1;$/;" m struct:fapi_dl_csi_rs_pdu
+symbolIndex fapi_interface_ue_sim.h /^ uint8_t symbolIndex;$/;" m struct:fapi_rach_pdu
+symbolsInRB fapi_interface_ue_sim.h /^ uint16_t symbolsInRB; $/;" m struct:fapi_dl_prb_sym_rm_patrn_by_val
+symbolsInRB fapi_interface_ue_sim.h /^ uint32_t symbolsInRB;$/;" m struct:fapi_prb_sym_rate_match_pattern
+symbolsPatrn fapi_interface_ue_sim.h /^ uint16_t symbolsPatrn;$/;" m struct:fapi_dl_coreset_rm_patrn
+t_offset fapi_interface_ue_sim.h /^ uint16_t t_offset;$/;" m struct:fapi_ul_srs_pdu
+t_srs fapi_interface_ue_sim.h /^ uint16_t t_srs;$/;" m struct:fapi_ul_srs_pdu
+tag fapi_interface_ue_sim.h /^ uint16_t tag; \/\/ In 5G FAPI for Cell Params$/;" m struct:fapi_config_tlv
+tag fapi_interface_ue_sim.h /^ uint16_t tag;$/;" m struct:fapi_tl
+tag fapi_interface_ue_sim.h /^ uint16_t tag;$/;" m struct:fapi_tx_dat_tlv
+target_code_rate fapi_interface_ue_sim.h /^ uint16_t target_code_rate;$/;" m struct:fapi_codeword_pdu
+target_code_rate fapi_interface_ue_sim.h /^ uint16_t target_code_rate;$/;" m struct:fapi_ul_pusch_pdu
+tbCrcRequired fapi_interface_ue_sim.h /^ uint8_t tbCrcRequired;$/;" m struct:fapi_dl_codeword_info
+tbSizeLbrmBytes fapi_interface_ue_sim.h /^ uint32_t tbSizeLbrmBytes; $/;" m struct:fapi_pusch_mnt_parms
+tbSizeLbrmBytes fapi_interface_ue_sim.h /^ uint32_t tbSizeLbrmBytes;$/;" m struct:fapi_dl_codeword_info
+tb_crc_status fapi_interface_ue_sim.h /^ uint8_t tb_crc_status;$/;" m struct:fapi_crc_ind_info
+tb_size fapi_interface_ue_sim.h /^ uint32_t tb_size;$/;" m struct:fapi_codeword_pdu
+tb_size fapi_interface_ue_sim.h /^ uint32_t tb_size;$/;" m struct:fapi_pusch_data
+tddPeriod fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim tddPeriod;$/;" m struct:fapi_tdd_table
+tddPeriod fapi_interface_ue_sim.h /^ uint8_t tddPeriod;$/;" m struct:fapi_tdd_table
+tddTable fapi_interface_ue_sim.h /^ fapi_tdd_table_t_ue_sim tddTable;$/;" m struct:fapi_config
+tddTable fapi_interface_ue_sim.h /^ fapi_tdd_table_t_ue_sim tddTable;$/;" m struct:fapi_config
+tddTableConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim tddTableConfig;$/;" m struct:fapi_tdd_table
+timeDomainPattern fapi_interface_ue_sim.h /^ uint8_t timeDomainPattern[5];$/;" m struct:fapi_prb_sym_rate_match_pattern
+timeDomainPeriodicity fapi_interface_ue_sim.h /^ uint8_t timeDomainPeriodicity;$/;" m struct:fapi_prb_sym_rate_match_pattern
+timeManagement fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim timeManagement;$/;" m struct:fapi_phy_parms
+time_domain_occ_idx fapi_interface_ue_sim.h /^ uint8_t time_domain_occ_idx;$/;" m struct:fapi_ul_pucch_pdu
+time_start_position fapi_interface_ue_sim.h /^ uint8_t time_start_position;$/;" m struct:fapi_ul_srs_pdu
+timingAdvance fapi_interface_ue_sim.h /^ uint16_t timingAdvance;$/;" m struct:fapi_preamble_info
+timingAdvance fapi_interface_ue_sim.h /^ uint16_t timingAdvance;$/;" m struct:fapi_srs_pdu
+timingInfoMode fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim timingInfoMode;$/;" m struct:fapi_delay_mgmt_config
+timingInfoPeriod fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim timingInfoPeriod;$/;" m struct:fapi_delay_mgmt_config
+timingWindow fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim timingWindow;$/;" m struct:fapi_delay_mgmt_config
+timing_advance fapi_interface_ue_sim.h /^ uint16_t timing_advance;$/;" m struct:fapi_crc_ind_info
+timing_advance fapi_interface_ue_sim.h /^ uint16_t timing_advance;$/;" m struct:fapi_pdu_ind_info
+timing_advance fapi_interface_ue_sim.h /^ uint16_t timing_advance;$/;" m struct:fapi_uci_o_pucch_f0f1
+timing_advance fapi_interface_ue_sim.h /^ uint16_t timing_advance;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+timing_advance fapi_interface_ue_sim.h /^ uint16_t timing_advance;$/;" m struct:fapi_uci_o_pusch
+timing_info_period fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim timing_info_period;$/;" m struct:fapi_delay_management_parms
+timing_window fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim timing_window;$/;" m struct:fapi_delay_management_parms
+tl fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim tl;$/;" m struct:__anon1
+tl fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim tl;$/;" m struct:fapi_int16_tlv
+tl fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim tl;$/;" m struct:fapi_uint16_tlv
+tl fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim tl;$/;" m struct:fapi_uint32_tlv
+tl fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim tl;$/;" m struct:fapi_uint8_tlv
+tlvs fapi_interface_ue_sim.h /^ fapi_tx_dat_tlv_t tlvs[];$/;" m struct:fapi_tx_pdu_desc
+tlvs fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim tlvs[4 * MAX_NUM_TLVS_CONFIG];$/;" m struct:fapi_config_resp
+tlvs fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim tlvs[MAX_NUM_TLVS_CONFIG];$/;" m struct:fapi_config_req
+tlvs fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim tlvs[MAX_NUM_TLVS_CONFIG];$/;" m struct:fapi_param_resp
+transform_precoding fapi_interface_ue_sim.h /^ uint8_t transform_precoding;$/;" m struct:fapi_ul_pusch_pdu
+transmission_scheme fapi_interface_ue_sim.h /^ uint8_t transmission_scheme;$/;" m struct:fapi_dl_pdsch_pdu
+trpScheme fapi_interface_ue_sim.h /^ uint8_t trpScheme;$/;" m struct:fapi_bmform
+trpScheme fapi_interface_ue_sim.h /^ uint8_t trpScheme;$/;" m struct:fapi_precoding_bmform
+txPwrInfo fapi_interface_ue_sim.h /^ fapi_csi_rs_tx_pwr_info_t txPwrInfo;$/;" m struct:fapi_dl_csi_rs_mnt_parms
+txPwrInfo fapi_interface_ue_sim.h /^ fapi_dl_ptrs_tx_pwr_info_t txPwrInfo; $/;" m struct:fapi_dl_pdsch_ptrs_mnt_parms
+txPwrInfo fapi_interface_ue_sim.h /^ fapi_dl_ptrs_tx_pwr_info_t txPwrInfo; $/;" m struct:fapi_dl_pdsch_ptrsv3
+txPwrInfo fapi_interface_ue_sim.h /^ fapi_dl_tx_pwr_info_t txPwrInfo;$/;" m struct:fapi_dl_pdsch_mnt_parms
+tx_data_timing_offset fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim tx_data_timing_offset;$/;" m struct:fapi_delay_management_parms
+tx_direct_current_location fapi_interface_ue_sim.h /^ uint16_t tx_direct_current_location;$/;" m struct:fapi_ul_pusch_pdu
+tx_power_info fapi_interface_ue_sim.h /^ fapi_tx_power_info_t tx_power_info;$/;" m struct:fapi_dl_dci
+tx_pwr_info fapi_interface_ue_sim.h /^ fapi_ssb_tx_pwr_info_t tx_pwr_info;$/;" m struct:fapi_dl_ssb_pbch_mnt_parms
+tx_pwr_info fapi_interface_ue_sim.h /^ fapi_tx_pwr_info_t tx_pwr_info;$/;" m struct:fapi_dl_pdsch_pdu
+tx_pwr_info fapi_interface_ue_sim.h /^ fapi_tx_pwr_info_t tx_pwr_info;$/;" m struct:fapi_dl_csi_rs_pdu
+u fapi_interface_ue_sim.h /^ } u;$/;" m struct:fapi_bch_payload typeref:union:fapi_bch_payload::__anon2
+u fapi_interface_ue_sim.h /^ }u;$/;" m struct:fapi_dl_tti_req_pdu typeref:union:fapi_dl_tti_req_pdu::__anon3
+u fapi_interface_ue_sim.h /^ }u;$/;" m struct:fapi_uci_pdu_info typeref:union:fapi_uci_pdu_info::__anon5
+u fapi_interface_ue_sim.h /^ }u;$/;" m struct:fapi_ul_tti_req_pdu typeref:union:fapi_ul_tti_req_pdu::__anon4
+uciConfig fapi_interface_ue_sim.h /^ fapi_tl_t_ue_sim uciConfig;$/;" m struct:fapi_uci_config
+uciConfig fapi_interface_ue_sim.h /^ fapi_uci_config_t uciConfig;$/;" m struct:fapi_config
+uciMuxUlschInPusch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim uciMuxUlschInPusch;$/;" m struct:fapi_pusch_parms
+uciOnlyPusch fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim uciOnlyPusch;$/;" m struct:fapi_pusch_parms
+uciParms fapi_interface_ue_sim.h /^ fapi_uci_parms_t uciParms;$/;" m struct:fapi_params
+uci_part1_part2 fapi_interface_ue_sim.h /^ fapi_uci_part1_part2_t uci_part1_part2;$/;" m struct:fapi_ul_pucch_pdu
+uci_part2 fapi_interface_ue_sim.h /^ fapi_uci_part2_t uci_part2[0];$/;" m struct:fapi_uci_part1_part2
+uci_pdu fapi_interface_ue_sim.h /^ fapi_uci_pdu_info_t_ue_sim uci_pdu[] ;\/\/max length of the array MAX_NUMBER_UCI_PDUS_PER_SLOT;$/;" m struct:fapi_uci_indication
+uci_pucch_f0f1 fapi_interface_ue_sim.h /^ fapi_uci_o_pucch_f0f1_t_ue_sim uci_pucch_f0f1;$/;" m union:fapi_uci_pdu_info::__anon5
+uci_pucch_f2f3f4 fapi_interface_ue_sim.h /^ fapi_uci_o_pucch_f2f3f4_t_ue_sim uci_pucch_f2f3f4;$/;" m union:fapi_uci_pdu_info::__anon5
+uci_pusch fapi_interface_ue_sim.h /^ fapi_uci_o_pusch_t_ue_sim uci_pusch;$/;" m union:fapi_uci_pdu_info::__anon5
+ueGrpInfo fapi_interface_ue_sim.h /^ fapi_ue_info_t_ue_sim ueGrpInfo[0];$/;" m struct:fapi_dl_tti_req
+ueGrpInfo fapi_interface_ue_sim.h /^ fapi_ue_info_t_ue_sim ueGrpInfo[0];$/;" m struct:fapi_ul_tti_req
+uint16_t fapi_interface_ue_sim.h /^typedef uint16_t uint16_t;$/;" t
+uint32_t fapi_interface_ue_sim.h /^typedef uint32_t uint32_t;$/;" t
+uint64_t fapi_interface_ue_sim.h /^typedef uint64_t uint64_t;$/;" t
+uint8_t fapi_interface_ue_sim.h /^typedef unsigned char uint8_t;$/;" t
+ulBwpId fapi_interface_ue_sim.h /^ fapi_ul_bwp_id_t ulBwpId[0];$/;" m struct:fapi_pucch_semi_static_config
+ulBwpId fapi_interface_ue_sim.h /^ uint8_t ulBwpId;$/;" m struct:fapi_pUCCH_Mntnnc_params
+ulBwpPuschScs fapi_interface_ue_sim.h /^ uint8_t ulBwpPuschScs;$/;" m struct:fapi_prach_configuration
+ulCarrierId fapi_interface_ue_sim.h /^ uint8_t ulCarrierId;$/;" m struct:fapi_rach_pdu
+ulGridSize fapi_interface_ue_sim.h /^ fapi_config_num_tlv_t ulGridSize;$/;" m struct:fapi_carrier_config
+ulGridSize fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim ulGridSize[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+ulGridSize fapi_interface_ue_sim.h /^ uint16_t ulGridSize[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+ulPortRangeLen fapi_interface_ue_sim.h /^ uint16_t ulPortRangeLen[0]; $/;" m struct:fapi_phy_port
+ulPortRangeStart fapi_interface_ue_sim.h /^ uint16_t ulPortRangeStart[0];$/;" m struct:fapi_phy_port
+ul_cqi fapi_interface_ue_sim.h /^ uint8_t ul_cqi;$/;" m struct:fapi_crc_ind_info
+ul_cqi fapi_interface_ue_sim.h /^ uint8_t ul_cqi;$/;" m struct:fapi_pdu_ind_info
+ul_cqi fapi_interface_ue_sim.h /^ uint8_t ul_cqi;$/;" m struct:fapi_uci_o_pucch_f0f1
+ul_cqi fapi_interface_ue_sim.h /^ uint8_t ul_cqi;$/;" m struct:fapi_uci_o_pucch_f2f3f4
+ul_cqi fapi_interface_ue_sim.h /^ uint8_t ul_cqi;$/;" m struct:fapi_uci_o_pusch
+ul_dci_timing_offset fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim ul_dci_timing_offset;$/;" m struct:fapi_delay_management_parms
+ul_dmrs_scrambling_id fapi_interface_ue_sim.h /^ uint16_t ul_dmrs_scrambling_id;$/;" m struct:fapi_ul_pusch_pdu
+ul_dmrs_symb_pos fapi_interface_ue_sim.h /^ uint16_t ul_dmrs_symb_pos;$/;" m struct:fapi_ul_pusch_pdu
+ul_ptrs_power fapi_interface_ue_sim.h /^ uint8_t ul_ptrs_power;$/;" m struct:fapi_pusch_ptrs
+ul_ptrs_sample_density fapi_interface_ue_sim.h /^ uint8_t ul_ptrs_sample_density;$/;" m struct:fapi_dfts_ofdm
+ul_ptrs_time_density_transform_precoding fapi_interface_ue_sim.h /^ uint8_t ul_ptrs_time_density_transform_precoding;$/;" m struct:fapi_dfts_ofdm
+ul_tti_timing_offset fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim ul_tti_timing_offset;$/;" m struct:fapi_delay_management_parms
+ulk0 fapi_interface_ue_sim.h /^ fapi_config_num_tlv_t ulk0;$/;" m struct:fapi_carrier_config
+ulk0 fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim ulk0[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+ulk0 fapi_interface_ue_sim.h /^ uint16_t ulk0[NUMEROLOGIES];$/;" m struct:fapi_carrier_config
+unusedRootSequences fapi_interface_ue_sim.h /^ fapi_uint8_tlv_t_ue_sim unusedRootSequences[MAX_NUM_UNUSED_ROOT_SEQUENCES];$/;" m struct:fapi_prachFdOccasion
+unusedRootSequences fapi_interface_ue_sim.h /^ uint16_t unusedRootSequences[MAX_NUM_UNUSED_ROOT_SEQUENCES];$/;" m struct:fapi_prachFdOccasion
+uplinkBandwidth fapi_interface_ue_sim.h /^ fapi_uint16_tlv_t_ue_sim uplinkBandwidth;$/;" m struct:fapi_carrier_config
+uplinkBandwidth fapi_interface_ue_sim.h /^ uint16_t uplinkBandwidth;$/;" m struct:fapi_carrier_config
+uplinkFrequency fapi_interface_ue_sim.h /^ fapi_uint32_tlv_t_ue_sim uplinkFrequency;$/;" m struct:fapi_carrier_config
+uplinkFrequency fapi_interface_ue_sim.h /^ uint32_t uplinkFrequency;$/;" m struct:fapi_carrier_config
+uplink_frequency_shift7p5khz fapi_interface_ue_sim.h /^ uint8_t uplink_frequency_shift7p5khz;$/;" m struct:fapi_ul_pusch_pdu
+vShift fapi_interface_ue_sim.h /^ uint8_t vShift;$/;" m struct:fapi_lte_crs_rm_ptrn
+validityScope fapi_interface_ue_sim.h /^ uint8_t validityScope;$/;" m struct:fapi_capability
+value fapi_interface_ue_sim.h /^ uint16_t value[NUMEROLOGIES];$/;" m struct:__anon1
+value fapi_interface_ue_sim.h /^ int16_t value;$/;" m struct:fapi_int16_tlv
+value fapi_interface_ue_sim.h /^ uint16_t value;$/;" m struct:fapi_uint16_tlv
+value fapi_interface_ue_sim.h /^ uint32_t value;$/;" m struct:fapi_uint32_tlv
+value fapi_interface_ue_sim.h /^ uint32_t value[];$/;" m struct:fapi_tx_dat_tlv
+value fapi_interface_ue_sim.h /^ uint8_t value;$/;" m struct:fapi_config_tlv
+value fapi_interface_ue_sim.h /^ uint8_t value;$/;" m struct:fapi_uint8_tlv
+valueOrOffset fapi_interface_ue_sim.h /^ uint64_t valueOrOffset; \/\/ TLV with unsigned 32 bit value$/;" m struct:fapi_tx_dat_tlv
+vendor_spec_msg_body fapi_interface_ue_sim.h /^ uint8_t* vendor_spec_msg_body;$/;" m struct:pkd_fapi_l1api_msg_frmt
+vendor_spec_msg_len fapi_interface_ue_sim.h /^ uint8_t vendor_spec_msg_len;$/;" m struct:pkd_fapi_l1api_msg_frmt
+vrb_to_prb_mapping fapi_interface_ue_sim.h /^ uint8_t vrb_to_prb_mapping;$/;" m struct:fapi_ul_pusch_pdu
+vrb_to_prb_mapping fapi_interface_ue_sim.h /^ uint8_t vrb_to_prb_mapping;\/*SCF : PDSCH Allocation in Frequency Domain End *\/$/;" m struct:fapi_pdsch_freq_dom_alloc
+wideBandSnr fapi_interface_ue_sim.h /^ uint8_t wideBandSnr;$/;" m struct:fapi_srs_pdu
{ SS_POOL_STATIC, 0 }
}
}
-#ifndef INTEL_WLS_MEM
+#if ((!defined(INTEL_WLS_MEM)) || (defined(UE_SIM_TEST)))
,
{
SS_DFLT_REGION + 7, SS_MAX_POOLS_PER_REG - 1,
}
}
#endif
+#ifdef UE_SIM_TEST
+ ,
+ {
+ SS_DFLT_REGION + 8, SS_MAX_POOLS_PER_REG - 1,
+ {
+ { SS_POOL_DYNAMIC, MT_POOL_0_DSIZE },
+ { SS_POOL_DYNAMIC, MT_POOL_1_DSIZE },
+ { SS_POOL_DYNAMIC, MT_POOL_2_DSIZE },
+ { SS_POOL_DYNAMIC, MT_POOL_3_DSIZE },
+ { SS_POOL_DYNAMIC, MT_POOL_4_DSIZE },
+ { SS_POOL_STATIC, 0 }
+ }
+ }
+#endif
#endif /* SS_LOCKLESS_MEMORY */
};
{SS_BLK_RELEASE_THRESHOLD, SS_BLK_ACQUIRE_THRESHOLD}
}
}
-#ifndef INTEL_WLS_MEM
+#if ((!defined(INTEL_WLS_MEM)) || (defined(UE_SIM_TEST)))
,
{
SS_DFLT_REGION + 7, /* region id */
}
}
#endif
+#ifdef UE_SIM_TEST
+ ,
+ {
+ SS_DFLT_REGION + 8, /* region id */
+ MT_MAX_BKTS, /* number of buckets */
+ {
+ /* block size, no. of blocks, Upper threshold, lower threshold */
+ {SS_BLK_RELEASE_THRESHOLD, SS_BLK_ACQUIRE_THRESHOLD},
+ {SS_BLK_RELEASE_THRESHOLD, SS_BLK_ACQUIRE_THRESHOLD},
+ {SS_BLK_RELEASE_THRESHOLD, SS_BLK_ACQUIRE_THRESHOLD},
+ {SS_BLK_RELEASE_THRESHOLD, SS_BLK_ACQUIRE_THRESHOLD},
+ {SS_BLK_RELEASE_THRESHOLD, SS_BLK_ACQUIRE_THRESHOLD}
+ }
+ }
+#endif
+
#if ((defined (SPLIT_RLC_DL_TASK)) && (!defined (L2_L3_SPLIT)))
,
{
{MT_BKT_4_DSIZE, MT_BKT_4_STATIC_NUMBLKS} /* block size, no. of blocks */
}
}
-#ifndef INTEL_WLS_MEM
+#if ((!defined(INTEL_WLS_MEM)) || (defined(UE_SIM_TEST)))
,
{
SS_DFLT_REGION + 7, /* region id */
}
}
#endif
+#ifdef UE_SIM_TEST
+ ,
+ {
+ SS_DFLT_REGION + 8, /* region id */
+ MT_MAX_BKTS, /* number of buckets */
+ MT_HEAP_SIZE, /* heap size */
+ {
+ {MT_BKT_0_DSIZE, MT_BKT_0_STATIC_NUMBLKS}, /* block size, no. of blocks */
+ {MT_BKT_1_DSIZE, MT_BKT_1_STATIC_NUMBLKS}, /* block size, no. of blocks */
+ {MT_BKT_2_DSIZE, MT_BKT_2_STATIC_NUMBLKS}, /* block size, no. of blocks */
+ {MT_BKT_3_DSIZE, MT_BKT_3_STATIC_NUMBLKS}, /* block size, no. of blocks */
+ {MT_BKT_4_DSIZE, MT_BKT_4_STATIC_NUMBLKS} /* block size, no. of blocks */
+ }
+ }
+#endif
+
#endif /* SS_LOCKLESS_MEMORY */
STATIC_MEM_CFG
}
tsN.tv_nsec = 0;
continue;
}
-
if (gettimeofday(&tv2,NULL) == -1)
{
#if (ERRCLASS & ERRCLS_DEBUG)
SDisplay(0, prntBuf);
sprintf(prntBuf, "====================================================\n");
SDisplay(0, prntBuf);
- sprintf(prntBuf, "Bucket Id Set Size Free Sets Allocated\n");
+ sprintf(prntBuf, "PoolId PoolSize NoOfBlocks BucketSetSize NoOfFreeSets NoOfAllocatedSets\n");
SDisplay(0, prntBuf);
sprintf(prntBuf, "====================================================\n");
SDisplay(0, prntBuf);
idx, globReg->bktTbl[idx].size, globReg->bktTbl[idx].bucketSetSize, globReg->bktTbl[idx].listValidBktSet.count, globReg->bktTbl[idx].listFreeBktSet.count);
#else
#ifndef ALIGN_64BIT
- sprintf(prntBuf, "%2u %12lu %8lu %9lu\n",
- idx, globReg->bktTbl[idx].bucketSetSize, globReg->bktTbl[idx].listValidBktSet.count, globReg->bktTbl[idx].listFreeBktSet.count);
+ sprintf(prntBuf, "%d %ld %ld %12lu %8lu %9lu\n",
+ globReg->bktTbl[idx].poolId, globReg->bktTbl[idx].size, globReg->bktTbl[idx].numBlks, \
+ globReg->bktTbl[idx].bucketSetSize, globReg->bktTbl[idx].listValidBktSet.count, globReg->bktTbl[idx].listFreeBktSet.count);
#else
- sprintf(prntBuf, "%2u %12u %8u %9u\n",
- idx, globReg->bktTbl[idx].bucketSetSize, globReg->bktTbl[idx].listValidBktSet.count, globReg->bktTbl[idx].listFreeBktSet.count);
+// sprintf(prntBuf, "%2u %12u %8u %9u\n",
+// idx, globReg->bktTbl[idx].bucketSetSize, globReg->bktTbl[idx].listValidBktSet.count, globReg->bktTbl[idx].listFreeBktSet.count);
+ sprintf(prntBuf, "%d %ld %ld %12lu %8lu %9lu\n",
+ globReg->bktTbl[idx].poolId, globReg->bktTbl[idx].size, globReg->bktTbl[idx].numBlks, \
+ globReg->bktTbl[idx].bucketSetSize, globReg->bktTbl[idx].listValidBktSet.count, globReg->bktTbl[idx].listFreeBktSet.count);
#endif
#endif
SDisplay(0, prntBuf);
#endif
#else
#ifndef INTEL_WLS_MEM
+#ifdef UE_SIM_TEST
+#define SS_MAX_STSKS 9
+#else
#define SS_MAX_STSKS 8
+#endif
#else
#define SS_MAX_STSKS 7
#endif
Code Review / o-du / l2.git / commitdiff