*/
coreset0Size= sib1PdcchInfo->coreset0Cfg.coreSet0Size;
rbStart = 0; /* For SIB1 */
- //rbStart = sib1PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
- rbLen = sib1PdcchInfo->dci.pdschCfg->freqAlloc.rbSize;
+ //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
+ rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
}
/* Fetching DCI field values */
- timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->timeAlloc.
+ timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
rowIndex -1;
- VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->freqAlloc.\
+ VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
vrbPrbMapping;
modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
coreset0Size= rarPdcchInfo->coreset0Cfg.coreSet0Size;
rbStart = 0; /* For SIB1 */
//rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
- rbLen = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbSize;
+ rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
}
/* Fetching DCI field values */
- timeDomResAssign = rarPdcchInfo->dci.pdschCfg->timeAlloc.rowIndex -1;
- VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->freqAlloc.vrbPrbMapping;
+ timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
tbScaling = 0; /* configured to 0 scaling */
reserved = 0;
/* TODO: Fill values of coreset0Size, rbStart and rbLen */
coreset0Size = msg4PdcchInfo->coreset0Cfg.coreSet0Size;
//rbStart = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
- rbLen = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbSize;
+ rbLen = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
/* Fetching DCI field values */
dciFormatId = msg4Info->dciFormatId; /* DCI indentifier for DL */
- timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->timeAlloc.rowIndex -1;
- VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->freqAlloc.vrbPrbMapping;
+ timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = msg4PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
ndi = msg4Info->ndi;
redundancyVer = msg4PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
return RFAILED;;
}
dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
- dlTtiReqPdu->u.pdcch_pdu.bwpSize = bwp->BWPSize;
- dlTtiReqPdu->u.pdcch_pdu.bwpPart = bwp->BWPStart;
+ dlTtiReqPdu->u.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
+ dlTtiReqPdu->u.pdcch_pdu.bwpPart = bwp->freqAlloc.startPrb;
dlTtiReqPdu->u.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
dlTtiReqPdu->u.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
dlTtiReqPdu->u.pdcch_pdu.startSymbolIndex = pdcchInfo->coreset0Cfg.startSymbolIndex;
dlTtiReqPdu->u.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
dlTtiReqPdu->u.pdsch_pdu.rnti = pdschInfo->rnti;
dlTtiReqPdu->u.pdsch_pdu.pduIndex = pduIndex;
- dlTtiReqPdu->u.pdsch_pdu.bwpSize = bwp.BWPSize;
- dlTtiReqPdu->u.pdsch_pdu.bwpStart = bwp.BWPStart;
+ dlTtiReqPdu->u.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
+ dlTtiReqPdu->u.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
dlTtiReqPdu->u.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
dlTtiReqPdu->u.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
dlTtiReqPdu->u.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
dlTtiReqPdu->u.pdsch_pdu.scid = pdschInfo->dmrs.scid;
dlTtiReqPdu->u.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
dlTtiReqPdu->u.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
- dlTtiReqPdu->u.pdsch_pdu.resourceAlloc = pdschInfo->freqAlloc.resourceAlloc;
+ dlTtiReqPdu->u.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- dlTtiReqPdu->u.pdsch_pdu.rbStart = pdschInfo->freqAlloc.rbStart;
- dlTtiReqPdu->u.pdsch_pdu.rbSize = pdschInfo->freqAlloc.rbSize;
- dlTtiReqPdu->u.pdsch_pdu.vrbToPrbMapping = pdschInfo->freqAlloc.vrbPrbMapping;
- dlTtiReqPdu->u.pdsch_pdu.startSymbIndex = pdschInfo->timeAlloc.startSymbolIndex;
- dlTtiReqPdu->u.pdsch_pdu.nrOfSymbols = pdschInfo->timeAlloc.numSymbols;
+ dlTtiReqPdu->u.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
+ dlTtiReqPdu->u.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
+ dlTtiReqPdu->u.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
+ dlTtiReqPdu->u.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
+ dlTtiReqPdu->u.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
{
uint8_t pduCount = 0;
- if(currUlSlot != NULLP)
- {
- if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
- {
- pduCount++;
- if(ulTtiReq)
- ulTtiReq->rachPresent = PDU_PRESENT;
- }
+ if(ulTtiReq && currUlSlot)
+ {
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
+ {
+ pduCount++;
+ ulTtiReq->rachPresent = PDU_PRESENT;
+ }
if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
{
- pduCount++;
- if(ulTtiReq)
- ulTtiReq->nUlsch++;
+ pduCount++;
+ ulTtiReq->nUlsch++;
}
if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
{
- pduCount++;
- if(ulTtiReq)
- ulTtiReq->nUlsch = PDU_PRESENT;
- }
- if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
- {
- pduCount++;
- if(ulTtiReq)
- ulTtiReq->nUlcch = PDU_PRESENT;
- }
- if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
- {
- pduCount++;
- }
- }
+ pduCount++;
+ ulTtiReq->nUlsch++;
+ ulTtiReq->nUlsch = PDU_PRESENT;
+ }
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
+ {
+ pduCount++;
+ ulTtiReq->nUlcch = PDU_PRESENT;
+ }
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
+ {
+ pduCount++;
+ }
+ }
return pduCount;
}
#endif
uint8_t FBitSize = 1;
uint8_t lcidSize = 6;
uint8_t lenFieldSize = 0; /* 8-bit or 16-bit L field */
- uint8_t criSize = 8;
/* PACK ALL MAC CE */
for(idx = 0; idx < macCeData->numCes; idx++)
macCellCfg->prachCfg.prachSubcSpacing;
schCellCfg.schRachCfg.msg1FreqStart = macCellCfg->prachCfg.msg1FreqStart;
schCellCfg.schRachCfg.msg1Fdm = macCellCfg->prachCfg.msg1Fdm;
+ schCellCfg.schRachCfg.rootSeqLen = macCellCfg->prachCfg.rootSeqLen;
schCellCfg.schRachCfg.rootSeqIdx = macCellCfg->prachCfg.fdm[0].rootSeqIdx;
schCellCfg.schRachCfg.numRootSeq = macCellCfg->prachCfg.fdm[0].numRootSeq;
schCellCfg.schRachCfg.k1 = macCellCfg->prachCfg.fdm[0].k1;
schCellCfg.schRachCfg.raRspWindow = macCellCfg->prachCfg.raRspWindow;
/* fill initial DL BWP */
- schCellCfg.schInitialDlBwp.bwp.firstPrb = macCellCfg->initialDlBwp.bwp.firstPrb;
- schCellCfg.schInitialDlBwp.bwp.numPrb = macCellCfg->initialDlBwp.bwp.numPrb;
+ schCellCfg.schInitialDlBwp.bwp.freqAlloc.startPrb = macCellCfg->initialDlBwp.bwp.firstPrb;
+ schCellCfg.schInitialDlBwp.bwp.freqAlloc.numPrb = macCellCfg->initialDlBwp.bwp.numPrb;
schCellCfg.schInitialDlBwp.bwp.scs = macCellCfg->initialDlBwp.bwp.scs;
schCellCfg.schInitialDlBwp.bwp.cyclicPrefix = macCellCfg->initialDlBwp.bwp.cyclicPrefix;
schCellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.searchSpaceId =
schCellCfg.schInitialDlBwp.pdschCommon.lengthSymbol =
macCellCfg->initialDlBwp.pdschCommon.lengthSymbol;
- /* fill initial DL BWP */
- schCellCfg.schInitialUlBwp.bwp.firstPrb = macCellCfg->initialUlBwp.bwp.firstPrb;
- schCellCfg.schInitialUlBwp.bwp.numPrb = macCellCfg->initialUlBwp.bwp.numPrb;
+ /* fill initial UL BWP */
+ schCellCfg.schInitialUlBwp.bwp.freqAlloc.startPrb = macCellCfg->initialUlBwp.bwp.firstPrb;
+ schCellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb = macCellCfg->initialUlBwp.bwp.numPrb;
schCellCfg.schInitialUlBwp.bwp.scs = macCellCfg->initialUlBwp.bwp.scs;
schCellCfg.schInitialUlBwp.bwp.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
schCellCfg.schInitialUlBwp.puschCommon.k2 = macCellCfg->initialUlBwp.puschCommon.k2;
return RFAILED;
}
+ memset(schDlSlotInfo, 0, sizeof(SchDlSlotInfo));
+ memset(schUlSlotInfo, 0, sizeof(SchUlSlotInfo));
+
schDlSlotInfo->totalPrb = schUlSlotInfo->totalPrb = MAX_NUM_RB;
for(uint8_t itr=0; itr<SCH_SYMBOL_PER_SLOT; itr++)
sib1SchCfg->n0 = slotIndex;
/* calculate the PRBs */
- calculatePRB( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+ schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
/* fill BWP */
- bwp->BWPSize = MAX_NUM_RB; /* whole of BW */
- bwp->BWPStart = 0;
- bwp->subcarrierSpacing = 0; /* 15Khz */
- bwp->cyclicPrefix = 0; /* normal */
+ bwp->freqAlloc.numPrb = MAX_NUM_RB; /* whole of BW */
+ bwp->freqAlloc.startPrb = 0;
+ bwp->subcarrierSpacing = 0; /* 15Khz */
+ bwp->cyclicPrefix = 0; /* normal */
/* fill the PDCCH PDU */
pdcch->coreset0Cfg.coreSet0Size = numRbs;
tbSize = schCalcTbSize(sib1SchCfg->sib1PduLen);
pdsch->codeword[cwCount].tbSize = tbSize;
}
- pdsch->dataScramblingId = pci;
- pdsch->numLayers = 1;
- pdsch->transmissionScheme = 0;
- pdsch->refPoint = 0;
- pdsch->dmrs.dlDmrsSymbPos = 2;
- pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
- pdsch->dmrs.dlDmrsScramblingId = pci;
- pdsch->dmrs.scid = 0;
- pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
- pdsch->dmrs.dmrsPorts = 0;
- pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */
- pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
- pdsch->freqAlloc.rbSize = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols);
- pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */
- pdsch->timeAlloc.rowIndex = 1;
- pdsch->timeAlloc.startSymbolIndex = 2; /* spec-38.214, Table 5.1.2.1-1 */
- pdsch->timeAlloc.numSymbols = numPdschSymbols;
- pdsch->beamPdschInfo.numPrgs = 1;
- pdsch->beamPdschInfo.prgSize = 1;
- pdsch->beamPdschInfo.digBfInterfaces = 0;
- pdsch->beamPdschInfo.prg[0].pmIdx = 0;
- pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
- pdsch->txPdschPower.powerControlOffset = 0;
- pdsch->txPdschPower.powerControlOffsetSS = 0;
+ pdsch->dataScramblingId = pci;
+ pdsch->numLayers = 1;
+ pdsch->transmissionScheme = 0;
+ pdsch->refPoint = 0;
+ pdsch->dmrs.dlDmrsSymbPos = 2;
+ pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
+ pdsch->dmrs.dlDmrsScramblingId = pci;
+ pdsch->dmrs.scid = 0;
+ pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
+ pdsch->dmrs.dmrsPorts = 0;
+ pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
+ pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0,
+ and PDSCH is always above SSB */
+ pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols);
+ pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
+ pdsch->pdschTimeAlloc.rowIndex = 1;
+ pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */
+ pdsch->pdschTimeAlloc.timeAlloc.numSymb = numPdschSymbols;
+ pdsch->beamPdschInfo.numPrgs = 1;
+ pdsch->beamPdschInfo.prgSize = 1;
+ pdsch->beamPdschInfo.digBfInterfaces = 0;
+ pdsch->beamPdschInfo.prg[0].pmIdx = 0;
+ pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
+ pdsch->txPdschPower.powerControlOffset = 0;
+ pdsch->txPdschPower.powerControlOffsetSS = 0;
+
+}
+
+/**
+ * @brief Fill SSB start symbol
+ *
+ * @details
+ *
+ * Function : fillSsbStartSymb
+ *
+ * This API stores SSB start index per beam
+ *
+ * @param[in] SchCellCb *cellCb
+ * @return int
+ * -# ROK
+ * -# RFAILED
+ **/
+void fillSsbStartSymb(SchCellCb *cellCb)
+{
+ uint8_t cnt, scs;
+
+ scs = cellCb->cellCfg.ssbSchCfg.scsCommon;
+ uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM];
+
+ memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
+ /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
+ switch(scs)
+ {
+ case SCH_SCS_15KHZ:
+ {
+ uint8_t symbIdx=0;
+ cnt = 2;/* n = 0, 1 for SCS = 15KHz */
+ for(uint8_t idx=0; idx<cnt; idx++)
+ {
+ /* start symbol determined using {2, 8} + 14n */
+ ssbStartSymbArr[symbIdx++] = 2 + SCH_SYMBOL_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 8 + SCH_SYMBOL_PER_SLOT*idx;
+ }
+ }
+ break;
+ default:
+ DU_LOG("\nSCS %d is currently not supported", scs);
+ }
+ memset(cellCb->ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
+ memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM);
}
#define MAX_NUM_RB 106 /* value for numerology 0 15Khz */
#define SCH_MIB_TRANS 80
#define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */
-#define SCH_MAX_SSB_BEAM 4 /* since we are supporting only SCS=15KHz */
#define SCH_SCS_15KHZ 0 /* numerology 0 and 15Khz */
#define SCH_SYMBOL_PER_SLOT 14
-#define SCH_SSB_SYMB_DURATION 4
-#define SCH_SSB_PRB_DURATION 20
+#define SCH_SSB_NUM_SYMB 4
+#define SCH_SSB_NUM_PRB 20
+#define SCH_MAX_SSB_BEAM 4 /* since we are supporting only SCS=15KHz */
#define SCH_MEM_REGION 4
#define SCH_POOL 1
#define SCHED_DELTA 1
*/
typedef struct schDlSlotInfo
{
- uint16_t totalPrb; /*!< Number of RBs in the cell */
- uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */
- bool ssbPres; /*!< Flag to determine if SSB is present in this slot */
- uint8_t ssbIdxSupported; /*!< Max SSB index */
- SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */
- bool sib1Pres;
- //bool rarPres;
- RarInfo *rarInfo;
- Msg4Info *msg4Info;
+ uint16_t totalPrb; /*!< Number of RBs in the cell */
+ uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */
+ bool ssbPres; /*!< Flag to determine if SSB is present in this slot */
+ uint8_t ssbIdxSupported; /*!< Max SSB index */
+ SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */
+ bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */
+ RarInfo *rarInfo; /*!< RAR info */
+ Msg4Info *msg4Info; /*!< msg4 info */
}SchDlSlotInfo;
typedef struct schRaCb
*/
typedef struct schCellCb
{
- uint16_t cellId; /*!< Cell ID */
- Inst instIdx; /*!< Index of the scheduler instance */
- Inst macInst; /*!< Index of the MAC instance */
- uint8_t numSlots; /*!< Number of slots in current frame */
- SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/
- SchDlSlotInfo *schDlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in DL */
- SchUlSlotInfo *schUlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in UL */
- SchCellCfg cellCfg; /*!< Cell ocnfiguration */
- SchRaCb raCb[SCH_MAX_UE];
+ uint16_t cellId; /*!< Cell ID */
+ Inst instIdx; /*!< Index of the scheduler instance */
+ Inst macInst; /*!< Index of the MAC instance */
+ uint8_t numSlots; /*!< Number of slots in current frame */
+ SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/
+ SchDlSlotInfo *schDlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in DL */
+ SchUlSlotInfo *schUlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in UL */
+ SchCellCfg cellCfg; /*!< Cell ocnfiguration */
+ uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
+ SchRaCb raCb[SCH_MAX_UE]; /*!< Rach Cb */
}SchCellCb;
/**
packSchMacUlSchInfo
};
-/**
- * @brief Time domain allocation for SSB
- *
- * @details
- *
- * Function : ssbDlTdAlloc
- *
- * This function handles common scheduling for DL
- *
- * @param[in] uint8_t scs, uint8_t *ssbStartSym
- * @return void
- **/
-void ssbDlTdAlloc(uint8_t scs, uint8_t *ssbStartSymb)
-{
- uint8_t n;
- /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
- switch(scs)
- {
- case SCH_SCS_15KHZ:
- {
- uint8_t symbIdx=0;
- n = 2;/* n = 0, 1 for SCS = 15KHz */
- for(uint8_t idx=0; idx<n; idx++)
- {
- /* start symbol determined using {2, 8} + 14n */
- ssbStartSymb[symbIdx++] = 2 + SCH_SYMBOL_PER_SLOT*idx;
- ssbStartSymb[symbIdx++] = 8 + SCH_SYMBOL_PER_SLOT*idx;
- }
- }
- break;
- default:
- DU_LOG("\nSCS %d is currently not supported", scs);
- }
-}
-
/**
* @brief common resource allocation for SSB
*
uint16_t slot)
{
/* schedule SSB */
- uint8_t scs, ssbStartPrb, ssbStartSymb, idx;
- uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM];
+ uint8_t ssbStartPrb, ssbStartSymb, idx;
SchDlSlotInfo *schDlSlotInfo;
SsbInfo ssbInfo;
schDlSlotInfo = cell->schDlSlotInfo[slot];
if(dlBrdcstAlloc->ssbTrans)
{
- scs = cell->cellCfg.ssbSchCfg.scsCommon;
ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
+ ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are
+ supporting only 1 ssb beam */
- memset(ssbStartSymbArr, 0, SCH_MAX_SSB_BEAM);
- ssbDlTdAlloc(scs, ssbStartSymbArr);
- ssbStartSymb = ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
/* Assign interface structure */
for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
{
- ssbInfo.ssbIdx = idx;
- ssbInfo.fdAlloc.startPrb = ssbStartPrb;
- ssbInfo.fdAlloc.numPrb = SCH_SSB_PRB_DURATION;
- ssbInfo.tdAlloc.startSymb = ssbStartSymb;
- ssbInfo.tdAlloc.numSymb = SCH_SSB_SYMB_DURATION;
+ ssbInfo.ssbIdx = idx;
+ ssbInfo.fdAlloc.startPrb = ssbStartPrb;
+ ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
+ ssbInfo.tdAlloc.startSymb = ssbStartSymb;
+ ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
schDlSlotInfo->ssbInfo[idx] = ssbInfo;
}
schDlSlotInfo->ssbPres = true;
schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
- for(idx=ssbStartSymb; idx<ssbStartSymb+SCH_SSB_SYMB_DURATION; idx++)
+ for(idx=ssbStartSymb; idx<ssbStartSymb+SCH_SSB_NUM_SYMB; idx++)
{
- schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_PRB_DURATION + 1; /* +1 for kSsb */
+ schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_NUM_PRB + 1; /* +1 for kSsb */
}
}
schDlSlotInfo->sib1Pres = true;
for(idx=0; idx<SCH_SYMBOL_PER_SLOT; idx++)
{
- schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_PRB_DURATION + 1 + 10; /* 10 PRBs for sib1 */
+ schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_NUM_PRB + 1 + 10; /* 10 PRBs for sib1 */
}
memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
**/
int schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotIndInfo prachOccasionTimingInfo)
{
+ uint8_t puschScs;
uint8_t numPrachRb = 0;
uint8_t numRa = 0;
uint8_t freqStart = 0;
uint8_t idx = 0;
SchUlSlotInfo *schUlSlotInfo = NULLP;
+ puschScs = cell->cellCfg.schInitialUlBwp.bwp.scs;
schUlSlotInfo = cell->schUlSlotInfo[prachOccasionTimingInfo.slot];
- prachCfgIdx = cell->cellCfg.schRachCfg.prachCfgIdx;
+ prachCfgIdx = cell->cellCfg.schRachCfg.prachCfgIdx;
/* derive the prachCfgIdx table paramters */
x = prachCfgIdxTable[prachCfgIdx][1];
numRa = (cell->cellCfg.schRachCfg.msg1Fdm - 1);
for(idx=0; idx<MAX_RACH_NUM_RB_IDX; idx++)
{
- if(numRbForPrachTable[idx][0] == cell->cellCfg.schRachCfg.rootSeqIdx)
- break;
+ if(numRbForPrachTable[idx][0] == cell->cellCfg.schRachCfg.rootSeqLen)
+ {
+ if(numRbForPrachTable[idx][1] == cell->cellCfg.schRachCfg.prachSubcSpacing)
+ {
+ if(numRbForPrachTable[idx][2] == puschScs)
+ {
+ break;
+ }
+ }
+ }
+
}
+
numPrachRb = numRbForPrachTable[idx][3];
dataType |= SCH_DATATYPE_PRACH;
/* Considering first slot in the frame for PRACH */
DU_LOG("\nSending UL Sch info from SCH to MAC failed");
}
+ memset(cell->schUlSlotInfo[ulTimingInfo.slot], 0, sizeof(SchUlSlotInfo));
+
return ret;
}
uint8_t offset = 0;
uint8_t offsetPointA;
uint8_t FreqDomainResource[6] = {0};
+ uint16_t tbSize = 0;
+ uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */
+ uint8_t mcs = 4; /* MCS fixed to 4 */
SchBwpDlCfg *initialBwp;
PdcchCfg *pdcch = &msg4Alloc->msg4PdcchCfg;
}
/* calculate the PRBs */
- calculatePRB( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+ schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
/* fill BWP */
- bwp->BWPSize = initialBwp->bwp.numPrb;
- bwp->BWPStart = initialBwp->bwp.firstPrb;
- bwp->subcarrierSpacing = initialBwp->bwp.scs;
- bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
+ bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
+ bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
+ bwp->subcarrierSpacing = initialBwp->bwp.scs;
+ bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
/* fill the PDCCH PDU */
pdcch->coreset0Cfg.startSymbolIndex = firstSymbol;
{
pdsch->codeword[cwCount].targetCodeRate = 308;
pdsch->codeword[cwCount].qamModOrder = 2;
- pdsch->codeword[cwCount].mcsIndex = 4; /* mcs configured to 4 */
+ pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
pdsch->codeword[cwCount].rvIndex = 0;
/* 38.214: Table 5.1.3.2-1, divided by 8 to get the value in bytes */
/* TODO : Calculate tbSize based of DL CCCH msg size */
- pdsch->codeword[cwCount].tbSize = 2664/8;
+ tbSize = schCalcTbSize(2664/8); /* send this value to the func in bytes when considering msg4 size */
+ pdsch->codeword[cwCount].tbSize = tbSize;
}
pdsch->dataScramblingId = cell->cellCfg.phyCellId;
pdsch->numLayers = 1;
pdsch->dmrs.scid = 0;
pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
pdsch->dmrs.dmrsPorts = 0;
- pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */
+ pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
/* the RB numbering starts from coreset0, and PDSCH is always above SSB */
- pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION;
- /* formula used for calculation of rbSize, 38.213 section 5.1.3.2 *
- * Ninfo = S . Nre . R . Qm . v *
- * Nre' = Nsc . NsymPdsch - NdmrsSymb - Noh *
- * Nre = min(156,Nre') . nPrb */
- /* TODO : Calculate rbSize based on tbSize calculated */
- pdsch->freqAlloc.rbSize = 34;
- pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */
- pdsch->timeAlloc.startSymbolIndex = 2; /* spec-38.214, Table 5.1.2.1-1 */
- pdsch->timeAlloc.numSymbols = 12;
+ pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB;
+ pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols);
+ pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
+ pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */
+ pdsch->pdschTimeAlloc.timeAlloc.numSymb = 12;
pdsch->beamPdschInfo.numPrgs = 1;
pdsch->beamPdschInfo.prgSize = 1;
pdsch->beamPdschInfo.digBfInterfaces = 0;
if(ret == ROK)
{
/* fill RAR info */
- rarInfo->raRnti = raRnti;
- rarInfo->tcrnti = rachInd->crnti;
- rarInfo->RAPID = rachInd->preambleIdx;
- rarInfo->ta = rachInd->timingAdv;
- rarInfo->msg3StartRb = msg3StartRb;
- rarInfo->msg3NumRb = msg3NumRb;
+ rarInfo->raRnti = raRnti;
+ rarInfo->tcrnti = rachInd->crnti;
+ rarInfo->RAPID = rachInd->preambleIdx;
+ rarInfo->ta = rachInd->timingAdv;
+ rarInfo->msg3FreqAlloc.startPrb = msg3StartRb;
+ rarInfo->msg3FreqAlloc.numPrb = msg3NumRb;
}
return ret;
}
}
/* calculate the PRBs */
- calculatePRB( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+ schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
/* fill BWP */
- bwp->BWPSize = initialBwp->bwp.numPrb;
- bwp->BWPStart = initialBwp->bwp.firstPrb;
- bwp->subcarrierSpacing = initialBwp->bwp.scs;
- bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
+ bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
+ bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
+ bwp->subcarrierSpacing = initialBwp->bwp.scs;
+ bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
/* fill the PDCCH PDU */
pdcch->coreset0Cfg.startSymbolIndex = firstSymbol;
pdsch->dmrs.scid = 0;
pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
pdsch->dmrs.dmrsPorts = 0;
- pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */
- pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
- pdsch->freqAlloc.rbSize = schCalcNumPrb(tbSize,mcs,numPdschSymbols);
- pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */
- pdsch->timeAlloc.startSymbolIndex = initialBwp->pdschCommon.startSymbol;
- pdsch->timeAlloc.numSymbols = initialBwp->pdschCommon.lengthSymbol;
+ pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
+ pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
+ pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols);
+ pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
+ pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.startSymbol;
+ pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.lengthSymbol;
pdsch->beamPdschInfo.numPrgs = 1;
pdsch->beamPdschInfo.prgSize = 1;
pdsch->beamPdschInfo.digBfInterfaces = 0;
{
int ret = ROK;
uint8_t ssb_rep;
- uint16_t sfnSlot = 0;
+ uint16_t slot, sfnSlot = 0;
DlSchedInfo dlSchedInfo;
memset(&dlSchedInfo,0,sizeof(DlSchedInfo));
DlBrdcstAlloc *dlBrdcstAlloc = &dlSchedInfo.brdcstAlloc;
sfnSlot = ((dlSchedInfo.schSlotValue.broadcastTime.sfn * 10) +
dlSchedInfo.schSlotValue.broadcastTime.slot);
+ slot = dlSchedInfo.schSlotValue.currentTime.slot;
+
dlSchedInfo.cellId = cell->cellId;
/* Identify SSB ocassion*/
if(dlBrdcstAlloc->ssbTrans || dlBrdcstAlloc->sib1Trans)
{
dlSchedInfo.isBroadcastPres = true;
- ret = schBroadcastAlloc(cell,dlBrdcstAlloc,dlSchedInfo.schSlotValue.broadcastTime.slot);
+ slot = dlSchedInfo.schSlotValue.broadcastTime.slot;
+ ret = schBroadcastAlloc(cell,dlBrdcstAlloc,slot);
if(ret != ROK)
{
DU_LOG("\nschBroadcastAlloc failed");
/* check for RAR */
if(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo != NULLP)
{
+ slot = dlSchedInfo.schSlotValue.rarTime.slot;
SCH_ALLOC(rarAlloc, sizeof(RarAlloc));
if(!rarAlloc)
{
dlSchedInfo.rarAlloc = rarAlloc;
/* RAR info is copied, this was earlier filled in schProcessRachInd */
- memcpy(&rarAlloc->rarInfo,cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo, \
- sizeof(RarInfo));
+ memcpy(&rarAlloc->rarInfo,cell->schDlSlotInfo[slot]->rarInfo, sizeof(RarInfo));
/* pdcch and pdsch data is filled */
schFillRar(rarAlloc,
- cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo->raRnti,
+ cell->schDlSlotInfo[slot]->rarInfo->raRnti,
cell->cellCfg.phyCellId,
cell->cellCfg.ssbSchCfg.ssbOffsetPointA);
- SCH_FREE(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo,sizeof(RarAlloc));
- cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo = NULLP;
+ SCH_FREE(cell->schDlSlotInfo[slot]->rarInfo,sizeof(RarAlloc));
+ cell->schDlSlotInfo[slot]->rarInfo = NULLP;
}
/* check for MSG4 */
if(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info != NULLP)
{
+ slot = dlSchedInfo.schSlotValue.msg4Time.slot;
SCH_ALLOC(msg4Alloc, sizeof(Msg4Alloc));
if(!msg4Alloc)
{
dlSchedInfo.msg4Alloc = msg4Alloc;
/* Msg4 info is copied, this was earlier filled in macSchDlRlcBoInfo */
- memcpy(&msg4Alloc->msg4Info, cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info, \
+ memcpy(&msg4Alloc->msg4Info, cell->schDlSlotInfo[slot]->msg4Info, \
sizeof(Msg4Info));
/* pdcch and pdsch data is filled */
- schDlRsrcAllocMsg4(msg4Alloc, cell, dlSchedInfo.schSlotValue.msg4Time.slot);
- SCH_FREE(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info, sizeof(Msg4Info));
- cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info = NULL;
+ schDlRsrcAllocMsg4(msg4Alloc, cell, slot);
+ SCH_FREE(cell->schDlSlotInfo[slot]->msg4Info, sizeof(Msg4Info));
+ cell->schDlSlotInfo[slot]->msg4Info = NULL;
}
schUlResAlloc(cell, schInst);
+ memset(cell->schDlSlotInfo[slot], 0, sizeof(SchDlSlotInfo));
+
return ret;
}
/* header files */
#include "sch_utils.h"
+#include "math.h"
/* spec-38.213 Table 13-1 */
int8_t coresetIdxTable[MAX_CORESET_INDEX][4] = {
*
* @details
*
- * Function: calculatePRB
+ * Function: schAllocFreqDomRscType0
*
- * This function does allocation in frequency domain resource. using
- * bitwise operator, the bits are set for the PRBs.
+ * This function does allocation in frequency domain resource.
+ * This is a bitmap defining non-overlapping groups of 6 PRBs in ascending order.
*
* @param[in] startPrb - start PRB from where the freq alloc starts.
* @param[in] prbSize - number of PRBs to be allocted.
* @param[in] freqDomain - 6 bytes of info, each bit represents a group of 6 PRB.
* @return void
**/
-void calculatePRB(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain)
+void schAllocFreqDomRscType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain)
{
uint8_t remBits = prbSize; /* each bit represents 6 PRBs */
uint8_t firstByte = 1;
}
/* functions declarations */
-void calculatePRB(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain);
+void schAllocFreqDomRscType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain);
+uint16_t schCalcTbSize(uint16_t payLoadSize);
+uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols);
extern int8_t coresetIdxTable[MAX_CORESET_INDEX][4];
extern int8_t searchSpaceIdxTable[MAX_SEARCH_SPACE_INDEX][4];
RstSetCfg prachRstSetCfg; /* PRACH restricted set config */
uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
+ uint8_t rootSeqLen; /* Root sequence length */
PrachFdmInfo fdm[8]; /* FDM info */
uint8_t ssbPerRach; /* SSB per RACH occassion */
Bool prachMultCarrBand; /* Multiple carriers in Band */
typedef struct macCellCfg
{
- U16 transId;
- U16 cellId; /* Cell Id */
- U8 numTlv; /* Number of configuration TLVs */
- U8 carrierId; /* Carrired Index */
- U16 phyCellId; /* Physical cell id */
- DuplexMode dupType; /* Duplex type: TDD/FDD */
- CarrierCfg dlCarrCfg; /* DL Carrier configuration */
- CarrierCfg ulCarrCfg; /* UL Carrier configuration */
- Bool freqShft; /* Indicates presence of 7.5kHz frequency shift */
- SsbCfg ssbCfg; /* SSB configuration */
- PrachCfg prachCfg; /* PRACH Configuration */
- TDDCfg tddCfg; /* TDD periodicity and slot configuration */
- RSSIMeasUnit rssiUnit; /* RSSI measurement unit */
- Sib1CellCfg sib1Cfg;
- BwpDlConfig initialDlBwp;
- BwpUlConfig initialUlBwp;
+ U16 transId; /* Trans Id */
+ U16 cellId; /* Cell Id */
+ U8 numTlv; /* Number of configuration TLVs */
+ U8 carrierId; /* Carrired Index */
+ U16 phyCellId; /* Physical cell id */
+ DuplexMode dupType; /* Duplex type: TDD/FDD */
+ CarrierCfg dlCarrCfg; /* DL Carrier configuration */
+ CarrierCfg ulCarrCfg; /* UL Carrier configuration */
+ Bool freqShft; /* Indicates presence of 7.5kHz frequency shift */
+ SsbCfg ssbCfg; /* SSB configuration */
+ PrachCfg prachCfg; /* PRACH Configuration */
+ TDDCfg tddCfg; /* TDD periodicity and slot configuration */
+ RSSIMeasUnit rssiUnit; /* RSSI measurement unit */
+ Sib1CellCfg sib1Cfg; /* SIB1 config */
+ BwpDlConfig initialDlBwp; /* Initial DL BWP */
+ BwpUlConfig initialUlBwp; /* Initial UL BWP */
}MacCellCfg;
typedef struct macCellCfgCfm
RSP_NOK
}schMacRsp;
+typedef struct timeDomainAlloc
+{
+ uint16_t startSymb;
+ uint16_t numSymb;
+}TimeDomainAlloc;
+
+typedef struct freqDomainAlloc
+{
+ uint16_t startPrb;
+ uint16_t numPrb;
+}FreqDomainAlloc;
+
+
typedef struct
{
uint32_t ssbPbchPwr; /* SSB block power */
typedef struct bwpCfg
{
- uint8_t subcarrierSpacing;
- uint8_t cyclicPrefix;
- uint16_t BWPSize;
- uint16_t BWPStart;
+ uint8_t subcarrierSpacing;
+ uint8_t cyclicPrefix;
+ FreqDomainAlloc freqAlloc;
}BwpCfg;
typedef struct prg
typedef struct pdschFreqAlloc
{
- uint8_t resourceAlloc;
+ uint8_t resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- uint16_t rbStart;
- uint16_t rbSize;
+ FreqDomainAlloc freqAlloc;
uint8_t vrbPrbMapping;
} PdschFreqAlloc;
typedef struct pdschTimeAlloc
{
- uint8_t rowIndex;
- uint8_t startSymbolIndex;
- uint8_t numSymbols;
+ uint8_t rowIndex;
+ TimeDomainAlloc timeAlloc;
} PdschTimeAlloc;
typedef struct txPowerPdschInfo
typedef struct pdschCfg
{
- uint16_t pduBitmap;
- uint16_t rnti;
- uint16_t pduIndex;
- uint8_t numCodewords;
- CodewordInfo codeword[MAX_CODEWORDS];
- uint16_t dataScramblingId;
- uint8_t numLayers;
- uint8_t transmissionScheme;
- uint8_t refPoint;
- DmrsInfo dmrs;
- PdschFreqAlloc freqAlloc;
- PdschTimeAlloc timeAlloc;
- BeamformingInfo beamPdschInfo;
+ uint16_t pduBitmap;
+ uint16_t rnti;
+ uint16_t pduIndex;
+ uint8_t numCodewords;
+ CodewordInfo codeword[MAX_CODEWORDS];
+ uint16_t dataScramblingId;
+ uint8_t numLayers;
+ uint8_t transmissionScheme;
+ uint8_t refPoint;
+ DmrsInfo dmrs;
+ PdschFreqAlloc pdschFreqAlloc;
+ PdschTimeAlloc pdschTimeAlloc;
+ BeamformingInfo beamPdschInfo;
TxPowerPdschInfo txPdschPower;
} PdschCfg;
/* SIB1 PDSCH structures end */
typedef struct schRachCfg
{
- uint8_t prachCfgIdx; /* PRACH config idx */
- uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
+ uint8_t prachCfgIdx; /* PRACH config idx */
+ uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
- uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
+ uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
+ uint8_t rootSeqLen; /* root sequence length */
uint16_t rootSeqIdx; /* Root sequence index */
uint8_t numRootSeq; /* Number of root sequences required for FD */
uint16_t k1; /* Frequency Offset for each FD */
- uint8_t ssbPerRach; /* SSB per RACH occassion */
- uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */
- uint8_t raContResTmr; /* RA Contention Resoultion Timer */
- uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
- uint8_t raRspWindow; /* RA Response Window */
+ uint8_t ssbPerRach; /* SSB per RACH occassion */
+ uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */
+ uint8_t raContResTmr; /* RA Contention Resoultion Timer */
+ uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
+ uint8_t raRspWindow; /* RA Response Window */
}SchRachCfg;
typedef struct schBwpParams
{
- uint16_t firstPrb;
- uint16_t numPrb;
- uint8_t scs;
- uint8_t cyclicPrefix;
+ FreqDomainAlloc freqAlloc;
+ uint8_t scs;
+ uint8_t cyclicPrefix;
}SchBwpParams;
typedef struct schCandidatesInfo
typedef struct schCellCfg
{
- uint16_t cellId; /* Cell Id */
- uint16_t phyCellId; /* Physical cell id */
- uint8_t bandwidth; /* Supported B/W */
- DuplexMode dupMode; /* Duplex type: TDD/FDD */
- SchSsbCfg ssbSchCfg; /* SSB config */
- SchSib1Cfg sib1SchCfg; /* SIB1 config */
- SchRachCfg schRachCfg; /* PRACH config */
- SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
- SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */
- uint8_t puschMu; /* PUSCH MU */
+ uint16_t cellId; /* Cell Id */
+ uint16_t phyCellId; /* Physical cell id */
+ uint8_t bandwidth; /* Supported B/W */
+ DuplexMode dupMode; /* Duplex type: TDD/FDD */
+ SchSsbCfg ssbSchCfg; /* SSB config */
+ SchSib1Cfg sib1SchCfg; /* SIB1 config */
+ SchRachCfg schRachCfg; /* PRACH config */
+ SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
+ SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */
+ uint8_t puschMu; /* PUSCH MU */
}SchCellCfg;
typedef struct schCellCfgCfm
schMacRsp rsp;
}SchCellCfgCfm;
-typedef struct timeDomainAlloc
-{
- uint16_t startSymb;
- uint16_t numSymb;
-}TimeDomainAlloc;
-
-typedef struct freqDomainAlloc
-{
- uint16_t startPrb;
- uint16_t numPrb;
-}FreqDomainAlloc;
-
typedef struct ssbInfo
{
- uint8_t ssbIdx; /* SSB Index */
+ uint8_t ssbIdx; /* SSB Index */
TimeDomainAlloc tdAlloc; /* Time domain allocation */
FreqDomainAlloc fdAlloc; /* Freq domain allocation */
}SsbInfo;
typedef struct rarInfo
{
- uint16_t raRnti;
- uint8_t RAPID;
- uint16_t ta;
- uint16_t msg3StartRb;
- uint8_t msg3NumRb;
- uint16_t tcrnti;
- uint8_t rarPdu[8];
- uint8_t rarPduLen;
+ uint16_t raRnti;
+ uint8_t RAPID;
+ uint16_t ta;
+ FreqDomainAlloc msg3FreqAlloc;
+ uint16_t tcrnti;
+ uint8_t rarPdu[8];
+ uint8_t rarPduLen;
}RarInfo;
typedef struct rarAlloc
duCfgParam.macCellCfg.prachCfg.prachRstSetCfg = PRACH_RESTRICTED_SET_CFG;
duCfgParam.macCellCfg.prachCfg.msg1Fdm = NUM_PRACH_FDM;
duCfgParam.macCellCfg.prachCfg.msg1FreqStart = PRACH_FREQ_START;
+ duCfgParam.macCellCfg.prachCfg.rootSeqLen = ROOT_SEQ_LEN;
duCfgParam.macCellCfg.prachCfg.fdm[0].rootSeqIdx = ROOT_SEQ_IDX;
duCfgParam.macCellCfg.prachCfg.fdm[0].numRootSeq = NUM_ROOT_SEQ;
duCfgParam.macCellCfg.prachCfg.fdm[0].k1 = 1;
duCfgParam.macCellCfg.initialUlBwp.puschCommon.lengthSymbol =
PUSCH_LENGTH_SYMBOL;
-
/* This should be calculated based on
(number of mandatory parameters) + (number of otional parameters being filled) */
duCfgParam.macCellCfg.numTlv = 39;
/* MACROS */
#define DU_INST 0
#define DU_ID 1
-#define DU_IP_V4_ADDR "192.168.130.81"
+#define DU_IP_V4_ADDR "10.0.2.20"
#define CU_IP_V4_ADDR "10.0.2.25"
-#define RIC_IP_V4_ADDR "192.168.130.80"
+#define RIC_IP_V4_ADDR "10.0.2.30"
#define DU_PORT 38472
#define CU_PORT 38472
-#define RIC_PORT 36422
+#define RIC_PORT 38482
#define DU_EGTP_PORT 39001
#define CU_EGTP_PORT 39002
#define NR_PCI 1
#define RA_CONT_RES_TIMER 64
#define RA_RSP_WINDOW 180
#define PRACH_RESTRICTED_SET 0 /* Unrestricted */
-
+#define ROOT_SEQ_LEN 139
/* MACRCO Ddefine for PDCCH Configuration */
#define PDCCH_CTRL_RSRC_SET_ZERO 13 /* Control resouce set zero */
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