return ROK;
}
-void fillSib1SchCfg(
+void fillSchSib1Cfg(
Inst schInst,
-Sib1SchCfg *sib1SchCfg,
+SchSib1Cfg *sib1SchCfg,
uint8_t pci,
uint8_t offsetPointA
)
memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg));
/* derive the SIB1 config parameters */
- fillSib1SchCfg(
+ fillSchSib1Cfg(
inst,
&(schCellCfg->sib1SchCfg),
schCellCfg->phyCellId,
U8 zeroCorrZoneCfg; /* Zero correlation zone cofig */
U8 numUnusedRootSeq; /* Number of unused root sequence */
U8 *unsuedRootSeq; /* Unused root sequence per FD */
-}FdmInfo;
+}PrachFdmInfo;
typedef struct prachCfg
{
Bool pres;
+ uint8_t prachCfgIdx; /* PRACH Cfg Index */
PrachSeqLen prachSeqLen; /* RACH Sequence length: Long/short */
- U8 prachSubcSpacing; /* Subcarrier spacing of RACH */
+ uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
RstSetCfg prachRstSetCfg; /* PRACH restricted set config */
- U8 prachFdm; /* PRACH FDM (1,2,4,8) */
- FdmInfo fdm[8];
- U8 ssbPerRach; /* SSB per RACH occassion */
- Bool prachMultCarrBand; /* Multiple carriers in Band */
+ uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
+ uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
+ PrachFdmInfo fdm[8]; /* FDM info */
+ uint8_t ssbPerRach; /* SSB per RACH occassion */
+ Bool prachMultCarrBand; /* Multiple carriers in Band */
+ uint8_t prachRestrictedSet; /* Support for PRACH restricted set */
+ uint8_t raContResTmr; /* RA Contention Resoultion Timer */
+ uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
+ uint8_t raRspWindow; /* RA Response Window */
}PrachCfg;
typedef struct tddCfg
SSBPeriod ssbPeriod; /* SSB Periodicity in msec */
uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
uint32_t nSSBMask[SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
-} SsbSchCfg;
+}SchSsbCfg;
/* SIB1 interface structure */
typedef struct bwpCfg
uint8_t n0;
Sib1PdcchCfg sib1PdcchCfg;
Sib1PdschCfg sib1PdschCfg;
-} Sib1SchCfg;
+}SchSib1Cfg;
+
+typedef struct schRachCfg
+{
+ uint8_t prachCfgIdx; /* PRACH config idx */
+ uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
+ uint8_t prachSeqLen; /* Support for PRACH long/short format */
+ uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
+ uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
+ uint8_t maxPrachOcassionsInSlot; /* Number of PRACH ocassions per slot */
+ uint8_t numPrachFdOccasions; /*Number of PRACH ocassions in freq domain */
+ uint16_t rootSeqIdx; /* Root sequence index */
+ uint8_t numRootSeq; /* Number of root sequences required for FD */
+ uint16_t k1; /* Frequency Offset for each FD */
+ uint8_t ssbPerRach; /* SSB per RACH occassion */
+ uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */
+ uint8_t raContResTmr; /* RA Contention Resoultion Timer */
+ uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
+ uint8_t raRspWindow; /* RA Response Window */
+}SchRachCfg;
typedef struct schCellCfg
{
- U16 cellId; /* Cell Id */
- U16 phyCellId; /* Physical cell id */
- U8 bandwidth; /* Supported B/W */
+ uint16_t cellId; /* Cell Id */
+ uint16_t phyCellId; /* Physical cell id */
+ uint8_t bandwidth; /* Supported B/W */
DuplexMode dupMode; /* Duplex type: TDD/FDD */
- SsbSchCfg ssbSchCfg;
- Sib1SchCfg sib1SchCfg;
+ SchSsbCfg ssbSchCfg; /* SSB config */
+ SchSib1Cfg sib1SchCfg; /* SIB1 config */
+ SchRachCfg schRachCfg; /* PRACH config */
}SchCellCfg;
typedef struct schCellCfgCfm
/* PRACH configuration */
duCfgParam.macCellCfg.prachCfg.pres = TRUE;
+ duCfgParam.macCellCfg.prachCfg.prachCfgIdx = PRACH_CONFIG_IDX;
duCfgParam.macCellCfg.prachCfg.prachSeqLen = PRACH_SEQ_LEN;
duCfgParam.macCellCfg.prachCfg.prachSubcSpacing = PRACH_SUBCARRIER_SPACING;
duCfgParam.macCellCfg.prachCfg.prachRstSetCfg = PRACH_RESTRICTED_SET_CFG;
- duCfgParam.macCellCfg.prachCfg.prachFdm = NUM_PRACH_FDM;
+ duCfgParam.macCellCfg.prachCfg.msg1Fdm = NUM_PRACH_FDM;
+ duCfgParam.macCellCfg.prachCfg.msg1FreqStart = PRACH_FREQ_START;
duCfgParam.macCellCfg.prachCfg.fdm[0].rootSeqIdx = ROOT_SEQ_IDX;
duCfgParam.macCellCfg.prachCfg.fdm[0].numRootSeq = NUM_ROOT_SEQ;
duCfgParam.macCellCfg.prachCfg.fdm[0].k1 = 1;
duCfgParam.macCellCfg.prachCfg.fdm[0].zeroCorrZoneCfg = ZERO_CORRELATION_ZONE_CFG;
duCfgParam.macCellCfg.prachCfg.fdm[0].numUnusedRootSeq = NUM_UNUSED_ROOT_SEQ;
- DU_ALLOC(duCfgParam.macCellCfg.prachCfg.fdm[0].unsuedRootSeq, NUM_UNUSED_ROOT_SEQ * sizeof(U8));
- if(duCfgParam.macCellCfg.prachCfg.fdm[0].unsuedRootSeq == NULLP)
- {
- DU_LOG("\nDU_APP : Memory allocation failed");
- RETVALUE(RFAILED);
- }
- *(duCfgParam.macCellCfg.prachCfg.fdm[0].unsuedRootSeq) = UNUSED_ROOT_SEQ;
+ if(duCfgParam.macCellCfg.prachCfg.fdm[0].numUnusedRootSeq != 0)
+ {
+ DU_ALLOC(duCfgParam.macCellCfg.prachCfg.fdm[0].unsuedRootSeq,
+ NUM_UNUSED_ROOT_SEQ * sizeof(U8));
+ if(duCfgParam.macCellCfg.prachCfg.fdm[0].unsuedRootSeq == NULLP)
+ {
+ DU_LOG("\nDU_APP : Memory allocation failed");
+ RETVALUE(RFAILED);
+ }
+ *(duCfgParam.macCellCfg.prachCfg.fdm[0].unsuedRootSeq) = UNUSED_ROOT_SEQ;
+ }
duCfgParam.macCellCfg.prachCfg.ssbPerRach = SSB_PER_RACH;
duCfgParam.macCellCfg.prachCfg.prachMultCarrBand = PRACH_MULT_CARRIER_BAND;
-
+ duCfgParam.macCellCfg.prachCfg.raContResTmr = RA_CONT_RES_TIMER;
+ duCfgParam.macCellCfg.prachCfg.rsrpThreshSsb = RSRP_THRESHOLD_SSB;
+ duCfgParam.macCellCfg.prachCfg.raRspWindow = RA_RSP_WINDOW;
+ duCfgParam.macCellCfg.prachCfg.prachRestrictedSet = PRACH_RESTRICTED_SET;
/* TDD configuration */
duCfgParam.macCellCfg.tddCfg.pres = TRUE;
duCfgParam.macCellCfg.tddCfg.tddPeriod = TDD_PERIODICITY;
#define BANDWIDTH 20
/* MACRO defines for PRACH Configuration */
-#define PRACH_CONFIG_IDX 147
+#define PRACH_CONFIG_IDX 27
#define PRACH_FREQ_START 0
#define PRACH_SEQ_LEN SHORT_SEQUENCE
#define PRACH_SUBCARRIER_SPACING 1
#define PRACH_RESTRICTED_SET_CFG 0
#define NUM_PRACH_FDM 1
-#define ROOT_SEQ_IDX 0
+#define ROOT_SEQ_IDX 139
#define NUM_ROOT_SEQ 1
#define ZERO_CORRELATION_ZONE_CFG 6
-#define NUM_UNUSED_ROOT_SEQ 1
+#define NUM_UNUSED_ROOT_SEQ 0
#define UNUSED_ROOT_SEQ 1
-#define SSB_PER_RACH 0
+#define SSB_PER_RACH 1
#define PRACH_MULT_CARRIER_BAND FALSE
#define PRACH_PREAMBLE_RCVD_TGT_PWR -74
#define NUM_RA_PREAMBLE 63
#define RSRP_THRESHOLD_SSB 31
#define TDD_PERIODICITY TX_PRDCTY_MS_2P5
#define RSS_MEASUREMENT_UNIT DONT_REPORT_RSSI
+#define RA_CONT_RES_TIMER 64
+#define RA_RSP_WINDOW 180
+#define PRACH_RESTRICTED_SET 0 /* Unrestricted */
/* MACRCO Ddefine for PDCCH Configuration */
typedef struct f1CellInfo
{
NrEcgi nrCgi; /* Cell global Identity */
- uint32_t nrPci; /* Physical Cell Identity */
+ uint32_t nrPci; /* Physical Cell Identity */
Plmn plmn[MAX_PLMN]; /* Available PLMN list */
Plmn extPlmn[MAX_PLMN]; /* Extended available PLMN list */
}F1CellInfo;
typedef struct f1DuCellInfo
{
F1CellInfo cellInfo; /* cell info */
- uint16_t tac; /* tracking area code */
- uint16_t epsTac; /* Configured EPS TAC */
+ uint16_t tac; /* tracking area code */
+ uint16_t epsTac; /* Configured EPS TAC */
NrModeInfo f1Mode; /* NR mode info : FDD/TDD */
- uint8_t measTimeCfg; /* Measurement timing configuration */
+ uint8_t measTimeCfg; /* Measurement timing configuration */
F1CellDir cellDir; /* Cell Direction */
F1CellType cellType; /* Cell Type */
F1BrdcstPlmnInfo brdcstPlmnInfo[MAXBPLMNNRMINUS1]; /* Broadcast PLMN Identity Info List */
typedef struct schedulerCfg
{
- uint8_t numTxAntPorts; /*!< Number of Tx antenna ports */
- uint8_t ulSchdType; /*!< Indicates which UL scheduler to use, range
- * is 0..(number of schedulers - 1) */
- uint8_t dlSchdType; /*!< Indicates which DL scheduler to use, range
- * is 0..(number of schedulers - 1) */
- uint8_t numCells; /*!< Max number of cells */
- uint8_t maxUlUePerTti; /*!< Max number of UE in UL per TTI */
- uint8_t maxDlUePerTti; /*!< Max number of UE in DL per TTI */
+ uint8_t numTxAntPorts; /*!< Number of Tx antenna ports */
+ uint8_t ulSchdType; /*!< Indicates which UL scheduler to use, range
+ * is 0..(number of schedulers - 1) */
+ uint8_t dlSchdType; /*!< Indicates which DL scheduler to use, range
+ * is 0..(number of schedulers - 1) */
+ uint8_t numCells; /*!< Max number of cells */
+ uint8_t maxUlUePerTti; /*!< Max number of UE in UL per TTI */
+ uint8_t maxDlUePerTti; /*!< Max number of UE in DL per TTI */
}SchedulerCfg;
typedef struct mibParams