X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2Fdu_app%2Fdu_cfg.h;h=832ef1df5b817857aa48580be19c182b7de2b121;hb=531da47c7bfb6ce138a454f66eb184729860beef;hp=ff9115893313061ce9a4d4f93620caf73a46a33a;hpb=0bb62f25ad9d8f9ff8724572f96e51a898937f0c;p=o-du%2Fl2.git diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h index ff9115893..832ef1df5 100644 --- a/src/du_app/du_cfg.h +++ b/src/du_app/du_cfg.h @@ -31,17 +31,16 @@ #define DU_IP_V4_ADDR "192.168.130.81" #define CU_IP_V4_ADDR "192.168.130.82" #define RIC_IP_V4_ADDR "192.168.130.80" -#define DU_PORT 38472 -#define CU_PORT 38472 -#define RIC_PORT 36421 + +#define F1_SCTP_PORT 38472 /* As per the spec 38.472, the registered port number for F1AP is 38472 */ +#define E2_SCTP_PORT 36421 #endif -#define DU_EGTP_PORT 39001 -#define CU_EGTP_PORT 39003 +#define F1_EGTP_PORT 2152 /* As per the spec 29.281, the registered port number for GTP-U is 2152 */ #define NR_PCI 1 #define NR_CELL_ID 1 -#define DU_NAME "ORAN_OAM_DU" +#define DU_NAME "ORAN OAM DU" #define CELL_TYPE SMALL //TODO: while testing for TDD, Mu1 and 100 MHz, this flag must be enabled @@ -99,7 +98,11 @@ #define CORESET1_NUM_PRB 24 /* MACRO defines for PRACH Configuration */ +#ifndef NR_TDD +#define PRACH_CONFIG_IDX 16 +#else #define PRACH_CONFIG_IDX 88 +#endif #define PRACH_MAX_PRB 24 /* As per (spec 38.211-Table 6.3.3.2-1), max allocated PRBs can go upto 24 */ #define PRACH_FREQ_START (MAX_NUM_RB - PRACH_MAX_PRB) /* In order to allocate PRACH from end of the resource grid */ #define PRACH_SEQ_LEN SHORT_SEQUENCE @@ -296,6 +299,24 @@ #define DEDICATED_RATIO 10 #define NUM_OF_SUPPORTED_SLICE 2 +#ifdef NR_DRX +/* Macros for Drx configuration */ +#define DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS true +#define DRX_ONDURATION_TIMER_VALUE_IN_SUBMS 32 +#define DRX_ONDURATION_TIMER_VALUE_IN_MS 10 +#define DRX_INACTIVITY_TIMER 2 +#define DRX_HARQ_RTT_TIMER_DL 56 +#define DRX_HARQ_RTT_TIMER_UL 56 +#define DRX_RETRANSMISSION_TIMER_DL 4 +#define DRX_RETRANSMISSION_TIMER_UL 4 +#define DRX_LONG_CYCLE_START_OFFSET_CHOICE 40 +#define DRX_LONG_CYCLE_START_OFFSET_VAL 8 +#define DRX_SHORT_CYCLE_PRESENT true +#define DRX_SHORT_CYCLE 2 +#define DRX_SHORT_CYCLE_TIMER 2 +#define DRX_SLOT_OFFSET 0 +#endif + typedef enum { GNBDU, @@ -1224,29 +1245,6 @@ typedef struct sib1Params SrvCellCfgCommSib srvCellCfgCommSib; }Sib1Params; -typedef struct policyMemberList -{ - Plmn plmn; - Snssai snssai; -}PolicyMemberList; - -typedef struct rrmPolicy -{ - ResourceType rsrcType; - uint8_t numMemberList; - PolicyMemberList **memberList; - uint8_t policyMaxRatio; - uint8_t policyMinRatio; - uint8_t policyDedicatedRatio; -}RrmPolicy; - -typedef struct copyOfRecvdSliceCfg -{ - RrmPolicy **rrmPolicy; - uint8_t totalRrmPolicy; - uint8_t totalSliceCount; -}CopyOfRecvdSliceCfg; - typedef struct duCfgParams { SctpParams sctpParams; /* SCTP Params */ @@ -1260,7 +1258,7 @@ typedef struct duCfgParams MacCellCfg macCellCfg; /* MAC cell configuration */ MibParams mibParams; /* MIB Params */ Sib1Params sib1Params; /* SIB1 Params */ - CopyOfRecvdSliceCfg tempSliceCfg; + MacSliceCfgReq tempSliceCfg; }DuCfgParams; typedef struct f1SetupMsg @@ -1312,7 +1310,7 @@ uint8_t readClCfg(); uint8_t readCfg(); uint8_t duReadCfg(); uint16_t calcSliv(uint8_t startSymbol, uint8_t lengthSymbol); -uint8_t cpyRrmPolicyInDuCfgParams(RrmPolicyList rrmPolicy[], uint8_t policyNum, CopyOfRecvdSliceCfg *tempSliceCfg); +uint8_t cpyRrmPolicyInDuCfgParams(RrmPolicyList rrmPolicy[], uint8_t policyNum, MacSliceCfgReq *tempSliceCfg); #endif /* __DU_CONFIG_H__ */