X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2Fdu_app%2Fdu_cfg.h;h=056c804b450d9e7f72f9f5d5b1c1ebef6a2d54a0;hb=3330932565e15a749fd5dd5039cdea2862ca51cc;hp=f896046b8a748ebe889c00bfc1a1e2b4fe667483;hpb=438594773b3c93b5bbe8d1cb1d16626a02238b8b;p=o-du%2Fl2.git

diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h
index f896046b8..056c804b4 100644
--- a/src/du_app/du_cfg.h
+++ b/src/du_app/du_cfg.h
@@ -30,22 +30,30 @@
 #define RIC_IP_V4_ADDR "192.168.130.80"
 #define DU_PORT 38472
 #define CU_PORT 38472
-#define RIC_PORT 36422         /* using X2 port since E2 port not defined  */
-
+#define RIC_PORT 36421
 #endif
 
 #define DU_EGTP_PORT  39001
 #define CU_EGTP_PORT  39002
 #define NR_PCI 1
 #define NR_CELL_ID 1
-#define NR_NUMEROLOGY 0
 
 #define DU_NAME "ORAN_OAM_DU"
 #define CELL_TYPE SMALL
-#define DUPLEX_MODE DUP_MODE_FDD
 
+//TODO: while testing for TDD, Mu1 and 100 MHz, this flag must be enabled
 #ifdef NR_TDD
 #define DUPLEX_MODE DUP_MODE_TDD
+#define NR_NUMEROLOGY 1
+#define NR_DL_ARFCN 623400
+#define NR_UL_ARFCN 623400
+#define NR_FREQ_BAND 78
+#else
+#define DUPLEX_MODE DUP_MODE_FDD
+#define NR_NUMEROLOGY 0
+#define NR_DL_ARFCN 428000
+#define NR_UL_ARFCN 390000
+#define NR_FREQ_BAND 1
 #endif
 
 #define DU_TAC 1
@@ -58,13 +66,11 @@
 #define PLMN_SIZE 3
 
 /* Spec 30.104 Table 5.4.2.3-1:Applicable NR-ARFCN per operating band in FR1 */
-#define NR_DL_ARFCN 428000
-#define NR_UL_ARFCN 390000
 #define SUL_ARFCN 100
-#define NR_FREQ_BAND 1
-#define NR_FREQ_BAND_IND 1
 #define SUL_BAND 2
 
+
+
 #define TIME_CFG 0
 #define CARRIER_IDX 1
 #define NUM_TX_ANT 2
@@ -72,7 +78,6 @@
 #define FREQ_SHIFT_7P5KHZ FALSE
 #define SSB_PBCH_PWR 0
 #define BCH_PAYLOAD PHY_GEN_TIMING_PBCH_BIT
-#define SUBCARRIER_SPACING 0
 #define NORMAL_CYCLIC_PREFIX 0
 #define OFFSET_TO_POINT_A 24                     /* PRB Offset to Point A */
 #define BETA_PSS BETA_PSS_0DB  
@@ -228,7 +233,7 @@
 /* Macro definitions for MIB/SIB1 */
 #define SYS_FRAME_NUM 0
 #define SPARE 0
-#define SSB_SC_OFFSET 8
+#define SSB_SC_OFFSET 0
 #define DU_RANAC 1
 #define CELL_IDENTITY 32
 
@@ -255,8 +260,10 @@
 #define POLL_BYTE_VAL -1          /* Value for infinite poll byte */
 #define MAX_RETX_THRESHOLD 5      /* Enum for 8 retransmissions */
 #define MAX_RETX_THRESHOLD_VAL 8  /* Value for 8 retransmissions */
-#define T_REASSEMBLY 8
-#define T_STATUS_PROHIBHIT 7
+#define T_REASSEMBLY 8 /* enum for RE_ASM_40MS  */
+#define T_REASSEMBLY_VAL 40 /* default re assembly timer */
+#define T_STATUS_PROHIBHIT 7 /* enum for PROH_35MS */
+#define T_STATUS_PROHIBHIT_VAL 35 /* default status prohibit timer */
 #define MAC_LC_PRIORITY 1
 #define PRIORTISIED_BIT_RATE 15
 #define BUCKET_SIZE_DURATION 5