X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2Fcm%2Fmac_sch_interface.h;h=e3efb1c105655a377f7b4267736494cda740e8c0;hb=12da8be0c4941e107b9ff0d18ce5b6eb7f5f7d20;hp=e3e38253863b07f551cda9dc6528ade3c623a6cb;hpb=53088c437fc01fb772f221e228ba7475fb5131d5;p=o-du%2Fl2.git diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h index e3e382538..e3efb1c10 100644 --- a/src/cm/mac_sch_interface.h +++ b/src/cm/mac_sch_interface.h @@ -17,34 +17,41 @@ *******************************************************************************/ /* events */ -#define EVENT_SCH_CELL_CFG 1 -#define EVENT_SCH_CELL_CFG_CFM 2 -#define EVENT_DL_ALLOC 3 -#define EVENT_UL_SCH_INFO 4 -#define EVENT_RACH_IND_TO_SCH 5 -#define EVENT_CRC_IND_TO_SCH 6 -#define EVENT_DL_RLC_BO_INFO_TO_SCH 7 -#define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 8 -#define EVENT_UE_CONFIG_RSP_TO_MAC 9 -#define EVENT_SLOT_IND_TO_SCH 10 -#define EVENT_SHORT_BSR 11 -#define EVENT_UCI_IND_TO_SCH 12 -#define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 13 -#define EVENT_UE_RECONFIG_RSP_TO_MAC 14 -#define EVENT_UE_DELETE_REQ_TO_SCH 15 -#define EVENT_UE_DELETE_RSP_TO_MAC 16 - +#define EVENT_SCH_GEN_CFG 1 +#define EVENT_SCH_CELL_CFG 2 +#define EVENT_SCH_CELL_CFG_CFM 3 +#define EVENT_DL_SCH_INFO 4 +#define EVENT_UL_SCH_INFO 5 +#define EVENT_RACH_IND_TO_SCH 6 +#define EVENT_CRC_IND_TO_SCH 7 +#define EVENT_DL_RLC_BO_INFO_TO_SCH 8 +#define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 9 +#define EVENT_UE_CONFIG_RSP_TO_MAC 10 +#define EVENT_SLOT_IND_TO_SCH 11 +#define EVENT_SHORT_BSR 12 +#define EVENT_UCI_IND_TO_SCH 13 +#define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 14 +#define EVENT_UE_RECONFIG_RSP_TO_MAC 15 +#define EVENT_UE_DELETE_REQ_TO_SCH 16 +#define EVENT_UE_DELETE_RSP_TO_MAC 17 +#define EVENT_CELL_DELETE_REQ_TO_SCH 18 +#define EVENT_CELL_DELETE_RSP_TO_MAC 19 +#define EVENT_LONG_BSR 20 +#define EVENT_SLICE_CFG_REQ_TO_SCH 21 +#define EVENT_SLICE_CFG_RSP_TO_MAC 22 +#define EVENT_SLICE_RECFG_REQ_TO_SCH 23 +#define EVENT_SLICE_RECFG_RSP_TO_MAC 24 +#define EVENT_RACH_RESOURCE_REQUEST_TO_SCH 25 +#define EVENT_RACH_RESOURCE_RESPONSE_TO_MAC 26 +#define EVENT_RACH_RESOURCE_RELEASE_TO_SCH 27 +#define EVENT_PAGING_IND_TO_SCH 28 +#define EVENT_DL_PAGING_ALLOC 29 +#define EVENT_DL_REL_HQ_PROC 30 +#define EVENT_DL_HARQ_IND_TO_SCH 31 /*macros*/ -#define NO_SSB 0 -#define SSB_TRANSMISSION 1 -#define SSB_REPEAT 2 #define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */ #define SCH_SSB_MASK_SIZE 1 -#define NO_SIB1 0 -#define SIB1_TRANSMISSION 1 -#define SIB1_REPITITION 2 - #define MAX_NUM_PRG 1 /* max value should be later 275 */ #define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */ #define MAX_CODEWORDS 1 /* max should be 2 */ @@ -61,14 +68,8 @@ #define MAX_NUMBER_OF_CRC_IND_BITS 1 #define MAX_NUMBER_OF_UCI_IND_BITS 1 #define MAX_SR_BITS_IN_BYTES 1 +#define MAX_HARQ_BITS_IN_BYTES 1 #define MAX_NUM_LOGICAL_CHANNEL_GROUPS 8 -/* can we have a common numslot numscs between mac sch */ -#ifdef NR_TDD -#define MAX_SLOTS 20 -#else -#define MAX_SLOTS 10 -#endif -#define MAX_SFN 1024 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */ #define MAX_NUM_TAGS 4 /* Max number of timing advance groups */ #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */ @@ -87,11 +88,30 @@ #define MAX_NUM_PUCCH_P0_PER_SET 8 #define MAX_NUM_PATH_LOSS_REF_RS 4 #define MAX_NUM_DL_DATA_TO_UL_ACK 15 -#define SD_SIZE 3 - -#define ADD_DELTA_TO_TIME(crntTime, toFill, incr) \ +#define QPSK_MODULATION 2 + +#define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */ +#define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */ +#define UL_TX_BUFFER_SIZE 5 + +#define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/ +#define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */ +#define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */ +#define MIN_NUM_K1_IDX 4 /* Min K1 values */ +#define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */ +#define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */ +/* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */ +#define DEFAULT_K2_VALUE_FOR_SCS15 1 +#define DEFAULT_K2_VALUE_FOR_SCS30 1 +#define DEFAULT_K2_VALUE_FOR_SCS60 2 +#define DEFAULT_K2_VALUE_FOR_SCS120 3 + +#define MAX_PLMN 2 +#define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ + +#define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \ { \ - if ((crntTime.slot + incr) > (MAX_SLOTS - 1)) \ + if ((crntTime.slot + incr) > (numOfSlot - 1)) \ { \ toFill.sfn = (crntTime.sfn + 1); \ } \ @@ -99,13 +119,33 @@ { \ toFill.sfn = crntTime.sfn; \ } \ - toFill.slot = (crntTime.slot + incr) % MAX_SLOTS; \ + toFill.slot = (crntTime.slot + incr) % numOfSlot; \ if (toFill.sfn >= MAX_SFN) \ { \ toFill.sfn%=MAX_SFN; \ } \ } +typedef enum +{ + PRB_RSRC, + DRB_RSRC, + RRC_CONNECTED_USERS_RSRC +}SchResourceType; + +typedef enum +{ + SLICE_FOUND, + SLICE_NOT_FOUND +}RspCause; + +typedef enum +{ + NO_TRANSMISSION, + NEW_TRANSMISSION, + REPEATITION +}PduTxOccsaion; + typedef enum { UNSPECIFIED_CAUSE, @@ -130,7 +170,7 @@ typedef enum { NOT_APPLICABLE, INVALID_CELLID, - INVALID_UEIDX + INVALID_UEID }ErrorCause; typedef enum @@ -383,6 +423,21 @@ typedef enum SCH_MCS_TABLE_QAM_64_LOW_SE }SchMcsTable; +typedef enum +{ + NONE, + PDCCH_PDU, + PDSCH_PDU, + BOTH +}DlPduType; + +typedef enum +{ + DATA_TRANSMISSION_ALLOWED, + STOP_DATA_TRANSMISSION, + RESTART_DATA_TRANSMISSION +}SchDataTransmission; + /*structures*/ typedef struct timeDomainAlloc { @@ -390,28 +445,25 @@ typedef struct timeDomainAlloc uint16_t numSymb; }TimeDomainAlloc; -typedef struct freqDomainAlloc +typedef struct resAllocType0 +{ + uint8_t rbBitmap[36]; +}ResAllocType0; + +typedef struct resAllocType1 { uint16_t startPrb; uint16_t numPrb; -}FreqDomainAlloc; - +}ResAllocType1; -typedef struct -{ - uint32_t ssbPbchPwr; /* SSB block power */ - uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/ - uint8_t ssbOffsetPointA; /* SSB sub carrier offset from point A */ - SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */ - uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */ - uint32_t nSSBMask[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */ -}SchSsbCfg; +typedef struct resAllocType1 FreqDomainRsrc; +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */ typedef struct bwpCfg { uint8_t subcarrierSpacing; uint8_t cyclicPrefix; - FreqDomainAlloc freqAlloc; + FreqDomainRsrc freqAlloc; }BwpCfg; typedef struct prg @@ -457,14 +509,17 @@ typedef struct pdschFreqAlloc { uint8_t resourceAllocType; /* since we are using type-1, rbBitmap excluded */ - FreqDomainAlloc freqAlloc; + uint8_t rbBitmap[36]; + uint16_t startPrb; + uint16_t numPrb; uint8_t vrbPrbMapping; -} PdschFreqAlloc; +}PdschFreqAlloc; typedef struct pdschTimeAlloc { - uint8_t rowIndex; - TimeDomainAlloc timeAlloc; + uint8_t rowIndex; + uint16_t startSymb; + uint16_t numSymb; } PdschTimeAlloc; typedef struct txPowerPdschInfo @@ -473,6 +528,7 @@ typedef struct txPowerPdschInfo uint8_t powerControlOffsetSS; } TxPowerPdschInfo; +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */ typedef struct pdschCfg { uint16_t pduBitmap; @@ -494,6 +550,7 @@ typedef struct pdschCfg /* SIB1 interface structure */ +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */ typedef struct coresetCfg { uint8_t coreSetSize; @@ -503,8 +560,9 @@ typedef struct coresetCfg uint8_t cceRegMappingType; uint8_t regBundleSize; uint8_t interleaverSize; - uint8_t coreSetType; uint16_t shiftIndex; + uint8_t coreSetType; + uint8_t coresetPoolIndex; uint8_t precoderGranularity; uint8_t cceIndex; uint8_t aggregationLevel; @@ -512,10 +570,11 @@ typedef struct coresetCfg typedef struct txPowerPdcchInfo { - uint8_t powerValue; + uint8_t beta_pdcch_1_0; uint8_t powerControlOffsetSS; -} TxPowerPdcchInfo; +}TxPowerPdcchInfo; +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */ typedef struct dlDCI { uint16_t rnti; @@ -525,55 +584,60 @@ typedef struct dlDCI uint8_t aggregLevel; BeamformingInfo beamPdcchInfo; TxPowerPdcchInfo txPdcchPower; - PdschCfg *pdschCfg; -} DlDCI; + PdschCfg pdschCfg; +}DlDCI; typedef struct pdcchCfg { /* coreset-0 configuration */ CoresetCfg coresetCfg; - - uint16_t numDlDci; - DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */ + uint16_t numDlDci; + DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */ } PdcchCfg; /* end of SIB1 PDCCH structures */ -typedef struct +typedef struct schPcchCfg +{ + uint8_t numPO; /*Derived from Ns*/ + bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/ + uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/ +}SchPcchCfg; + +typedef struct schPdcchConfigSib1 { - /* parameters recieved from DU-APP */ - uint16_t sib1PduLen; - uint16_t sib1RepetitionPeriod; uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */ uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */ - uint16_t sib1Mcs; +}SchPdcchConfigSib1; - /* parameters derived in scheduler */ - uint8_t n0; - BwpCfg bwp; - PdcchCfg sib1PdcchCfg; - PdschCfg sib1PdschCfg; -}SchSib1Cfg; - -typedef struct schRachCfg +typedef struct schRachCfgGeneric { uint8_t prachCfgIdx; /* PRACH config idx */ - uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */ - uint16_t msg1FreqStart; /* Msg1-FrequencyStart */ uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */ - uint8_t rootSeqLen; /* root sequence length */ - uint16_t rootSeqIdx; /* Root sequence index */ - uint8_t numRootSeq; /* Number of root sequences required for FD */ - uint16_t k1; /* Frequency Offset for each FD */ + uint16_t msg1FreqStart; /* Msg1-FrequencyStart */ + uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */ + int16_t preambleRcvdTargetPower; + uint8_t preambleTransMax; + uint8_t pwrRampingStep; + uint8_t raRspWindow; /* RA Response Window */ +}SchRachCfgGeneric; + +typedef struct schRachCfg +{ + SchRachCfgGeneric prachCfgGeneric; + uint8_t totalNumRaPreamble; /* Total number of RA preambles */ uint8_t ssbPerRach; /* SSB per RACH occassion */ - uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */ + uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */ uint8_t raContResTmr; /* RA Contention Resoultion Timer */ uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */ - uint8_t raRspWindow; /* RA Response Window */ + uint16_t rootSeqIdx; /* Root sequence index */ + uint16_t rootSeqLen; /* root sequence length */ + uint8_t numRootSeq; /* Number of root sequences required for FD */ + uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */ }SchRachCfg; typedef struct schBwpParams { - FreqDomainAlloc freqAlloc; + FreqDomainRsrc freqAlloc; uint8_t scs; uint8_t cyclicPrefix; }SchBwpParams; @@ -589,8 +653,9 @@ typedef struct schCandidatesInfo typedef struct schSearchSpaceCfg { - uint8_t searchSpaceId; - uint8_t coresetId; + uint8_t searchSpaceId; + uint8_t coresetId; + uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */ uint16_t monitoringSlot; uint16_t duration; uint16_t monitoringSymbol; @@ -603,12 +668,18 @@ typedef struct schPdcchCfgCmn uint8_t raSearchSpaceId; }SchPdcchCfgCmn; -typedef struct schPdschCfgCmn +typedef struct schPdschCfgCmnTimeDomRsrcAlloc { uint8_t k0; uint8_t mappingType; uint8_t startSymbol; uint8_t lengthSymbol; +}SchPdschCfgCmnTimeDomRsrcAlloc; + +typedef struct schPdschCfgCmn +{ + uint8_t numTimeDomAlloc; + SchPdschCfgCmnTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC]; }SchPdschCfgCmn; typedef struct schPucchCfgCmn @@ -617,14 +688,45 @@ typedef struct schPucchCfgCmn uint8_t pucchGroupHopping; }SchPucchCfgCmn; +/* PUSCH Time Domain Resource Allocation */ +typedef struct schPuschTimeDomRsrcAlloc +{ + uint8_t k2; + SchTimeDomRsrcAllocMappingType mappingType; + uint8_t startSymbol; + uint8_t symbolLength; +}SchPuschTimeDomRsrcAlloc; + typedef struct schPuschCfgCmn { - uint8_t k2; - uint8_t mappingType; - uint8_t startSymbol; - uint8_t lengthSymbol; + uint8_t numTimeDomRsrcAlloc; + SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */ }SchPuschCfgCmn; +typedef struct schK1TimingInfo +{ + uint8_t numK1; + uint8_t k1Indexes[MAX_NUM_K1_IDX]; +}SchK1TimingInfo; + +typedef struct schK0TimingInfo +{ + uint8_t k0Index; + SchK1TimingInfo k1TimingInfo; +}SchK0TimingInfo; + +typedef struct schK0K1TimingInfo +{ + uint8_t numK0; + SchK0TimingInfo k0Indexes[MAX_NUM_K0_IDX]; +}SchK0K1TimingInfo; + +typedef struct schK0K1TimingInfoTbl +{ + uint16_t tblSize; + SchK0K1TimingInfo k0k1TimingInfo[MAX_NUM_CONFIG_SLOTS]; +}SchK0K1TimingInfoTbl; + typedef struct schBwpDlCfg { SchBwpParams bwp; @@ -632,51 +734,187 @@ typedef struct schBwpDlCfg SchPdschCfgCmn pdschCommon; }SchBwpDlCfg; +typedef struct schK2TimingInfo +{ + uint8_t numK2; + uint8_t k2Indexes[MAX_NUM_K2_IDX]; +}SchK2TimingInfo; + +typedef struct schK2TimingInfoTbl +{ + uint16_t tblSize; + SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS]; +}SchK2TimingInfoTbl; + typedef struct schBwpUlCfg { SchBwpParams bwp; + SchRachCfg schRachCfg; /* PRACH config */ SchPucchCfgCmn pucchCommon; SchPuschCfgCmn puschCommon; }SchBwpUlCfg; +typedef struct schPlmnInfoList +{ + Plmn plmn; + uint8_t numSliceSupport; /* Total slice supporting */ + Snssai **snssai; /* List of supporting snssai*/ +}SchPlmnInfoList; + +#ifdef NR_DRX +/* The following list of structures is taken from the DRX-Config section of specification 33.331. */ + +typedef struct schDrxOnDurationTimer +{ + bool onDurationTimerValInMs; + union + { + uint8_t subMilliSeconds; + uint16_t milliSeconds; + }onDurationtimerValue; +}SchDrxOnDurationTimer; + +typedef struct schDrxLongCycleStartOffset +{ + uint16_t drxLongCycleStartOffsetChoice; + uint16_t drxLongCycleStartOffsetVal; +}SchDrxLongCycleStartOffset; + +typedef struct schShortDrx +{ + uint16_t drxShortCycle; + uint8_t drxShortCycleTimer; +}SchShortDrx; + +typedef struct schDrxCfg +{ + SchDrxOnDurationTimer drxOnDurationTimer; + uint16_t drxInactivityTimer; + uint8_t drxHarqRttTimerDl; + uint8_t drxHarqRttTimerUl; + uint16_t drxRetransmissionTimerDl; + uint16_t drxRetransmissionTimerUl; + SchDrxLongCycleStartOffset drxLongCycleStartOffset; + bool shortDrxPres; + SchShortDrx shortDrx; + uint8_t drxSlotOffset; +}SchDrxCfg; +#endif + +/*Spec 38.331 'NrNsPmaxList'*/ +typedef struct schNrNsPmaxList +{ + long additionalPMax; + long additionalSpectrumEmission; +}SchNrNsPmaxList; + +/*Spec 38.331 'FrequencyInfoDL-SIB'*/ +typedef struct schMultiFreqBandListSib +{ + long freqBandIndNr; + SchNrNsPmaxList nrNsPmaxList[1]; +}SchMultiFreqBandListSib; + +/*Spec 38.331 'SCS-SpecificCarrier'*/ +typedef struct schScsSpecificCarrier +{ + uint16_t offsetToCarrier; + uint8_t subCarrierSpacing; + uint16_t carrierBw; + uint16_t txDirectCurrentLoc; +}SchScsSpecificCarrier; + +/*Spec 38.331 'FrequencyInfoDL-SIB'*/ +typedef struct schFreqInfoDlSib +{ + SchMultiFreqBandListSib mutiFreqBandList[1]; + uint16_t offsetToPointA; + SchScsSpecificCarrier schSpcCarrier[1]; +}SchFreqInfoDlSib; + +typedef struct schBcchCfg +{ + long modPeriodCoeff; +}SchBcchCfg; + +/*Spec 38.331 'DownlinkConfigCommonSIB'*/ +typedef struct schDlCfgCommon +{ + SchFreqInfoDlSib schFreqInfoDlSib; + SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */ + SchBcchCfg schBcchCfg; + SchPcchCfg schPcchCfg; +}SchDlCfgCommon; + +/*Spec 38.331 'FrequencyInfoUL-SIB'*/ +typedef struct schFreqInfoUlSib +{ + SchMultiFreqBandListSib mutiFreqBandList[1]; + uint16_t absoluteFreqPointA; + SchScsSpecificCarrier schSpcCarrier[1]; + int8_t schPMax; + bool frequencyShift7p5khz; +}SchFreqInfoUlSib; + +/*Spec 38.331 'UplinkConfigCommonSIB '*/ +typedef struct schUlCfgCommon +{ + SchFreqInfoUlSib schFreqInfoUlSib; + SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */ + uint16_t schTimeAlignTimer; +}SchUlCfgCommon; + +/*Ref: ORAN_WG8.V7.0.0 Sec 11.2.3.2.1*/ typedef struct schCellCfg { - uint16_t cellId; /* Cell Id */ - uint16_t phyCellId; /* Physical cell id */ - uint8_t numerology; /* Supported numerology */ - SchDuplexMode dupMode; /* Duplex type: TDD/FDD */ - uint8_t bandwidth; /* Supported B/W */ - uint32_t dlFreq; /* DL Frequency */ - uint32_t ulFreq; /* UL Frequency */ - SchSsbCfg ssbSchCfg; /* SSB config */ - SchSib1Cfg sib1SchCfg; /* SIB1 config */ - SchRachCfg schRachCfg; /* PRACH config */ - SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */ - SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */ + uint16_t cellId; /* Cell Id */ + uint8_t numOfBeams; + uint8_t numLayers; + uint8_t numAntPorts; + uint16_t phyCellId; /* Physical cell id */ + SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */ + SchDuplexMode dupMode; /* Duplex type: TDD/FDD */ + uint8_t numerology; /* Supported numerology */ + uint8_t dlBandwidth; /* Supported B/W */ + uint8_t ulBandwidth; /* Supported B/W */ + SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/ + SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/ #ifdef NR_TDD - TDDCfg tddCfg; /* TDD Cfg */ -#endif + TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */ +#endif + + /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted + *value 1 => corresponding SS/PBCH block is transmitted*/ + uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */ + SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */ + uint32_t ssbFrequency; /* SB frequency in kHz*/ + uint8_t dmrsTypeAPos; + uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/ + SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/ + uint32_t ssbPbchPwr; /* SSB block power */ + uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */ + uint16_t sib1PduLen; }SchCellCfg; typedef struct schCellCfgCfm { uint16_t cellId; /* Cell Id */ - SchMacRsp rsp; + SchMacRsp rsp; + SchFailureCause cause; }SchCellCfgCfm; typedef struct ssbInfo { uint8_t ssbIdx; /* SSB Index */ - TimeDomainAlloc tdAlloc; /* Time domain allocation */ - FreqDomainAlloc fdAlloc; /* Freq domain allocation */ + TimeDomainAlloc tdAlloc; /* Time domain allocation */ + FreqDomainRsrc fdAlloc; /* Freq domain allocation */ }SsbInfo; typedef struct sib1AllocInfo { BwpCfg bwp; - PdcchCfg sib1PdcchCfg; - PdschCfg sib1PdschCfg; -} Sib1AllocInfo; + PdcchCfg *sib1PdcchCfg; +}Sib1AllocInfo; typedef struct prachSchInfo { @@ -684,142 +922,195 @@ typedef struct prachSchInfo uint8_t prachFormat; /* PRACH Format */ uint8_t numRa; /* Freq domain ocassion */ uint8_t prachStartSymb; /* Freq domain ocassion */ -}PrachSchInfo; +}SchPrachInfo; /* Interface structure signifying DL broadcast allocation for SSB, SIB1 */ typedef struct dlBrdcstAlloc { + uint16_t crnti; /* SI-RNTI */ /* Ssb transmission is determined as follows: * 0 : No tranamission * 1 : SSB Transmission * 2 : SSB Repetition */ - uint8_t ssbTrans; + uint8_t ssbTransmissionMode; uint8_t ssbIdxSupported; SsbInfo ssbInfo[MAX_SSB_IDX]; + bool systemInfoIndicator; + uint8_t *siContent; /* Sib1 transmission is determined as follows: * 0 : No tranamission * 1 : SIB1 Transmission * 2 : SIB1 Repetition */ - uint8_t sib1Trans; + uint8_t sib1TransmissionMode; Sib1AllocInfo sib1Alloc; }DlBrdcstAlloc; +typedef struct msg3UlGrant +{ + uint8_t freqHopFlag; + uint16_t bwpSize; + FreqDomainRsrc msg3FreqAlloc; + uint8_t k2Index; + uint8_t mcs; + uint8_t tpc; + uint8_t csiReq; +}Msg3UlGrant; + typedef struct rarInfo { - uint16_t raRnti; uint8_t RAPID; uint16_t ta; - FreqDomainAlloc msg3FreqAlloc; + Msg3UlGrant ulGrant; uint16_t tcrnti; - uint8_t rarPdu[8]; + uint8_t rarPdu[RAR_PAYLOAD_SIZE]; uint8_t rarPduLen; }RarInfo; typedef struct rarAlloc { - RarInfo rarInfo; - BwpCfg bwp; - PdcchCfg rarPdcchCfg; - PdschCfg rarPdschCfg; + uint16_t raRnti; + RarInfo rarInfo; + BwpCfg bwp; + PdcchCfg *rarPdcchCfg; + PdschCfg *rarPdschCfg; }RarAlloc; -typedef struct dlMsgInfo -{ - uint16_t crnti; - uint8_t ndi; - uint8_t harqProcNum; - uint8_t dlAssignIdx; - uint8_t pucchTpc; - uint8_t pucchResInd; - uint8_t harqFeedbackInd; - uint8_t dciFormatId; - bool isMsg4Pdu; - uint16_t dlMsgPduLen; - uint8_t *dlMsgPdu; -}DlMsgInfo; - typedef struct lcSchInfo { uint8_t lcId; - uint32_t schBytes; /* Number of scheduled bytes */ + uint32_t schBytes; }LcSchInfo; -typedef struct dlMsgAlloc +typedef struct ceSchInfo { - uint16_t crnti; + uint8_t ceLcId; + uint8_t *ceContent; +}CeSchInfo; + +typedef struct freqDomainAlloc +{ + uint8_t resAllocType; /* Resource allocation type */ + union + { + ResAllocType0 type0; + ResAllocType1 type1; + }resAlloc; +}FreqDomainAlloc; + +typedef struct transportBlock +{ + uint8_t mcs; + bool ndi; + uint8_t rv; + uint16_t tbSize; + uint8_t numCe; + CeSchInfo ceSchInfo[MAX_NUM_LC]; uint8_t numLc; - LcSchInfo lcSchInfo[MAX_NUM_LC]; /* Scheduled LC info */ - BwpCfg bwp; - PdcchCfg dlMsgPdcchCfg; - PdschCfg dlMsgPdschCfg; - DlMsgInfo dlMsgInfo; -}DlMsgAlloc; + LcSchInfo lcSchInfo[MAX_NUM_LC]; +}TransportBlock; + +typedef struct dlMsgSchedInfo +{ + uint16_t crnti; + uint8_t dciFormatId; + uint8_t harqProcNum; + bool vrbPrbMapping; + uint8_t dlAssignIdx; + uint8_t pucchTpc; + uint8_t pucchResInd; + uint8_t harqFeedbackInd; + uint16_t dlMsgPduLen; + uint8_t *dlMsgPdu; + FreqDomainAlloc freqAlloc; + TimeDomainAlloc timeAlloc; + uint8_t numOfTbs; + TransportBlock transportBlock[2]; + BwpCfg bwp; + PdcchCfg *dlMsgPdcchCfg; + PdschCfg *dlMsgPdschCfg; +}DlMsgSchInfo; typedef struct schSlotValue { - SlotIndInfo currentTime; - SlotIndInfo broadcastTime; - SlotIndInfo rarTime; - SlotIndInfo dlMsgTime; - SlotIndInfo ulDciTime; + SlotTimingInfo currentTime; + SlotTimingInfo broadcastTime; + SlotTimingInfo rarTime; + SlotTimingInfo dlMsgTime; + SlotTimingInfo ulDciTime; }SchSlotValue; + +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */ typedef struct format0_0 { uint8_t resourceAllocType; - /* since we are using type-1, hence rbBitmap excluded */ FreqDomainAlloc freqAlloc; TimeDomainAlloc timeAlloc; uint16_t rowIndex; uint8_t mcs; - uint8_t harqProcId; /* HARQ Process ID */ - bool puschHopFlag; + uint8_t harqProcId; bool freqHopFlag; - uint8_t ndi; /* NDI */ - uint8_t rv; /* Redundancy Version */ + uint8_t ndi; + uint8_t rvIndex; uint8_t tpcCmd; - bool sUlCfgd; + bool sulIndicator; }Format0_0; +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-40 DCI Format 0_1 Configuration */ typedef struct format0_1 { -/* TBD */ - + uint8_t carrierIndicator; + bool sulIndicator; + uint8_t bwpIndicator; + uint8_t resourceAlloc; + FreqDomainRsrc freqAlloc; + TimeDomainAlloc timeAlloc; + uint16_t rowIndex; + uint8_t mcs; + uint8_t harqProcId; + bool freqHopFlag; + uint8_t ndi; + uint8_t rvIndex; + uint8_t firstDownlinkAssignmentIndex; + uint8_t secondDownlinkAssignmentIndex; + uint8_t tpcCommand; + uint8_t srsResourceSetIndicator; + uint8_t srsResourceIndicator; + uint8_t tpmi; + uint8_t antennaPorts; + uint8_t srsRequest; + uint8_t csiRequest; + uint8_t cbgTransmissionInfo; + uint8_t ptrsDmrs; + uint8_t betaOffsetIndicator; + bool dmrsSequenceInitialization; + bool ulschIndicatior; }Format0_1; -typedef struct format1_0 +typedef struct dciFormat { -/* TBD */ - -}Format1_0; - -typedef struct format1_1 -{ -/* TBD */ -}Format1_1; - -typedef struct dciInfo -{ - uint16_t cellId; - uint16_t crnti; /* CRNI */ - SlotIndInfo slotIndInfo; /* Slot Info: sfn, slot number */ - BwpCfg bwpCfg; /* BWP Cfg */ - CoresetCfg coresetCfg; /* Coreset1 Cfg */ - FormatType formatType; /* DCI Format */ + FormatType formatType; /* DCI Format */ union { Format0_0 format0_0; /* Format 0_0 */ Format0_1 format0_1; /* Format 0_1 */ - Format1_0 format1_0; /* Format 1_0 */ - Format1_1 format1_1; /* Format 1_1 */ }format; - DlDCI dciInfo; +}DciFormat; + +typedef struct dciInfo +{ + uint16_t crnti; /* CRNTI */ + BwpCfg bwpCfg; /* BWP Cfg */ + CoresetCfg coresetCfg; /* Coreset1 Cfg */ + DciFormat dciFormatInfo; /* Dci Format */ + DlDCI dciInfo; /* DlDCI */ }DciInfo; +/* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */ typedef struct dlSchedInfo { - uint16_t cellId; /* Cell Id */ + uint16_t cellId; /* Cell Id */ SchSlotValue schSlotValue; /* Allocation for broadcast messages */ @@ -827,43 +1118,132 @@ typedef struct dlSchedInfo DlBrdcstAlloc brdcstAlloc; /* Allocation for RAR message */ - //uint8_t isRarPres; - RarAlloc *rarAlloc; - - /* Allocation from MSG4 */ - //Msg4Alloc *msg4Alloc; + RarAlloc *rarAlloc[MAX_NUM_UE]; /* UL grant in response to BSR */ DciInfo *ulGrant; /* Allocation from dedicated DL msg */ - DlMsgAlloc *dlMsgAlloc; + DlMsgSchInfo *dlMsgAlloc[MAX_NUM_UE]; }DlSchedInfo; +/*Reference: O-RAN.WG8.AAD.v7.0.0, Sec 11.2.3.3.13 Downlink Paging Allocation*/ +typedef struct interleaved_t +{ + uint8_t regBundleSize; + uint8_t interleaverSize; + uint16_t shiftIndex; +}Interleaved; + +typedef struct pageDlDci +{ + uint8_t freqDomainResource[6]; + uint8_t durationSymbols; + uint8_t cceRegMappingType; + union + { + Interleaved interleaved; + uint8_t nonInterleaved; + }cceReg; + uint8_t ssStartSymbolIndex; + uint8_t cceIndex; + uint8_t aggregLevel; + uint8_t precoderGranularity; + uint8_t coreSetSize; +}PageDlDci; + +typedef struct resAllocType1 PageFreqDomainAlloc; + +typedef struct pageTimeDomainAlloc +{ + uint8_t mappingType; + uint16_t startSymb; + uint16_t numSymb; +}PageTimeDomainAlloc; + +typedef struct pageDmrsConfig +{ + uint8_t dmrsType; + uint8_t dmrsAddPos; + uint8_t nrOfDmrsSymbols; +}PageDmrsConfig; + +typedef struct pageTbInfo +{ + uint8_t mcs; + uint32_t tbSize; +}PageTbInfo; + +typedef struct pageDlSch +{ + PageFreqDomainAlloc freqAlloc; + PageTimeDomainAlloc timeAlloc; + PageDmrsConfig dmrs; + uint8_t vrbPrbMapping; + PageTbInfo tbInfo; + uint8_t tbScaling; + uint16_t dlPagePduLen; + uint8_t *dlPagePdu; +}PageDlSch; + +typedef struct dlPageAlloc +{ + uint16_t cellId; + SlotTimingInfo dlPageTime; + uint8_t ssbIdx; + bool shortMsgInd; + uint8_t shortMsg; + BwpCfg bwp; + PageDlDci pageDlDci; + PageDlSch pageDlSch; +}DlPageAlloc; + typedef struct tbInfo { - uint8_t qamOrder; /* Modulation Order */ - uint8_t mcs; /* MCS */ + uint8_t mcs; /* MCS */ + uint8_t ndi; /* NDI */ + uint8_t rv; /* Redundancy Version */ + uint16_t tbSize; /* TB Size */ + uint8_t qamOrder; /* Modulation Order */ SchMcsTable mcsTable; /* MCS Table */ - uint8_t ndi; /* NDI */ - uint8_t rv; /* Redundancy Version */ - uint16_t tbSize; /* TB Size */ }TbInfo; typedef struct schPuschInfo { - uint16_t crnti; uint8_t harqProcId; /* HARQ Process ID */ - uint8_t resAllocType; /* Resource allocation type */ FreqDomainAlloc fdAlloc; /* Freq domain allocation */ TimeDomainAlloc tdAlloc; /* Time domain allocation */ TbInfo tbInfo; /* TB info */ +#ifdef INTEL_FAPI uint8_t dmrsMappingType; uint8_t nrOfDmrsSymbols; uint8_t dmrsAddPos; +#endif }SchPuschInfo; +typedef struct harqInfo +{ + uint16_t harqAckBitLength; + uint8_t betaOffsetHarqAck; +}HarqInfo; + +typedef struct csiInfo +{ + uint16_t csiBits; + uint8_t betaOffsetCsi; +}CsiInfo; + +typedef struct harqAckInfo +{ + uint16_t harqBitLength; +}HarqFdbkInfo; + +typedef struct csiPartInfo +{ + uint16_t csiBits; +}csiFdbkInfo; + typedef struct schPucchFormatCfg { uint8_t interSlotFreqHop; @@ -876,40 +1256,50 @@ typedef struct schPucchFormatCfg typedef struct schPucchInfo { - uint16_t rnti; - uint8_t pucchFormat; - FreqDomainAlloc fdAlloc; /* Freq domain allocation */ - TimeDomainAlloc tdAlloc; /* Time domain allocation */ + FreqDomainAlloc fdAlloc; + TimeDomainAlloc tdAlloc; uint8_t srFlag; - uint8_t harqFlag; - uint8_t numHarqBits; - uint8_t uciFlag; - uint8_t numUciBits; + HarqFdbkInfo harqInfo; + csiFdbkInfo csiInfo; + BeamformingInfo beamPucchInfo; + uint8_t pucchFormat; uint8_t intraFreqHop; uint16_t secondPrbHop; uint8_t initialCyclicShift; uint8_t occLen; uint8_t occIdx; uint8_t timeDomOCC; - SchPucchFormatCfg cmnFormatCfg; + uint8_t addDmrs; + bool pi2BPSK; }SchPucchInfo; +typedef struct schPuschUci +{ + uint8_t harqProcId; /* HARQ Process ID */ + FreqDomainAlloc fdAlloc; /* Freq domain allocation */ + TimeDomainAlloc tdAlloc; /* Time domain allocation */ + TbInfo tbInfo; /* TB information */ + HarqInfo harqInfo; /* Harq Information */ + CsiInfo csiInfo; /* Csi information*/ +}SchPuschUci; + typedef struct ulSchedInfo { - uint16_t cellId; /* Cell Id */ - uint16_t crnti; /* CRNI */ - SlotIndInfo slotIndInfo; /* Slot Info: sfn, slot number */ - uint8_t dataType; /* Type of info being scheduled */ - PrachSchInfo prachSchInfo; /* Prach scheduling info */ - SchPuschInfo schPuschInfo; /* Pusch scheduling info */ - SchPucchInfo schPucchInfo; /* Pusch scheduling info */ + uint16_t cellId; /* Cell Id */ + uint16_t crnti; /* CRNI */ + SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */ + uint8_t dataType; /* Type of info being scheduled */ + SchPrachInfo prachSchInfo; /* Prach scheduling info */ + SchPuschInfo schPuschInfo; /* Pusch scheduling info */ + SchPuschUci schPuschUci; /* Pusch Uci */ + SchPucchInfo schPucchInfo; /* Pucch and Uci scheduling info */ }UlSchedInfo; typedef struct rachIndInfo { uint16_t cellId; uint16_t crnti; - SlotIndInfo timingInfo; + SlotTimingInfo timingInfo; uint8_t slotIdx; uint8_t symbolIdx; uint8_t freqIdx; @@ -922,7 +1312,7 @@ typedef struct crcIndInfo { uint16_t cellId; uint16_t crnti; - SlotIndInfo timingInfo; + SlotTimingInfo timingInfo; uint16_t numCrcInd; uint8_t crcInd[MAX_NUMBER_OF_CRC_IND_BITS]; }CrcIndInfo; @@ -992,6 +1382,10 @@ typedef struct schMacCellGrpCfg SchSchedReqCfg schedReqCfg; SchTagCfg tagCfg; SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */ +#ifdef NR_DRX + bool drxCfgPresent; + SchDrxCfg drxCfg; /* Drx configuration */ +#endif }SchMacCellGrpCfg; /* Physical Cell Group Configuration */ @@ -1044,6 +1438,7 @@ typedef struct schPdcchConfig /* PDSCH time domain resource allocation */ typedef struct schPdschTimeDomRsrcAlloc { + uint8_t *k0; SchTimeDomRsrcAllocMappingType mappingType; uint8_t startSymbol; uint8_t symbolLength; @@ -1089,6 +1484,8 @@ typedef struct schInitalDlBwp SchPdcchConfig pdcchCfg; bool pdschCfgPres; SchPdschConfig pdschCfg; + bool k0K1TblPrsnt; + SchK0K1TimingInfoTbl k0K1InfoTbl; }SchInitalDlBwp; /* BWP Downlink common */ @@ -1282,15 +1679,6 @@ typedef struct SchDmrsUlCfg SchTransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */ }SchDmrsUlCfg; -/* PUSCH Time Domain Resource Allocation */ -typedef struct schPuschTimeDomRsrcAlloc -{ - uint8_t k2; - SchTimeDomRsrcAllocMappingType mappingType; - uint8_t startSymbol; - uint8_t symbolLength; -}SchPuschTimeDomRsrcAlloc; - /* PUSCH Configuration */ typedef struct schPuschCfg { @@ -1309,6 +1697,8 @@ typedef struct schInitialUlBwp SchPucchCfg pucchCfg; bool puschCfgPres; SchPuschCfg puschCfg; + bool k2TblPrsnt; + SchK2TimingInfoTbl k2InfoTbl; }SchInitialUlBwp; /* Uplink BWP information */ @@ -1317,19 +1707,39 @@ typedef struct schUlBwpInfo uint8_t bwpId; }SchUlBwpInfo; +/* Serving cell configuration */ +typedef struct schServCellRecfgInfo +{ + SchInitalDlBwp initDlBwp; + uint8_t numDlBwpToAddOrMod; + SchDlBwpInfo dlBwpToAddOrModList[MAX_NUM_BWP]; + uint8_t numDlBwpToRel; + SchDlBwpInfo dlBwpToRelList[MAX_NUM_BWP]; + uint8_t firstActvDlBwpId; + uint8_t defaultDlBwpId; + uint8_t *bwpInactivityTmr; + SchPdschServCellCfg pdschServCellCfg; + SchInitialUlBwp initUlBwp; + uint8_t numUlBwpToAddOrMod; + SchUlBwpInfo ulBwpToAddOrModList[MAX_NUM_BWP]; + uint8_t numUlBwpToRel; + SchUlBwpInfo ulBwpToRelList[MAX_NUM_BWP]; + uint8_t firstActvUlBwpId; +}SchServCellRecfgInfo; + /* Serving cell configuration */ typedef struct schServCellCfgInfo { SchInitalDlBwp initDlBwp; uint8_t numDlBwpToAdd; - SchDlBwpInfo DlBwpToAddList[MAX_NUM_BWP]; + SchDlBwpInfo dlBwpToAddList[MAX_NUM_BWP]; uint8_t firstActvDlBwpId; uint8_t defaultDlBwpId; uint8_t *bwpInactivityTmr; SchPdschServCellCfg pdschServCellCfg; SchInitialUlBwp initUlBwp; uint8_t numUlBwpToAdd; - SchUlBwpInfo UlBwpToAddList[MAX_NUM_BWP]; + SchUlBwpInfo ulBwpToAddList[MAX_NUM_BWP]; uint8_t firstActvUlBwpId; }SchServCellCfgInfo; @@ -1383,12 +1793,6 @@ typedef struct schDrbQos uint32_t ulPduSessAggMaxBitRate; /* UL PDU Session Aggregate max bit rate */ }SchDrbQosInfo; -typedef struct schSnssai -{ - uint8_t sst; - uint8_t sd[SD_SIZE]; -}SchSnssai; - /* Special cell configuration */ typedef struct schSpCellCfg { @@ -1396,6 +1800,13 @@ typedef struct schSpCellCfg SchServCellCfgInfo servCellCfg; }SchSpCellCfg; +/* Special cell Reconfiguration */ +typedef struct schSpCellRecfg +{ + uint8_t servCellIdx; + SchServCellRecfgInfo servCellRecfg; +}SchSpCellRecfg; + /* Uplink logical channel configuration */ typedef struct SchUlLcCfg { @@ -1415,10 +1826,9 @@ typedef struct schDlLcCfg /* Logical Channel configuration */ typedef struct schLcCfg { - ConfigType configType; uint8_t lcId; + Snssai *snssai; SchDrbQosInfo *drbQos; - SchSnssai *snssai; SchDlLcCfg dlLcCfg; SchUlLcCfg ulLcCfg; }SchLcCfg; @@ -1437,9 +1847,11 @@ typedef struct schModulationInfo }SchModulationInfo; /* UE configuration */ -typedef struct schUeCfg +typedef struct schUeCfgReq { uint16_t cellId; + uint8_t ueId; + uint8_t beamIdx; uint16_t crnti; bool macCellGrpCfgPres; SchMacCellGrpCfg macCellGrpCfg; @@ -1450,19 +1862,88 @@ typedef struct schUeCfg SchAmbrCfg *ambrCfg; SchModulationInfo dlModInfo; SchModulationInfo ulModInfo; - uint8_t numLcs; + uint8_t numLcsToAdd; SchLcCfg schLcCfg[MAX_NUM_LC]; -}SchUeCfg; +}SchUeCfgReq; + +/* UE Re-configuration */ +typedef struct schUeRecfgReq +{ + uint16_t cellId; + uint8_t ueId; + uint8_t beamIdx; + uint16_t crnti; + bool macCellGrpRecfgPres; + SchMacCellGrpCfg macCellGrpRecfg; + bool phyCellGrpRecfgPres; + SchPhyCellGrpCfg phyCellGrpRecfg; + bool spCellRecfgPres; + SchSpCellRecfg spCellRecfg; + SchAmbrCfg *ambrRecfg; + SchModulationInfo dlModInfo; + SchModulationInfo ulModInfo; + uint8_t numLcsToAdd; + SchLcCfg schLcCfgAdd[MAX_NUM_LC]; + uint8_t numLcsToDel; + uint8_t lcIdToDel[MAX_NUM_LC]; + uint8_t numLcsToMod; + SchLcCfg schLcCfgMod[MAX_NUM_LC]; + SchDataTransmission dataTransmissionInfo; +#ifdef NR_DRX + bool drxConfigIndicatorRelease; +#endif +}SchUeRecfgReq; typedef struct schUeCfgRsp { - uint16_t ueIdx; uint16_t cellId; + uint8_t beamIdx; + uint16_t ueId; uint16_t crnti; SchMacRsp rsp; SchFailureCause cause; }SchUeCfgRsp; +/*As per WG8, UE ReCFG and UECFG have same structure definition*/ +typedef struct schUeCfgRsp SchUeRecfgRsp; + +typedef struct schRachRsrcReq +{ + SlotTimingInfo slotInd; + uint16_t cellId; + uint16_t crnti; + uint8_t numSsb; + uint8_t ssbIdx[MAX_NUM_SSB]; +}SchRachRsrcReq; + +typedef struct schCfraSsbResource +{ + uint8_t ssbIdx; + uint8_t raPreambleIdx; +}SchCfraSsbResource; + +typedef struct schCfraRsrc +{ + uint8_t numSsb; + SchCfraSsbResource ssbResource[MAX_NUM_SSB]; +}SchCfraResource; + +typedef struct schRachRsrcRsp +{ + uint16_t cellId; + uint16_t crnti; + SchMacRsp result; + SchCfraResource cfraResource; +}SchRachRsrcRsp; + +typedef struct schRachRsrcRel +{ + SlotTimingInfo slotInd; + uint16_t cellId; + uint16_t crnti; + SchCfraResource cfraResource; +}SchRachRsrcRel; + typedef struct schUeDelete { uint16_t cellId; @@ -1471,12 +1952,24 @@ typedef struct schUeDelete typedef struct schUeDeleteRsp { - uint16_t cellId; - uint16_t crnti; - SchMacRsp rsp; - ErrorCause cause; + uint16_t cellId; + uint16_t crnti; + SchMacRsp rsp; + ErrorCause cause; }SchUeDeleteRsp; +typedef struct schCellDeleteReq +{ + uint16_t cellId; +}SchCellDeleteReq; + + +typedef struct schCellDeleteRsp +{ + uint16_t cellId; + SchMacRsp rsp; + SchFailureCause cause; +}SchCellDeleteRsp; typedef struct dataVolInfo { @@ -1497,119 +1990,82 @@ typedef struct srUciIndInfo { uint16_t cellId; uint16_t crnti; - SlotIndInfo slotInd; + SlotTimingInfo slotInd; uint8_t numSrBits; uint8_t srPayload[MAX_SR_BITS_IN_BYTES]; }SrUciIndInfo; -/* function pointers */ - -typedef uint8_t (*SchCellCfgCfmFunc) ARGS(( - Pst *pst, /* Post Structure */ - SchCellCfgCfm *schCellCfgCfm /* Cell Cfg Cfm */ - )); - -typedef uint8_t (*SchCellCfgFunc) ARGS(( - Pst *pst, /* Post Structure */ - SchCellCfg *schCellCfg /* Cell Cfg */ - )); - -typedef uint8_t (*SchMacDlAllocFunc) ARGS(( - Pst *pst, /* Post Structure */ - DlSchedInfo *dlSchedInfo /* dl allocation Info */ - )); - -typedef uint8_t (*SchMacUlSchInfoFunc) ARGS(( - Pst *pst, /* Post Structure */ - UlSchedInfo *ulSchedInfo /* UL Alloc Sch Info */ - )); - -typedef uint8_t (*MacSchRachIndFunc) ARGS(( - Pst *pst, /* Post structure */ - RachIndInfo *rachInd)); /* Rach Indication Info */ - -typedef uint8_t (*MacSchCrcIndFunc) ARGS(( - Pst *pst, /* Post structure */ - CrcIndInfo *crcInd)); /* CRC Info */ +typedef struct dlHarqInd +{ + uint16_t cellId; + uint16_t crnti; + SlotTimingInfo slotInd; + uint8_t numHarq; + uint8_t harqPayload[MAX_HARQ_BITS_IN_BYTES]; +}DlHarqInd; -typedef uint8_t (*MacSchDlRlcBoInfoFunc) ARGS(( - Pst *pst, /* Post structure */ - DlRlcBoInfo *dlBoInfo)); /* DL BO Info */ +typedef struct schRrmPolicyRatio +{ + uint8_t maxRatio; + uint8_t minRatio; + uint8_t dedicatedRatio; +}SchRrmPolicyRatio; -typedef uint8_t (*MacSchAddUeConfigReqFunc) ARGS(( - Pst *pst, /* Post structure */ - SchUeCfg *ueCfgToSch)); /* Scheduler UE Cfg */ +typedef struct schRrmPolicyOfSlice +{ + Snssai snssai; + SchRrmPolicyRatio rrmPolicyRatioInfo; +}SchRrmPolicyOfSlice; -typedef uint8_t (*SchUeCfgRspFunc) ARGS(( - Pst *pst, /* Post structure */ - SchUeCfgRsp *cfgRsp)); /* Scheduler UE Cfg response */ +typedef struct schSliceCfgReq +{ + uint8_t numOfConfiguredSlice; + SchRrmPolicyOfSlice **listOfSlices; +}SchSliceCfgReq; -typedef uint8_t (*MacSchSlotIndFunc) ARGS(( - Pst *pst, /* Post structure */ - SlotIndInfo *slotInd)); /* Slot Info */ +typedef struct sliceRsp +{ + Snssai snssai; + SchMacRsp rsp; + RspCause cause; +}SliceRsp; -typedef uint8_t (*MacSchBsrFunc) ARGS(( - Pst *pst, - UlBufferStatusRptInd *bsrInd -)); +typedef struct schSliceCfgRsp +{ + uint8_t numSliceCfgRsp; + SliceRsp **listOfSliceCfgRsp; +}SchSliceCfgRsp; -typedef uint8_t (*MacSchSrUciIndFunc) ARGS(( - Pst *pst, /* Post structure */ - SrUciIndInfo *uciInd)); /* UCI IND Info */ +/*As per ORAN-WG8, Slice Cfg and Recfg are same structures*/ +typedef struct schSliceCfgReq SchSliceRecfgReq; +typedef struct schSliceCfgRsp SchSliceRecfgRsp; -typedef uint8_t (*MacSchModUeConfigReqFunc) ARGS(( - Pst *pst, /* Post structure */ - SchUeCfg *ueCfgToSch)); /* Scheduler UE Cfg */ +typedef struct schPageInd +{ + uint16_t cellId; + uint16_t pf; + uint8_t i_s; + uint16_t pduLen; + uint8_t *pagePdu; +}SchPageInd; -typedef uint8_t (*SchUeReCfgRspFunc) ARGS(( - Pst *pst, /* Post structure */ - SchUeCfgRsp *cfgRsp)); /* Scheduler UE Cfg response */ -typedef uint8_t (*MacSchUeDeleteReqFunc) ARGS(( - Pst *pst, /* Post structure */ - SchUeDelete *schUeDel)); /*Scheduler UE Del*/ +typedef struct schUeHqInfo +{ + uint16_t crnti; + uint8_t hqProcId; +}SchUeHqInfo; -typedef uint8_t (*SchUeDeleteRspFunc) ARGS(( - Pst *pst, /* Post structure */ - SchUeDeleteRsp *delRsp)); /* Scheduler UE delete response */ +typedef struct schRlsHqInfo +{ + uint16_t cellId; + uint8_t numUes; + SchUeHqInfo *ueHqInfo; +}SchRlsHqInfo; /* function declarations */ -uint8_t packMacSchSlotInd(Pst *pst, SlotIndInfo *slotInd); -uint8_t packSchMacDlAlloc(Pst *pst, DlSchedInfo *dlSchedInfo); -uint8_t packSchMacUlSchInfo(Pst *pst, UlSchedInfo *ulSchedInfo); -uint8_t packSchCellCfg(Pst *pst, SchCellCfg *schCellCfg); -uint8_t packSchCellCfgCfm(Pst *pst, SchCellCfgCfm *schCellCfgCfm); -uint8_t MacProcDlAlloc(Pst *pst, DlSchedInfo *dlSchedInfo); -uint8_t MacProcSchCellCfg(Pst *pst, SchCellCfg *schCellCfg); -uint8_t MacProcSchCellCfgCfm(Pst *pst, SchCellCfgCfm *schCellCfgCfm); -uint8_t SchHdlCellCfgReq(Pst *pst, SchCellCfg *schCellCfg); uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason); -uint8_t SchSendCfgCfm(Pst *pst, RgMngmt *cfm); -uint8_t MacProcUlSchInfo(Pst *pst, UlSchedInfo *ulSchedInfo); -uint8_t packMacSchRachInd(Pst *pst, RachIndInfo *rachInd); -uint8_t MacSchRachInd(Pst *pst, RachIndInfo *rachInd); -uint8_t packMacSchCrcInd(Pst *pst, CrcIndInfo *crcInd); -uint8_t MacSchCrcInd(Pst *pst, CrcIndInfo *crcInd); -uint8_t packMacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo); -uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo); -uint8_t packMacSchAddUeConfigReq(Pst *pst, SchUeCfg *ueCfgToSch); -uint8_t MacSchAddUeConfigReq(Pst *pst, SchUeCfg *ueCfgToSch); -uint8_t packSchUeCfgRsp(Pst *pst, SchUeCfgRsp *cfgRsp); -uint8_t MacProcSchUeCfgRsp(Pst *pst, SchUeCfgRsp *cfgRsp); -uint8_t MacSchSlotInd ARGS((Pst * pst, SlotIndInfo * slotInd)); -uint8_t packMacSchSlotInd(Pst * pst, SlotIndInfo * slotInd); -uint8_t unpackMacSchSlotInd(MacSchSlotIndFunc func, Pst *pst, Buffer *mBuf); -uint8_t packMacSchBsr(Pst *pst, UlBufferStatusRptInd *bsrInd); -uint8_t MacSchBsr(Pst *pst, UlBufferStatusRptInd *bsrInd); -uint8_t packMacSchSrUciInd(Pst *pst, SrUciIndInfo *uciInd); -uint8_t MacSchSrUciInd(Pst *pst, SrUciIndInfo *uciInd); -uint8_t packMacSchModUeConfigReq(Pst *pst, SchUeCfg *ueCfgToSch); -uint8_t MacSchModUeConfigReq(Pst *pst, SchUeCfg *ueCfgToSch); -uint8_t packSchUeReconfigRsp(Pst *pst, SchUeCfgRsp *cfgRsp); -uint8_t MacProcSchUeReconfigRsp(Pst *pst, SchUeCfgRsp *cfgRsp); -uint8_t packMacSchUeDeleteReq(Pst *pst, SchUeDelete *schUeDel); -uint8_t MacSchUeDeleteReq(Pst *pst, SchUeDelete *ueDelete); -uint8_t packSchUeDeleteRsp(Pst *pst, SchUeDeleteRsp *delRsp); -uint8_t MacProcSchUeDeleteRsp(Pst *pst, SchUeDeleteRsp *schUeDelRsp); +uint8_t MacMessageRouter(Pst *pst, void *msg); +uint8_t SchMessageRouter(Pst *pst, void *msg); /********************************************************************** End of file