X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2Fcm%2Fdu_app_mac_inf.h;h=612ec4b23a612ffc3603481fada8ac1025609d49;hb=fdf994581c1b672158c911a9a5f7a4191832c695;hp=cccce8ee741ae009fda015adac3e923f04d209bd;hpb=ed6746a6081339633c3baa314251fcc11b98ce10;p=o-du%2Fl2.git

diff --git a/src/cm/du_app_mac_inf.h b/src/cm/du_app_mac_inf.h
index cccce8ee7..612ec4b23 100644
--- a/src/cm/du_app_mac_inf.h
+++ b/src/cm/du_app_mac_inf.h
@@ -21,12 +21,9 @@
 #define __MACINT_H__
 
 #define NUM_NUMEROLOGY 5  /* Number of numerology */
-#define MAXIMUM_TDD_PERIODICITY 5
-#define MAX_SYMB_PER_SLOT 14 
 
 #define NUM_SSB		1	/* max value is 64 */
 #define SSB_MASK_SIZE	1	/* SSB mask size is 32bit for sub6 */
-#define SIB1_NEW_TX_PERIOD      160
 #define SIB1_REPETITION_PERIOD   20
 #define CORESET_0_INDEX      0
 #define CORESET_1_INDEX      1
@@ -53,8 +50,6 @@
 #define MAX_NUM_UL_ALLOC 16             /* Max number of pusch time domain uplink allocation */
 #define SD_SIZE   3                     /* Max size of Slice Differentiator in S-NSSAI */
 
-#define MAX_NUM_SRB    8
-#define MAX_NUM_DRB    64
 #define MAX_NUM_SCELL  32
 
 /* PUCCH Configuration Macro */
@@ -123,25 +118,6 @@ typedef enum
    RSSI_UNIT_DBFS
 }RSSIMeasUnit;
 
-typedef enum
-{
-   DL_SLOT,
-   UL_SLOT,
-   GUARD_SLOT
-}SlotConfig;
-
-typedef enum
-{
-   TX_PRDCTY_MS_0P5,
-   TX_PRDCTY_MS_0P625,
-   TX_PRDCTY_MS_1,
-   TX_PRDCTY_MS_1P25,
-   TX_PRDCTY_MS_2,
-   TX_PRDCTY_MS_2P5,
-   TX_PRDCTY_MS_5,
-   TX_PRDCTY_MS_10
-}DlUlTxPeriodicity;
-
 typedef enum
 {
    BETA_PSS_0DB,
@@ -563,18 +539,10 @@ typedef struct prachCfg
    uint8_t       raRspWindow;         /* RA Response Window */
 }PrachCfg;
 
-typedef struct tddCfg
-{
-   bool               pres;
-   DlUlTxPeriodicity  tddPeriod;      /* DL UL Transmission periodicity */
-   SlotConfig         slotCfg[MAXIMUM_TDD_PERIODICITY][MAX_SYMB_PER_SLOT]; 
-}TDDCfg;
-
 typedef struct sib1CellCfg
 {
    uint8_t  *sib1Pdu;
    uint16_t sib1PduLen;
-   uint16_t sib1NewTxPeriod;
    uint16_t sib1RepetitionPeriod;
    uint8_t coresetZeroIndex;     /* derived from 4 LSB of pdcchSib1 present in MIB */
    uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
@@ -665,7 +633,9 @@ typedef struct macCellCfg
    bool           freqShft;         /* Indicates presence of 7.5kHz frequency shift */
    SsbCfg         ssbCfg;           /* SSB configuration */          
    PrachCfg       prachCfg;         /* PRACH Configuration */
+#ifdef NR_TDD
    TDDCfg         tddCfg;           /* TDD periodicity and slot configuration */
+#endif
    RSSIMeasUnit   rssiUnit;         /* RSSI measurement unit */
    Sib1CellCfg    sib1Cfg;          /* SIB1 config */
    BwpDlConfig    initialDlBwp;     /* Initial DL BWP */
@@ -1116,7 +1086,6 @@ typedef struct spCellCfg
 typedef struct ambrCfg
 {
    uint32_t ulBr;   /* UL Bit rate */
-   uint32_t dlBr;   /* DL Bit rate */
 }AmbrCfg;
 
 /* Single Network Slice Selection assistance Info */
@@ -1212,8 +1181,11 @@ typedef struct macUeCfg
    uint16_t cellId;
    uint8_t  ueIdx;
    uint16_t crnti;
+   bool macCellGrpCfgPres;
    MacCellGrpCfg macCellGrpCfg;
+   bool phyCellGrpCfgPres;
    PhyCellGrpCfg phyCellGrpCfg;
+   bool spCellCfgPres;
    SpCellCfg spCellCfg;
    AmbrCfg   *ambrCfg;
    ModulationInfo dlModInfo;    /* DL modulation info */