X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2Fcm%2Fcommon_def.h;h=a130832af8524d6444b37b56dcd3a4a0b558880f;hb=2dc9d6735bc5ff973a761b7d6b3f71f97e95d60e;hp=9f4fc7cafa8d31bd94773efd4ceca5ff341220bd;hpb=7c6820e987fadb1102e5891408ad33a8ce36ba95;p=o-du%2Fl2.git diff --git a/src/cm/common_def.h b/src/cm/common_def.h index 9f4fc7caf..a130832af 100644 --- a/src/cm/common_def.h +++ b/src/cm/common_def.h @@ -54,13 +54,17 @@ #include "cm_lib.x" #include "du_log.h" +#define RADIO_FRAME_DURATION 10 /* Time duration of a radio frame in ms */ /* MAX values */ #define MAX_NUM_CELL 1 #define MAX_NUM_UE 1 #define MAX_NUM_LC 11 +#define MAX_NUM_SRB 3 /* Max. no of Srbs */ +#define MAX_NUM_DRB 29 /* spec 38.331, maxDRB */ /* 5G ORAN phy delay */ -#define PHY_DELTA 2 +#define PHY_DELTA_DL 1 +#define PHY_DELTA_UL 0 /* SELECTORS */ #define ODU_SELECTOR_LC 0 @@ -79,6 +83,20 @@ #define MAX_DRB_LCID 32 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */ +#define PUCCH_FORMAT_0 0 +#define PUCCH_FORMAT_1 1 +#define PUCCH_FORMAT_2 2 +#define PUCCH_FORMAT_3 3 +#define PUCCH_FORMAT_4 4 + +#define BANDWIDTH_20MHZ 20 +#define BANDWIDTH_100MHZ 100 + +/* PRB allocation as per 38.101, Section 5.3.2 */ +#define TOTAL_PRB_20MHZ_MU0 106 +#define TOTAL_PRB_100MHZ_MU1 273 + +#define ODU_THROUGHPUT_PRINT_TIME_INTERVAL 5 /* in milliseconds */ /* Defining macros for common utility functions */ #define ODU_GET_MSG_BUF SGetMsg @@ -103,6 +121,15 @@ #define ODU_SEGMENT_MSG SSegMsg #define ODU_CAT_MSG SCatMsg #define ODU_GET_PROCID SFndProcId +#define ODU_SET_THREAD_AFFINITY SSetAffinity +#define ODU_CREATE_TASK SCreateSTsk + +#ifdef NR_TDD +/* Maximum slots for max periodicity and highest numerology is 320. + * However, aligning to fapi_interface.h, setting this macro to 160 */ +#define MAX_TDD_PERIODICITY_SLOTS 160 +#define MAX_SYMB_PER_SLOT 14 +#endif #define GET_UE_IDX( _crnti,_ueIdx) \ { \ @@ -150,6 +177,53 @@ _bitPos = __builtin_ctz(_in); \ } +typedef enum +{ + UE_CFG_INACTIVE, + UE_CFG_INPROGRESS, + UE_CREATE_COMPLETE, + UE_DELETE_COMPLETE, + UE_RECFG_COMPLETE +}UeCfgState; + +typedef enum +{ + CONFIG_UNKNOWN, + CONFIG_ADD, + CONFIG_MOD, + CONFIG_DEL +}ConfigType; + +#ifdef NR_TDD +typedef enum +{ + DL_SLOT, + UL_SLOT, + FLEXI_SLOT +}SlotConfig; + +typedef enum +{ + TX_PRDCTY_MS_0P5, + TX_PRDCTY_MS_0P625, + TX_PRDCTY_MS_1, + TX_PRDCTY_MS_1P25, + TX_PRDCTY_MS_2, + TX_PRDCTY_MS_2P5, + TX_PRDCTY_MS_5, + TX_PRDCTY_MS_10 +}DlUlTxPeriodicity; +#endif + +typedef enum +{ + SCS_15KHZ, + SCS_30KHZ, + SCS_60KHZ, + SCS_120KHZ, + SCS_240KHZ +}SCS; + typedef struct slotIndInfo { uint16_t cellId; @@ -163,23 +237,27 @@ typedef struct PlmnIdentity uint8_t mnc[3]; }Plmn; -typedef enum +typedef struct oduCellId { - UE_CFG_INACTIVE, - UE_CONFIG_COMPLETE, - UE_RECFG_COMPLETE -}UeCfgState; + uint16_t cellId; +}OduCellId; -typedef enum +#ifdef NR_TDD +typedef struct tddCfg { - CONFIG_UNKNOWN, - CONFIG_ADD, - CONFIG_MOD, - CONFIG_DEL -}ConfigType; + bool pres; + DlUlTxPeriodicity tddPeriod; /* DL UL Transmission periodicity */ + SlotConfig slotCfg[MAX_TDD_PERIODICITY_SLOTS][MAX_SYMB_PER_SLOT]; +}TDDCfg; +#endif + + +uint64_t gSlotCount; +uint64_t gDlDataRcvdCnt; /* Number of DL data received at EGTP */ void freqDomRscAllocType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain); void oduCpyFixBufToMsg(uint8_t *fixBuf, Buffer *mBuf, uint16_t len); +uint8_t buildPlmnId(Plmn plmn, uint8_t *buf); #endif