X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch_rach.c;h=c07a7261a920044e2f5b61b5cd6273b67e3a70f4;hb=42e50f5a3e46d7ca3afe97907b39d2a0c79a21c2;hp=46b8fba68dbf05011142199d6626a7d323c6fca7;hpb=12da8be0c4941e107b9ff0d18ce5b6eb7f5f7d20;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 46b8fba68..c07a7261a 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -40,6 +40,7 @@ #include "du_app_mac_inf.h" #include "mac_sch_interface.h" #include "sch.h" +#include "sch_tmr.h" #include "sch_utils.h" /** @@ -74,7 +75,7 @@ bool schCheckPrachOcc(SchCellCb *cell, SlotTimingInfo prachOccasionTimingInfo) if((prachOccasionTimingInfo.sfn%x) == y) { - subFrame = prachOccasionTimingInfo.slot/pow(2, cell->cellCfg.numerology); + subFrame = prachOccasionTimingInfo.slot/pow(2, cell->numerology); /* check for subFrame number */ if ((1 << subFrame) & prachSubframe) @@ -181,7 +182,7 @@ void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo ulSchedInfo->prachSchInfo.prachFormat = prachFormat; ulSchedInfo->prachSchInfo.numRa = numRa; ulSchedInfo->prachSchInfo.prachStartSymb = prachStartSymbol; - DU_LOG("\nINFO --> SCH : RACH occassion set for slot %d", prachOccasionTimingInfo.slot); + DU_LOG("\nINFO --> SCH : RACH occassion set for slot %d", prachOccasionTimingInfo.slot); } /** @@ -539,7 +540,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin uint8_t k0TblIdx = 0, k1TblIdx = 0, k2TblIdx = 0; uint8_t k0Index = 0, k1Index = 0, k2Index = 0; uint8_t k0 = 0, k1 = 0, k2 = 0; - uint8_t numK1 = 0; + uint8_t numK1 = 0, ret = OK; uint8_t puschMu = 0; uint8_t msg3Delta = 0, msg3MinSchTime = 0; #ifdef NR_TDD @@ -555,15 +556,15 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin RaRspWindowStatus windowStatus=0; #ifdef NR_TDD - totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod); + totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod); #endif k0K1InfoTbl = &cell->k0K1InfoTbl; if(cell->raReq[ueId-1]->isCFRA == false) { msg3K2InfoTbl = &cell->msg3K2InfoTbl; - puschMu = cell->cellCfg.numerology; + puschMu = cell->numerology; msg3Delta = puschDeltaTable[puschMu]; - msg3MinSchTime = minMsg3SchTime[cell->cellCfg.numerology]; + msg3MinSchTime = minMsg3SchTime[cell->numerology]; } /* Calculating time frame to send DCI for RAR */ @@ -595,10 +596,6 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin ADD_DELTA_TO_TIME(dciTime, rarTime, k0, cell->numSlots); rarSlot = rarTime.slot; - /* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */ - if(cell->schDlSlotInfo[rarSlot]->pdschUe != 0) - continue; - /* If Contention-FREE RA is in progress, allocate resources for * PUCCH for next UL message */ if(cell->raReq[ueId-1]->isCFRA) @@ -700,10 +697,20 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin if(cell->raReq[ueId-1]->isCFRA) { /* Allocate resources for PUCCH */ - schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti,NULLP, FALSE, NULLP); + cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId; + ret = schAllocPucchResource(cell, pucchTime, NULLP, NULLP, NULLP); + if(ret == RFAILED) + { + SCH_FREE(dciSlotAlloc, sizeof(RarAlloc)); + cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP; + DU_LOG("\nERROR --> SCH : Resource allocation for PUCCH failed for CFRA!"); + return false; + + } } else { + cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId; /* Allocate resources for msg3 */ msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time, &(cell->raCb[ueId-1].msg3HqProc), FALSE); if(msg3PuschInfo) @@ -730,7 +737,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin SCH_ALLOC(dciSlotAlloc->rarPdschCfg, sizeof(PdschCfg)); if(dciSlotAlloc->rarPdschCfg) { - memcpy(dciSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci.pdschCfg, sizeof(PdschCfg)); + memcpy(dciSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg)); } else { @@ -765,7 +772,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin SCH_ALLOC(rarSlotAlloc->rarPdschCfg, sizeof(PdschCfg)); if(rarSlotAlloc->rarPdschCfg) { - memcpy(rarSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci.pdschCfg,sizeof(PdschCfg)); + memcpy(rarSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci[0].pdschCfg,sizeof(PdschCfg)); } else { @@ -783,11 +790,6 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin } cell->schDlSlotInfo[dciSlot]->pdcchUe = ueId; - cell->schDlSlotInfo[rarSlot]->pdschUe = ueId; - if(cell->raReq[ueId-1]->isCFRA) - cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId; - else - cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId; /* Create raCb at SCH */ createSchRaCb(ueId, cell->raReq[ueId-1], schInst); @@ -861,7 +863,7 @@ uint8_t SchProcRachInd(Pst *pst, RachIndInfo *rachInd) raReq->winStartTime.slot = rachInd->timingInfo.slot; /* Converting window size from ms to number of slots */ - slotDuration = (1 / pow(2, cell->cellCfg.numerology)); + slotDuration = (1 / pow(2, cell->numerology)); winNumSlots = (float)cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.raRspWindow / slotDuration; /* Adding window size to window start time to get window end time */ @@ -944,20 +946,20 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId; pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */ pdcch->numDlDci = 1; - pdcch->dci.rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */ - pdcch->dci.scramblingId = cell->cellCfg.phyCellId; - pdcch->dci.scramblingRnti = 0; - pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ - pdcch->dci.aggregLevel = 4; - pdcch->dci.beamPdcchInfo.numPrgs = 1; - pdcch->dci.beamPdcchInfo.prgSize = 1; - pdcch->dci.beamPdcchInfo.digBfInterfaces = 0; - pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0; - pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0; - pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0; - pdcch->dci.txPdcchPower.powerControlOffsetSS = 0; - - pdsch = &pdcch->dci.pdschCfg; + pdcch->dci[0].rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */ + pdcch->dci[0].scramblingId = cell->cellCfg.phyCellId; + pdcch->dci[0].scramblingRnti = 0; + pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ + pdcch->dci[0].aggregLevel = 4; + pdcch->dci[0].beamPdcchInfo.numPrgs = 1; + pdcch->dci[0].beamPdcchInfo.prgSize = 1; + pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0; + pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0; + pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0; + pdcch->dci[0].txPdcchPower.beta_pdcch_1_0 = 0; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; + + pdsch = &pdcch->dci[0].pdschCfg; /* fill the PDSCH PDU */ uint8_t cwCount = 0; pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */