X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch_rach.c;h=50b4281f8de22804b89d26be96ae3e303ab5839f;hb=e96cb439cd4a7a6f55e3fab7caed978e38bd62b4;hp=8d5b79ca73f18bf1ad948d8708347ab8403e00ad;hpb=47a15faec02b721d3e466815eb388fea0a209e3c;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 8d5b79ca7..50b4281f8 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -40,6 +40,7 @@ #include "du_app_mac_inf.h" #include "mac_sch_interface.h" #include "sch.h" +#include "sch_tmr.h" #include "sch_utils.h" /** @@ -413,7 +414,7 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S SchCellCb *cell = NULLP; SchUlSlotInfo *schUlSlotInfo = NULLP; uint8_t mcs = DEFAULT_MCS; - uint8_t startSymb = 0; + uint8_t startSymb = 0, ueId = 0; uint8_t symbLen = 0; uint16_t startRb = 0; uint16_t numRb = 0; @@ -426,6 +427,7 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S return NULLP; } + GET_UE_ID(crnti, ueId); /* Allocate time-domain and frequency-domain resource for MSG3 PUSCH */ startSymb = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol; symbLen = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength; @@ -438,55 +440,56 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S /* Fill PUSCH scheduling details in Slot structure */ schUlSlotInfo = cell->schUlSlotInfo[msg3SlotTime.slot]; - SCH_ALLOC(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo)); - if(!schUlSlotInfo->schPuschInfo) + SCH_ALLOC(schUlSlotInfo->schPuschInfo[ueId - 1], sizeof(SchPuschInfo)); + if(!schUlSlotInfo->schPuschInfo[ueId - 1]) { DU_LOG("\nERROR --> SCH : Memory allocation failed in schAllocMsg3Pusch"); return NULLP; } - + cell->schUlSlotInfo[msg3SlotTime.slot]->puschPres = true; tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */ tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL); tbSize = tbSize / 8 ; /*bits to byte conversion*/ - schUlSlotInfo->schPuschInfo->harqProcId = msg3HqProc->procId; - schUlSlotInfo->schPuschInfo->fdAlloc.resAllocType = SCH_ALLOC_TYPE_1; - schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.startPrb = startRb; - schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.numPrb = numRb; - schUlSlotInfo->schPuschInfo->tdAlloc.startSymb = startSymb; - schUlSlotInfo->schPuschInfo->tdAlloc.numSymb = symbLen; - schUlSlotInfo->schPuschInfo->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */ - schUlSlotInfo->schPuschInfo->tbInfo.mcs = mcs; - schUlSlotInfo->schPuschInfo->tbInfo.mcsTable = SCH_MCS_TABLE_QAM_64; - schUlSlotInfo->schPuschInfo->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */ - schUlSlotInfo->schPuschInfo->tbInfo.rv = 0; - schUlSlotInfo->schPuschInfo->tbInfo.tbSize = tbSize; + schUlSlotInfo->schPuschInfo[ueId - 1]->harqProcId = msg3HqProc->procId; + schUlSlotInfo->schPuschInfo[ueId - 1]->crnti = crnti; + schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAllocType = SCH_ALLOC_TYPE_1; + schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.startPrb = startRb; + schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.numPrb = numRb; + schUlSlotInfo->schPuschInfo[ueId - 1]->tdAlloc.startSymb = startSymb; + schUlSlotInfo->schPuschInfo[ueId - 1]->tdAlloc.numSymb = symbLen; + schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */ + schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcs = mcs; + schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcsTable = SCH_MCS_TABLE_QAM_64; + schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */ + schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.rv = 0; + schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.tbSize = tbSize; #ifdef INTEL_FAPI - schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */ - schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; - schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS; + schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */ + schUlSlotInfo->schPuschInfo[ueId - 1]->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; + schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsAddPos = DMRS_ADDITIONAL_POS; #endif if(!isRetx) { msg3HqProc->strtSymbl = startSymb; msg3HqProc->numSymbl = symbLen; - msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo->fdAlloc.resAllocType; - msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.startPrb; - msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.numPrb; - msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo->tbInfo.qamOrder; - msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo->tbInfo.mcs; - msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo->tbInfo.mcsTable; - msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo->tbInfo.ndi; - msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo->tbInfo.rv; - msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo->tbInfo.tbSize; + msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAllocType; + msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.startPrb; + msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.numPrb; + msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.qamOrder; + msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcs; + msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcsTable; + msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.ndi; + msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.rv; + msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.tbSize; #ifdef INTEL_FAPI - msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo->dmrsMappingType; - msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols; - msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo->dmrsAddPos; + msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsMappingType; + msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo[ueId - 1]->nrOfDmrsSymbols; + msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsAddPos; #endif } - return schUlSlotInfo->schPuschInfo; + return schUlSlotInfo->schPuschInfo[ueId - 1]; } /** @@ -539,13 +542,13 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin uint8_t k0TblIdx = 0, k1TblIdx = 0, k2TblIdx = 0; uint8_t k0Index = 0, k1Index = 0, k2Index = 0; uint8_t k0 = 0, k1 = 0, k2 = 0; - uint8_t numK1 = 0; + uint8_t numK1 = 0, ret = OK; uint8_t puschMu = 0; uint8_t msg3Delta = 0, msg3MinSchTime = 0; #ifdef NR_TDD uint8_t totalCfgSlot = 0; #endif - uint16_t dciSlot = 0, rarSlot = 0; + uint16_t dciSlot = 0, rarSlot = 0, crnti = 0; SlotTimingInfo dciTime, rarTime, msg3Time, pucchTime; RarAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for RAR */ RarAlloc *rarSlotAlloc = NULLP; /* Stores info for transmission of RAR PDSCH */ @@ -553,7 +556,8 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP; SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP; RaRspWindowStatus windowStatus=0; - + + GET_CRNTI(crnti, ueId); #ifdef NR_TDD totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod); #endif @@ -567,7 +571,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin } /* Calculating time frame to send DCI for RAR */ - ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots); + ADD_DELTA_TO_TIME(currTime, dciTime, gConfigInfo.gPhyDeltaDl + SCHED_DELTA, cell->numSlots); dciSlot = dciTime.slot; #ifdef NR_TDD /* Consider this slot for sending DCI, only if it is a DL slot */ @@ -595,10 +599,6 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin ADD_DELTA_TO_TIME(dciTime, rarTime, k0, cell->numSlots); rarSlot = rarTime.slot; - /* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */ - if(cell->schDlSlotInfo[rarSlot]->pdschUe != 0) - continue; - /* If Contention-FREE RA is in progress, allocate resources for * PUCCH for next UL message */ if(cell->raReq[ueId-1]->isCFRA) @@ -622,8 +622,11 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT) continue; #endif - if(cell->schUlSlotInfo[pucchTime.slot]->pucchUe != 0) + /*In this pucchTime, this particular UE/CRNTI is already scheduled thus checking + * for next pucchTime for the same UE*/ + if(cell->schUlSlotInfo[pucchTime.slot]->schPucchInfo[ueId - 1].crnti == crnti) continue; + k1Found = true; break; } @@ -645,9 +648,10 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT) continue; #endif - /* If PUSCH is already scheduled on this slot, another PUSCH - * pdu cannot be scheduled here */ - if(cell->schUlSlotInfo[msg3Time.slot]->puschUe != 0) + /* If PUSCH is already scheduled on this slot for this UE, another PUSCH + * pdu cannot be scheduled here for same UE*/ + if((cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo[ueId - 1] != NULLP) && \ + (cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo[ueId - 1]->crnti == crnti)) continue; k2Found = true; @@ -699,8 +703,17 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin if(cell->raReq[ueId-1]->isCFRA) { + cell->schUlSlotInfo[pucchTime.slot]->schPucchInfo[ueId - 1].crnti = crnti; /* Allocate resources for PUCCH */ - schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti,NULLP, FALSE, NULLP); + ret = schAllocPucchResource(cell, ueId, pucchTime, NULLP, NULLP, NULLP); + if(ret == RFAILED) + { + SCH_FREE(dciSlotAlloc, sizeof(RarAlloc)); + cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP; + DU_LOG("\nERROR --> SCH : Resource allocation for PUCCH failed for CFRA!"); + return false; + + } } else { @@ -730,7 +743,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin SCH_ALLOC(dciSlotAlloc->rarPdschCfg, sizeof(PdschCfg)); if(dciSlotAlloc->rarPdschCfg) { - memcpy(dciSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci.pdschCfg, sizeof(PdschCfg)); + memcpy(dciSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg)); } else { @@ -765,7 +778,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin SCH_ALLOC(rarSlotAlloc->rarPdschCfg, sizeof(PdschCfg)); if(rarSlotAlloc->rarPdschCfg) { - memcpy(rarSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci.pdschCfg,sizeof(PdschCfg)); + memcpy(rarSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci[0].pdschCfg,sizeof(PdschCfg)); } else { @@ -783,11 +796,6 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin } cell->schDlSlotInfo[dciSlot]->pdcchUe = ueId; - cell->schDlSlotInfo[rarSlot]->pdschUe = ueId; - if(cell->raReq[ueId-1]->isCFRA) - cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId; - else - cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId; /* Create raCb at SCH */ createSchRaCb(ueId, cell->raReq[ueId-1], schInst); @@ -944,20 +952,20 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId; pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */ pdcch->numDlDci = 1; - pdcch->dci.rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */ - pdcch->dci.scramblingId = cell->cellCfg.phyCellId; - pdcch->dci.scramblingRnti = 0; - pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ - pdcch->dci.aggregLevel = 4; - pdcch->dci.beamPdcchInfo.numPrgs = 1; - pdcch->dci.beamPdcchInfo.prgSize = 1; - pdcch->dci.beamPdcchInfo.digBfInterfaces = 0; - pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0; - pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0; - pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0; - pdcch->dci.txPdcchPower.powerControlOffsetSS = 0; - - pdsch = &pdcch->dci.pdschCfg; + pdcch->dci[0].rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */ + pdcch->dci[0].scramblingId = cell->cellCfg.phyCellId; + pdcch->dci[0].scramblingRnti = 0; + pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ + pdcch->dci[0].aggregLevel = 4; + pdcch->dci[0].beamPdcchInfo.numPrgs = 1; + pdcch->dci[0].beamPdcchInfo.prgSize = 1; + pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0; + pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0; + pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0; + pdcch->dci[0].txPdcchPower.beta_pdcch_1_0 = 0; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; + + pdsch = &pdcch->dci[0].pdschCfg; /* fill the PDSCH PDU */ uint8_t cwCount = 0; pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */