X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch_rach.c;h=315ac6e27fdc3e7ee49291e932fcf707dd99d87e;hb=e596baac85d7993d92b3077ddc1b99af14b5e8a6;hp=2f3f4f953bcd259beda825d5b831b549e678f237;hpb=964fd8f1dc9c969e70caf8885332cc086ff22d74;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 2f3f4f953..315ac6e27 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -375,10 +375,8 @@ uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx) * @param[in] shed instance * @return void **/ -void createSchRaCb(SchRaReq *raReq, Inst schInst) +void createSchRaCb(uint8_t ueId, SchRaReq *raReq, Inst schInst) { - uint8_t ueId = 0; - if(raReq->isCFRA) { /* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH, @@ -388,6 +386,7 @@ void createSchRaCb(SchRaReq *raReq, Inst schInst) schCb[schInst].cells[schInst]->numActvUe++; SET_ONE_BIT(raReq->ueCb->ueId, schCb[schInst].cells[schInst]->actvUeBitMap); raReq->ueCb->state = SCH_UE_STATE_ACTIVE; + schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG4_DONE; } } else @@ -396,7 +395,9 @@ void createSchRaCb(SchRaReq *raReq, Inst schInst) GET_UE_ID(raReq->rachInd->crnti, ueId); schCb[schInst].cells[schInst]->raCb[ueId -1].tcrnti = raReq->rachInd->crnti; schCb[schInst].cells[schInst]->raCb[ueId -1].msg4recvd = FALSE; + schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG3_PENDING; } + schCb[schInst].cells[schInst]->raCb[ueId -1].cell = schCb[schInst].cells[schInst]; } /** @@ -414,7 +415,7 @@ void createSchRaCb(SchRaReq *raReq, Inst schInst) * @param[out] msg3NumRb * @return void **/ -SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, SlotTimingInfo msg3SlotTime) +SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, SlotTimingInfo msg3SlotTime, SchUlHqProcCb* msg3HqProc, bool isRetx) { SchCellCb *cell = NULLP; SchUlSlotInfo *schUlSlotInfo = NULLP; @@ -456,7 +457,7 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S tbSize = tbSize / 8 ; /*bits to byte conversion*/ schUlSlotInfo->schPuschInfo->crnti = crnti; - schUlSlotInfo->schPuschInfo->harqProcId = SCH_HARQ_PROC_ID; + schUlSlotInfo->schPuschInfo->harqProcId = msg3HqProc->procId; schUlSlotInfo->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1; schUlSlotInfo->schPuschInfo->fdAlloc.startPrb = startRb; schUlSlotInfo->schPuschInfo->fdAlloc.numPrb = numRb; @@ -471,7 +472,23 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */ schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS; - + if(!isRetx) + { + msg3HqProc->strtSymbl = startSymb; + msg3HqProc->numSymbl = symbLen; + msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo->resAllocType; + msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo->fdAlloc.startPrb; + msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo->fdAlloc.numPrb; + msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo->tbInfo.qamOrder; + msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo->tbInfo.mcs; + msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo->tbInfo.mcsTable; + msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo->tbInfo.ndi; + msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo->tbInfo.rv; + msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo->tbInfo.tbSize; + msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo->dmrsMappingType; + msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols; + msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo->dmrsAddPos; + } return schUlSlotInfo->schPuschInfo; } @@ -539,7 +556,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP; SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP; RaRspWindowStatus windowStatus=0; - + #ifdef NR_TDD totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod); #endif @@ -553,7 +570,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin } /* Calculating time frame to send DCI for RAR */ - ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA); + ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots); dciSlot = dciTime.slot; #ifdef NR_TDD /* Consider this slot for sending DCI, only if it is a DL slot */ @@ -578,7 +595,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0; /* Calculating time frame to send RAR PDSCH */ - ADD_DELTA_TO_TIME(dciTime, rarTime, k0); + ADD_DELTA_TO_TIME(dciTime, rarTime, k0, cell->numSlots); rarSlot = rarTime.slot; /* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */ @@ -603,7 +620,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin k1 = defaultUlAckTbl[k1Index]; } - ADD_DELTA_TO_TIME(rarTime, pucchTime, k1); + ADD_DELTA_TO_TIME(rarTime, pucchTime, k1, cell->numSlots); #ifdef NR_TDD if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT) continue; @@ -626,7 +643,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin k2 = k2 + msg3Delta; if(k2 >= msg3MinSchTime) { - ADD_DELTA_TO_TIME(rarTime, msg3Time, k2); + ADD_DELTA_TO_TIME(rarTime, msg3Time, k2, cell->numSlots); #ifdef NR_TDD if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT) continue; @@ -683,12 +700,12 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin if(cell->raReq[ueId-1]->isCFRA) { /* Allocate resources for PUCCH */ - schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti); + schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti,NULLP, FALSE, NULLP); } else { /* Allocate resources for msg3 */ - msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time); + msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time, &(cell->raCb[ueId-1].msg3HqProc), FALSE); if(msg3PuschInfo) { dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb; @@ -741,7 +758,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId; /* Create raCb at SCH */ - createSchRaCb(cell->raReq[ueId-1], schInst); + createSchRaCb(ueId, cell->raReq[ueId-1], schInst); /* Remove RachInd from pending RA request list */ SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo)); @@ -813,7 +830,7 @@ uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst) winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration; /* Adding window size to window start time to get window end time */ - ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots); + ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots, cell->numSlots); cell->raReq[ueId -1] = raReq; /* Adding UE Id to list of pending UEs to be scheduled */ @@ -1055,7 +1072,23 @@ uint8_t MacSchRachRsrcRel(Pst *pst, SchRachRsrcRel *schRachRsrcRel) SCH_FREE(schRachRsrcRel, sizeof(SchRachRsrcRel)); return ret; } - + /* @brief process MSG4 completion + * + * @details + * + * Function : schMsg4Complete + * + * This function updates ra state and msg4 Hqrq + * proc upon MSG4 completion + * @param[in] SchUeCb *ueCb, UE cb pointer + * @return VOID + */ +void schMsg4Complete(SchUeCb *ueCb) +{ + DU_LOG("\nINFO --> SCH: State change for ueId[%2d] to SCH_RA_STATE_MSG4_DONE\n",ueCb->ueId); + ueCb->cellCb->raCb[ueCb->ueId-1].raState = SCH_RA_STATE_MSG4_DONE; + ueCb->msg4Proc = ueCb->retxMsg4HqProc = NULLP; +} /********************************************************************** End of file **********************************************************************/