X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.h;h=b38c606b89bb5d071343e2e17e011c366388dc92;hb=2e3617064e27b8d7bb5ba74319f8c1c99491b8dd;hp=57a4381750dce0b2a57dd6c646c4a0cd2de21b85;hpb=c449cf0b0cc8794c2e2d28dcc4c9bd8b9534e697;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 57a438175..b38c606b8 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -17,8 +17,6 @@ *******************************************************************************/ /* macros */ -#define SCH_INST_START 1 -#define SCH_MAX_INST 1 #define SCH_MU0_NUM_SLOTS 10 #define SCH_MU1_NUM_SLOTS 20 #define SCH_MU2_NUM_SLOTS 30 @@ -47,7 +45,6 @@ #define NUM_DMRS_SYMBOLS 1 #define DMRS_ADDITIONAL_POS 0 #define SCH_DEFAULT_K1 1 -#define SCH_TQ_SIZE 10 #define SSB_IDX_SUPPORTED 1 #define CRC_FAILED 0 @@ -68,6 +65,8 @@ #define HQ_ACK 0 #define HQ_NACK 1 #define HQ_DTX 2 +#define ROOT_SEQ_LEN_1 139 +#define ROOT_SEQ_LEN_2 839 #ifdef NR_DRX /* As per 38.331 the largest offset which can be used in of size 10240. @@ -76,6 +75,21 @@ #define MAX_DRX_SIZE 512 #endif +#define NUM_SCH_TYPE 2 /*Supported number of Scheduler Algorithm types*/ + +#define SCH_TQ_SIZE 10 + +/*3GPP 38.331,'frequencyDomainResources' :Number of PRBs per Resource Block Group*/ +#define NUM_PRBS_PER_RBG 6 + +/*3GPP 38.214 Table 5.2.2.1-2*/ +#define MAX_NUM_CQI_IDX 16 + +/*3GPP 38.211 Table 7.3.2.1-1*/ +#define MAX_NUM_AGG_LVL 5 + +#define PUCCH_RES_IND 0 + typedef struct schDlHqProcCb SchDlHqProcCb; typedef struct schUlHqEnt SchUlHqEnt; typedef struct schRaReq SchRaReq; @@ -83,6 +97,12 @@ typedef struct schDlHqEnt SchDlHqEnt; typedef struct schCellCb SchCellCb; typedef struct schUeCb SchUeCb; +typedef enum +{ + SCH_FCFS, + SCH_SLICE_BASED +}SchType; + typedef enum { SCH_NUMEROLOGY_0, @@ -127,6 +147,22 @@ typedef enum HQ_TB_WAITING }SchHqTbState; +#ifdef NR_TDD +typedef enum +{ + DL_SLOT, + UL_SLOT, + FLEXI_SLOT +}SlotConfig; + +typedef enum +{ + DL_SYMBOL, + UL_SYMBOL, + FLEXI_SYMBOL +}SchSymbolConfig; +#endif + /*Following structures to keep record and estimations of PRB allocated for each * LC taking into consideration the RRM policies*/ typedef struct lcInfo @@ -137,17 +173,6 @@ typedef struct lcInfo uint8_t allocPRB; /*PRB count which is allocated based on RRM policy/FreePRB*/ }LcInfo; -typedef struct schLcPrbEstimate -{ - /* TODO: For Multiple RRMPolicies, Make DedicatedLcInfo as array/Double Pointer - * and have separate DedLCInfo for each RRMPolcyMemberList*/ - /* Dedicated LC List will be allocated, if any available*/ - CmLListCp dedLcList; /*Contain LCInfo per RRMPolicy*/ - CmLListCp defLcList; /*Linklist of LC assoc with Default S-NSSAI(s)*/ - /* SharedPRB number can be used by any LC. - * Need to calculate in every Slot based on PRB availability*/ - uint16_t sharedNumPrb; -}SchLcPrbEstimate; typedef struct schUlHqTbCb { uint32_t tbSzReq; @@ -188,11 +213,12 @@ typedef struct schDlHqTbCb #ifdef NR_DRX typedef struct schDrxHarqCb { - uint32_t retxStrtIndex; - uint32_t rttIndex; - uint32_t retxIndex; - int16_t retxExpDistance; - uint8_t retxTmrReduction; + uint32_t rttExpIndex; + CmLList *rttExpNode; + uint32_t retxStrtIndex; + CmLList *retxStrtNode; + uint32_t retxExpIndex; + CmLList *retxExpNode; }SchDrxHarqCb; #endif @@ -206,14 +232,15 @@ typedef struct schUlHqProcCb CmLList ulSlotLnk; uint8_t strtSymbl; uint8_t numSymbl; - SchLcPrbEstimate ulLcPrbEst; /*UL PRB Alloc Estimate among different LC*/ + void *schSpcUlHqProcCb; /*!< Scheduler specific HARQ Proc CB */ CmLList ulHqProcLink; - uint8_t puschResType; /* Resource allocation type */ + uint8_t puschResType; /*!< Resource allocation type */ uint16_t puschStartPrb; uint16_t puschNumPrb; uint8_t dmrsMappingType; uint8_t nrOfDmrsSymbols; uint8_t dmrsAddPos; + SlotTimingInfo puschTime; #ifdef NR_DRX SchDrxHarqCb ulDrxHarqCb; #endif @@ -225,11 +252,12 @@ struct schDlHqProcCb SchDlHqEnt *hqEnt; uint8_t maxHqTxPerHqP; CmLList dlHqEntLnk; - CmLList ulSlotLnk; + CmLList dlSlotLnk; SchDlHqTbCb tbInfo[2]; uint8_t k1; - SchLcPrbEstimate dlLcPrbEst; /*DL PRB Alloc Estimate among different LC*/ + void *schSpcDlHqProcCb; /*!< Scheduler specific HARQ Proc CB */ CmLList dlHqProcLink; + SlotTimingInfo pucchTime; #ifdef NR_DRX SchDrxHarqCb dlDrxHarqCb; #endif @@ -261,7 +289,6 @@ struct schDlHqEnt */ typedef struct schGenCb { - uint8_t tmrRes; /*!< Timer resolution */ uint8_t startCellId; /*!< Starting Cell Id */ #ifdef LTE_ADV bool forceCntrlSrbBoOnPCel; /*!< value 1 means force scheduling @@ -286,8 +313,18 @@ typedef struct schPrbAlloc { CmLListCp freePrbBlockList; /*!< List of continuous blocks for available PRB */ uint64_t prbBitMap[ MAX_SYMB_PER_SLOT][PRB_BITMAP_MAX_IDX]; /*!< BitMap to store the allocated PRBs */ + uint16_t numPrbAlloc; }SchPrbAlloc; + +typedef struct schPdcchAllocInfo +{ + uint8_t cRSetId; + uint8_t ssId; + uint8_t aggLvl; + uint16_t cceIndex; +}SchPdcchAllocInfo; + /** * @brief * scheduler allocationsfor DL per cell. @@ -299,11 +336,10 @@ typedef struct schDlSlotInfo uint8_t ssbIdxSupported; /*!< Max SSB index */ SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */ - uint8_t pdcchUe; /*!< UE for which PDCCH is scheduled in this slot */ - uint8_t pdschUe; /*!< UE for which PDSCH is scheduled in this slot */ + uint8_t pdcchUe; /*!< UE for which PDCCH Common is scheduled in this slot */ RarAlloc *rarAlloc[MAX_NUM_UE]; /*!< RAR allocation per UE*/ DciInfo *ulGrant; - DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/ + DlMsgSchInfo *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/ }SchDlSlotInfo; typedef struct schRaCb @@ -392,7 +428,7 @@ typedef struct schUeCfgCb bool phyCellGrpCfgPres; SchPhyCellGrpCfg phyCellGrpCfg; bool spCellCfgPres; - SchSpCellCfg spCellCfg; + SchSpCellRecfg spCellCfg; SchAmbrCfg *ambrCfg; SchModulationInfo dlModInfo; SchModulationInfo ulModInfo; @@ -412,8 +448,12 @@ typedef struct schHqUlMap #ifdef NR_DRX typedef struct schDrxUeCb { - uint32_t drxDlUeActiveStatus; /* variable is used to store the status about downlink active status */ - uint32_t drxUlUeActiveStatus; /* variable is used to store the status about uplink active status */ + bool drxDlUeActiveStatus; /* Final Dl Ue status which is marked as true if drxDlUeActiveMask or drxDlUeActiveMaskForHarq is present */ + bool drxUlUeActiveStatus; /* Final Ul Ue status which is marked as true if drxUlUeActiveMask or drxUlUeActiveMaskForHarq is present */ + uint32_t drxDlUeActiveMask; /* variable is used to store the status about downlink active status of Ue for On-duration, inactive timer*/ + uint32_t drxUlUeActiveMask; /* variable is used to store the status about uplink active status for on-duration inactive timer*/ + uint32_t drxDlUeActiveMaskForHarq; /* variable is used to store the status about downlink active status for harq*/ + uint32_t drxUlUeActiveMaskForHarq; /* variable is used to store the status about uplink active status for harq */ uint32_t onDurationLen; /* length of on duration which is received from ue cfg/recfg in form of ms and subms, informs about after how many slots on duration gets expire */ uint32_t inActvTimerLen; /* length of inActvTimer value received from ue cfg/recfg in form of ms, informs about after how many slots in active gets expire */ uint8_t harqRttDlTimerLen; /* length of harqRttDlTimer received from ue cfg/recfg in form of symbols, inform about after how many slots on the harq drx-HARQ-RTT-TimerDL expire */ @@ -441,6 +481,18 @@ typedef struct schDrxUeCb CmLList *shortCycleTmrExpiryNodeInfo; /* Node present in short cycle exp list*/ }SchDrxUeCb; #endif + +typedef struct schPdcchInfo +{ + SchControlRsrcSet *cRSetRef; /*Coreset Cfg reference from SchUeCfgCb*/ + SchSearchSpace *ssRef; /*SearchSpace Cfg reference from SchUeCfgCb*/ + uint16_t totalPrbs; /*Total PRBs configured for this CORESET*/ + uint8_t nrOfPRBPerCce; /*CCE Size*/ + uint8_t totalCceCount; /*Count of CCE in this CORESET*/ + uint8_t cqiIndxAggLvlMap[MAX_NUM_CQI_IDX];/*Agg Level to be used for each CQI Index*/ + uint32_t *y; /*Coefficient variable to calculate CCE Index as per 3gpp Spec 38.213 Sec 10.1*/ +}SchPdcchInfo; + /** * @brief * UE control block @@ -460,16 +512,20 @@ typedef struct schUeCb SchDlCb dlInfo; SchUlHqEnt ulHqEnt; SchDlHqEnt dlHqEnt; - SchDlHqProcCb *msg4Proc; + SchDlHqProcCb *msg4HqProc; SchDlHqProcCb *retxMsg4HqProc; - SchHqDlMap **hqDlmap; - SchHqUlMap **hqUlmap; - CmLListCp ulRetxHqList; - CmLListCp dlRetxHqList; + SchHqDlMap **hqDlmap; + SchHqUlMap **hqUlmap; + void *schSpcUeCb; #ifdef NR_DRX - bool ueDrxInfoPres; - SchDrxUeCb drxUeCb; + bool ueDrxInfoPres; + SchDrxUeCb drxUeCb; #endif + bool k0K1TblPrsnt; + SchK0K1TimingInfoTbl k0K1InfoTbl; + bool k2TblPrsnt; + SchK2TimingInfoTbl k2InfoTbl; + SchPdcchInfo pdcchInfo[MAX_NUM_CRSET]; }SchUeCb; /** @@ -524,6 +580,92 @@ typedef struct schDrxCb }SchDrxCb; #endif +typedef struct schAllApis +{ + uint8_t (* SchCellCfgReq)(SchCellCb *cellCb); + void (* SchCellDeleteReq)(SchCellCb *cellCb); + uint8_t (* SchAddUeConfigReq)(SchUeCb *ueCb); + void (* SchModUeConfigReq)(SchUeCb *ueCb); + void (* SchUeDeleteReq)(SchUeCb *ueCb); + void (* SchDlHarqInd)(); + void (* SchPagingInd)(); + void (* SchRachRsrcReq)(); + void (* SchRachRsrcRel)(); + void (* SchCrcInd)(SchCellCb *cellCb, uint16_t ueId); + void (* SchRachInd)(SchCellCb *cellCb, uint16_t ueId); + void (* SchDlRlcBoInfo)(SchCellCb *cellCb, uint16_t ueId); + void (* SchSrUciInd)(SchCellCb *cellCb, uint16_t ueId); + void (* SchBsr)(SchCellCb *cellCb, uint16_t ueId); + void (* SchHandleLcList)(void *ptr, CmLList *node, ActionTypeLL action); + void (* SchAddToDlHqRetxList)(SchDlHqProcCb *hqP); + void (* SchAddToUlHqRetxList)(SchUlHqProcCb *hqP); + void (* SchRemoveFrmDlHqRetxList)(SchUeCb *ueCb, CmLList *node); + void (* SchRemoveFrmUlHqRetxList)(SchUeCb *ueCb, CmLList *node); + uint8_t (* SchAddUeToSchedule)(SchCellCb *cellCb, uint16_t ueId); + void (* SchRemoveUeFrmScheduleLst)(SchCellCb *cell, CmLList *node); + uint8_t (* SchInitDlHqProcCb)(SchDlHqProcCb *hqP); + uint8_t (* SchInitUlHqProcCb)(SchUlHqProcCb *hqP); + void (* SchFreeDlHqProcCb)(SchDlHqProcCb *hqP); + void (* SchFreeUlHqProcCb)(SchUlHqProcCb *hqP); + void (* SchDeleteDlHqProcCb)(SchDlHqProcCb *hqP); + void (* SchDeleteUlHqProcCb)(SchUlHqProcCb *hqP); + void (* SchScheduleSlot)(SchCellCb *cell, SlotTimingInfo *slotInd, Inst schInst); + uint32_t (* SchScheduleDlLc)(SlotTimingInfo pdcchTime, SlotTimingInfo pdschTime, uint8_t pdschNumSymbols, \ + uint16_t *startPrb, bool isRetx, SchDlHqProcCb **hqP); + uint8_t (* SchScheduleUlLc)(SlotTimingInfo dciTime, SlotTimingInfo puschTime, uint8_t startStmb, \ + uint8_t symbLen, bool isRetx, SchUlHqProcCb **hqP); +}SchAllApis; + +typedef struct schHqCfgParam +{ + uint8_t maxDlDataHqTx; + uint8_t maxMsg4HqTx; + uint8_t maxUlDataHqTx; +}SchHqCfg; + +typedef struct +{ + /* parameters derived in scheduler */ + uint8_t n0; + BwpCfg bwp; + PdcchCfg sib1PdcchCfg; + PdschCfg sib1PdschCfg; +}SchSib1Cfg; + +typedef struct dlTotalPrbUsage +{ + uint16_t numPrbUsedForTx; + uint16_t totalPrbAvailForTx; +}TotalPrbUsage; + +typedef struct +{ + TotalPrbUsage *dlTotalPrbUsage; + TotalPrbUsage *ulTotalPrbUsage; +}SchKpiSupported; + +typedef struct +{ + CmLListCp dlTotPrbUseList; + CmLListCp ulTotPrbUseList; +}SchKpiActive; + +typedef struct schStatsGrp +{ + Inst schInst; + uint64_t subscriptionId; + uint8_t groupId; + uint16_t periodicity; /* In milliseconds */ + CmTimer periodTimer; + SchKpiSupported kpiStats; +}SchStatsGrp; + +typedef struct schStatistics +{ + CmLListCp statsGrpList; + SchKpiActive activeKpiList; +}SchStatistics; + /** * @brief * Cell Control block per cell. @@ -538,6 +680,7 @@ typedef struct schCellCb SchDlSlotInfo **schDlSlotInfo; /*!< SCH resource allocations in DL */ SchUlSlotInfo **schUlSlotInfo; /*!< SCH resource allocations in UL */ SchCellCfg cellCfg; /*!< Cell ocnfiguration */ + uint8_t numerology; bool firstSsbTransmitted; bool firstSib1Transmitted; uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!< start symbol per SSB beam */ @@ -548,24 +691,32 @@ typedef struct schCellCb uint32_t actvUeBitMap; /*!< Bit map to find active UEs */ uint32_t boIndBitMap; /*!< Bit map to indicate UEs that have recevied BO */ SchUeCb ueCb[MAX_NUM_UE]; /*!< Pointer to UE contexts of this cell */ - CmLListCp ueToBeScheduled; /*!< Linked list to store UEs pending to be scheduled, */ SchPageCb pageCb; /*!< Page Record at Schedular*/ #ifdef NR_TDD uint8_t numSlotsInPeriodicity; /*!< number of slots in configured periodicity and SCS */ uint32_t slotFrmtBitMap; /*!< 2 bits must be read together to determine D/U/S slots. 00-D, 01-U, 10-S */ - uint32_t symbFrmtBitMap; /*!< 2 bits must be read together to determine D/U/S symbols. 00-D, 01-U, 10-S */ + SchSymbolConfig slotCfg[MAX_TDD_PERIODICITY_SLOTS][MAX_SYMB_PER_SLOT]; #endif #ifdef NR_DRX SchDrxCb drxCb[MAX_DRX_SIZE]; /*!< Drx cb*/ #endif + SchType schAlgoType; /*!< The scheduler type which the cell is configured with.*/ + SchAllApis *api; /*!< Reference of sch APIs for this cell based on the SchType*/ + void *schSpcCell; /*Ref of Scheduler specific structure*/ + SchHqCfg schHqCfg; + SchK0K1TimingInfoTbl k0K1InfoTbl; + SchK2TimingInfoTbl msg3K2InfoTbl; + SchK2TimingInfoTbl k2InfoTbl; + SchSib1Cfg sib1SchCfg; /* SIB1 config */ + uint8_t maxMsg3Tx; /* MAximum num of msg3 tx*/ }SchCellCb; - -typedef struct schSliceCfg +typedef struct schTimer { - uint8_t numOfSliceConfigured; - SchRrmPolicyOfSlice **listOfConfirguration; -}SchSliceCfg; + CmTqCp tmrTqCp; /*!< Timer Task Queue Cntrl Point */ + CmTqType tmrTq[SCH_TQ_SIZE]; /*!< Timer Task Queue */ + uint8_t tmrRes; /*!< Timer resolution */ +}SchTimer; /** * @brief @@ -573,12 +724,13 @@ typedef struct schSliceCfg */ typedef struct schCb { - TskInit schInit; /*!< Task Init info */ - SchGenCb genCfg; /*!< General Config info */ - CmTqCp tmrTqCp; /*!< Timer Task Queue Cntrl Point */ - CmTqType tmrTq[SCH_TQ_SIZE]; /*!< Timer Task Queue */ - SchCellCb *cells[MAX_NUM_CELL]; /* Array to store cellCb ptr */ - SchSliceCfg sliceCfg; + TskInit schInit; /*!< Task Init info */ + SchGenCb genCfg; /*!< General Config info */ + SchTimer schTimersInfo; /*!< Sch timer queues and resolution */ + SchAllApis allApis[NUM_SCH_TYPE]; /*!