X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.h;h=75ca894b34c3658407f315c5b8d12f08cf7adf98;hb=488f5ed56e82148cd09eb8c4e62ad6f0009d6761;hp=478cc3cf3d30ce2a3bb516fbcbe45387257838d1;hpb=d76403d03e7b7f60cd515f1b834d28278685a70b;p=o-du%2Fl2.git

diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h
index 478cc3cf3..75ca894b3 100644
--- a/src/5gnrsch/sch.h
+++ b/src/5gnrsch/sch.h
@@ -51,7 +51,6 @@
 #define DMRS_ADDITIONAL_POS 0
 #define SCH_DEFAULT_K1 1
 #define SCH_TQ_SIZE 10
-#define SCH_RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
 
 #define CRC_FAILED 0
 #define CRC_PASSED 1
@@ -210,6 +209,18 @@ typedef struct schUeCb
    SchDlCb    dlInfo;
 }SchUeCb;
 
+/**
+ * @brief
+ * RA Request Info
+ */
+typedef struct schRaReq
+{
+   uint32_t        raRnti;
+   RachIndInfo     *rachInd;
+   SlotTimingInfo  winStartTime;
+   SlotTimingInfo  winEndTime;
+}SchRaReq;
+
 /**
  * @brief
  * Cell Control block per cell.
@@ -220,14 +231,15 @@ typedef struct schCellCb
    Inst          instIdx;                           /*!< Index of the scheduler instance */
    Inst          macInst;                           /*!< Index of the MAC instance */
    uint8_t       numSlots;                          /*!< Number of slots in current frame */
-   SlotIndInfo   slotInfo;                          /*!< SFN, Slot info being processed*/
+   SlotTimingInfo   slotInfo;                          /*!< SFN, Slot info being processed*/
    SchDlSlotInfo **schDlSlotInfo;                   /*!< SCH resource allocations in DL */
    SchUlSlotInfo **schUlSlotInfo;                   /*!< SCH resource allocations in UL */
    SchCellCfg    cellCfg;                           /*!< Cell ocnfiguration */
    bool          firstSsbTransmitted;
    bool          firstSib1Transmitted;
    uint8_t       ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
-   SchRaCb       raCb[MAX_NUM_UE];                  /*!< Rach Cb */
+   SchRaReq      *raReq[MAX_NUM_UE];                /*!< Pending RA request */
+   SchRaCb       raCb[MAX_NUM_UE];                  /*!< RA Cb */
    uint16_t      numActvUe;                         /*!<Number of active UEs */
    uint32_t      actvUeBitMap;                      /*!<Bit map to find active UEs */
    uint32_t      boIndBitMap;                       /*!<Bit map to indicate UEs that have recevied BO */
@@ -256,9 +268,13 @@ typedef struct schCb
 SchCb schCb[SCH_MAX_INST];
 
 /* function declarations */
+SchUeCb* schGetUeCb(SchCellCb *cellCb, uint16_t crnti);
+void schInitUlSlot(SchUlSlotInfo *schUlSlotInfo);
+void schInitDlSlot(SchDlSlotInfo *schDlSlotInfo);
+uint8_t SchSendCfgCfm(Pst *pst, RgMngmt *cfm);
 short int schActvTmr(Ent ent,Inst inst);
 uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc,uint16_t slot);
-uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst inst);
+uint8_t schProcessSlotInd(SlotTimingInfo *slotInd, Inst inst);
 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst);
 uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot, bool ssbPresent, bool sib1Present);
 uint16_t schCalcTbSize(uint32_t payLoadSize);
@@ -271,7 +287,9 @@ uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t cr
    uint32_t *accumalatedSize, uint16_t slot);
 uint16_t schAccumalateLcBoSize(SchCellCb *cell, uint16_t ueIdx);
 uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, bool ssbPresent, bool sib1Present);
-
+void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
+SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl);
+void schProcessRaReq(SlotTimingInfo currTime, SchCellCb *cellCb);
 /**********************************************************************
   End of file
  **********************************************************************/