X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.h;h=65c2a25e0f4dd7bc64e2ba58972fae75dbd7b959;hb=34dbaa11b812648ba3fbea113d9772947ed6b85c;hp=d99f6718307ca12280da6b3391591f9ac2adb969;hpb=653aa9a77c383713ea88d4b34759b333576646b4;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index d99f67183..65c2a25e0 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -25,8 +25,13 @@ #define SCH_MU3_NUM_SLOTS 40 #define SCH_MU4_NUM_SLOTS 50 #define SCH_MAX_SFN 1024 -#define MAX_NUM_RB 106 /* value for numerology 0 15Khz */ -#define SCH_MIB_TRANS 80 +#ifdef NR_TDD +#define MAX_NUM_RB 275 /* value for numerology 1, 100 MHz */ +#else +#define MAX_NUM_RB 106 /* value for numerology 0, 20 MHz */ +#endif +#define SCH_MIB_TRANS 8 /* MIB transmission as per 38.331 is every 80 ms */ +#define SCH_SIB1_TRANS 16 /* SIB1 transmission as per 38.331 is every 160 ms */ #define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */ #define SCH_MAX_SSB_BEAM 8 /* since we are supporting only SCS=15KHz and 30KHz */ #define SCH_SYMBOL_PER_SLOT 14 @@ -36,14 +41,17 @@ #define BO_DELTA 1 #define RAR_DELAY 2 #define MSG4_DELAY 1 +#define PDSCH_START_RB 10 #define PUSCH_START_RB 15 #define PUCCH_NUM_PRB_FORMAT_0_1_4 1 /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */ #define SI_RNTI 0xFFFF #define P_RNTI 0xFFFE #define DMRS_MAP_TYPE_A 1 -#define NUM_DMRS_SYMBOLS 12 -#define DMRS_ADDITIONAL_POS 2 +#define NUM_DMRS_SYMBOLS 1 +#define DMRS_ADDITIONAL_POS 0 #define SCH_DEFAULT_K1 1 +#define SCH_TQ_SIZE 10 +#define SSB_IDX_SUPPORTED 1 #define CRC_FAILED 0 #define CRC_PASSED 1 @@ -75,6 +83,13 @@ typedef enum SCH_LC_STATE_ACTIVE }SchLcState; +typedef enum +{ + WINDOW_YET_TO_START, + WITHIN_WINDOW, + WINDOW_EXPIRED +}RaRspWindowStatus; + /** * @brief * Structure holding LTE MAC's General Configuration information. @@ -99,12 +114,13 @@ typedef struct schDlSlotInfo { uint16_t totalPrb; /*!< Number of RBs in the cell */ uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */ + uint16_t resAllocBitMap; /*!< Resource allocation bitmap */ bool ssbPres; /*!< Flag to determine if SSB is present in this slot */ uint8_t ssbIdxSupported; /*!< Max SSB index */ SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */ - RarInfo *rarInfo; /*!< RAR info */ - DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */ + RarAlloc *rarAlloc; /*!< RAR allocation */ + DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */ }SchDlSlotInfo; typedef struct schRaCb @@ -120,6 +136,7 @@ typedef struct schUlSlotInfo { uint16_t totalPrb; /*!< Number of RBs in the cell */ uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */ + uint16_t resAllocBitMap; /*!< Resource allocation bitmap */ uint8_t puschCurrentPrb; /* Current PRB for PUSCH allocation */ bool puschPres; /*!< PUSCH presence field */ SchPuschInfo *schPuschInfo; /*!< PUSCH info */ @@ -143,6 +160,8 @@ typedef struct schLcCtxt uint8_t lcp; // logical Channel Prioritization SchLcState lcState; uint32_t bo; + uint16_t pduSessionId; /*Pdu Session Id*/ + SchSnssai *snssai; /*S-NSSAI assoc with LCID*/ }SchDlLcCtxt; typedef struct schDlCb @@ -160,6 +179,8 @@ typedef struct schUlLcCtxt uint8_t schReqId; uint8_t pbr; // prioritisedBitRate uint8_t bsd; // bucketSizeDuration + uint16_t pduSessionId; /*Pdu Session Id*/ + SchSnssai *snssai; /*S-NSSAI assoc with LCID*/ }SchUlLcCtxt; typedef struct schUlCb @@ -168,6 +189,21 @@ typedef struct schUlCb SchUlLcCtxt ulLcCtxt[MAX_NUM_LC]; }SchUlCb; +typedef struct schUeCfgCb +{ + uint16_t cellId; + uint16_t crnti; + bool macCellGrpCfgPres; + SchMacCellGrpCfg macCellGrpCfg; + bool phyCellGrpCfgPres; + SchPhyCellGrpCfg phyCellGrpCfg; + bool spCellCfgPres; + SchSpCellCfg spCellCfg; + SchAmbrCfg *ambrCfg; + SchModulationInfo dlModInfo; + SchModulationInfo ulModInfo; +}SchUeCfgCb; + /** * @brief * UE control block @@ -176,7 +212,7 @@ typedef struct schUeCb { uint16_t ueIdx; uint16_t crnti; - SchUeCfg ueCfg; + SchUeCfgCb ueCfg; SchUeState state; SchCellCb *cellCb; bool srRcvd; @@ -185,6 +221,18 @@ typedef struct schUeCb SchDlCb dlInfo; }SchUeCb; +/** + * @brief + * RA Request Info + */ +typedef struct schRaReq +{ + uint32_t raRnti; + RachIndInfo *rachInd; + SlotTimingInfo winStartTime; + SlotTimingInfo winEndTime; +}SchRaReq; + /** * @brief * Cell Control block per cell. @@ -195,14 +243,15 @@ typedef struct schCellCb Inst instIdx; /*!< Index of the scheduler instance */ Inst macInst; /*!< Index of the MAC instance */ uint8_t numSlots; /*!< Number of slots in current frame */ - SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/ + SlotTimingInfo slotInfo; /*!< SFN, Slot info being processed*/ SchDlSlotInfo **schDlSlotInfo; /*!< SCH resource allocations in DL */ SchUlSlotInfo **schUlSlotInfo; /*!< SCH resource allocations in UL */ SchCellCfg cellCfg; /*!< Cell ocnfiguration */ bool firstSsbTransmitted; bool firstSib1Transmitted; uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!