X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.h;h=65c2a25e0f4dd7bc64e2ba58972fae75dbd7b959;hb=34dbaa11b812648ba3fbea113d9772947ed6b85c;hp=27f4aa9e1ea0c97da1b23a687fc528124d3ff6ed;hpb=ace81c4951bcf19172a207377f57da42dc112515;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 27f4aa9e1..65c2a25e0 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -51,6 +51,7 @@ #define DMRS_ADDITIONAL_POS 0 #define SCH_DEFAULT_K1 1 #define SCH_TQ_SIZE 10 +#define SSB_IDX_SUPPORTED 1 #define CRC_FAILED 0 #define CRC_PASSED 1 @@ -82,6 +83,13 @@ typedef enum SCH_LC_STATE_ACTIVE }SchLcState; +typedef enum +{ + WINDOW_YET_TO_START, + WITHIN_WINDOW, + WINDOW_EXPIRED +}RaRspWindowStatus; + /** * @brief * Structure holding LTE MAC's General Configuration information. @@ -111,8 +119,8 @@ typedef struct schDlSlotInfo uint8_t ssbIdxSupported; /*!< Max SSB index */ SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */ - RarInfo *rarInfo; /*!< RAR info */ - DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */ + RarAlloc *rarAlloc; /*!< RAR allocation */ + DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */ }SchDlSlotInfo; typedef struct schRaCb @@ -152,6 +160,8 @@ typedef struct schLcCtxt uint8_t lcp; // logical Channel Prioritization SchLcState lcState; uint32_t bo; + uint16_t pduSessionId; /*Pdu Session Id*/ + SchSnssai *snssai; /*S-NSSAI assoc with LCID*/ }SchDlLcCtxt; typedef struct schDlCb @@ -169,6 +179,8 @@ typedef struct schUlLcCtxt uint8_t schReqId; uint8_t pbr; // prioritisedBitRate uint8_t bsd; // bucketSizeDuration + uint16_t pduSessionId; /*Pdu Session Id*/ + SchSnssai *snssai; /*S-NSSAI assoc with LCID*/ }SchUlLcCtxt; typedef struct schUlCb @@ -286,12 +298,18 @@ uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, S uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t crnti, uint32_t *accumalatedSize, uint16_t slot); uint16_t schAccumalateLcBoSize(SchCellCb *cell, uint16_t ueIdx); -uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, bool ssbPresent, bool sib1Present); -void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\ -SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl); +uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, \ + uint8_t k0Index, bool ssbPresent, bool sib1Present); void schProcessRaReq(SlotTimingInfo currTime, SchCellCb *cellCb); -void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\ -SchK2TimingInfoTbl *k2InfoTbl); + +void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, \ +SchPdschCfgCmn pdschCmnCfg,SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl); +void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], \ +uint16_t puschSymTblSize, SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl); + +PduTxOccsaion schCheckSsbOcc(SlotTimingInfo slotTime, SchCellCb *cell); +PduTxOccsaion schCheckSib1Occ(SlotTimingInfo slotTime, SchCellCb *cell); + /********************************************************************** End of file **********************************************************************/