X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.h;h=523ee97579eb4513db738f16fc56b1b4429c1057;hb=bd2905b5f651349abafb7934a952414d7c24e291;hp=3c78a5024ab5b9cec55644edb8de4a11c9afdf4d;hpb=53d1aa768db96eca4c320f5e46da800c08c82006;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 3c78a5024..523ee9757 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -74,7 +74,8 @@ typedef enum typedef enum { SCH_UE_STATE_INACTIVE, - SCH_UE_STATE_ACTIVE + SCH_UE_STATE_ACTIVE, + SCH_UE_HANDIN_IN_PROGRESS }SchUeState; typedef enum @@ -90,12 +91,6 @@ typedef enum WINDOW_EXPIRED }RaRspWindowStatus; -typedef enum -{ - SEARCH, - CREATE, - DELETE -}ActionTypeLcLL; /** * @brief * Structure holding LTE MAC's General Configuration information. @@ -140,13 +135,18 @@ typedef struct schDlSlotInfo uint8_t ssbIdxSupported; /*!< Max SSB index */ SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */ - RarAlloc *rarAlloc; /*!< RAR allocation */ - DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */ + uint8_t pdcchUe; /*!< UE for which PDCCH is scheduled in this slot */ + uint8_t pdschUe; /*!< UE for which PDSCH is scheduled in this slot */ + RarAlloc *rarAlloc[MAX_NUM_UE]; /*!< RAR allocation per UE*/ + DciInfo *ulGrant; + DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/ }SchDlSlotInfo; typedef struct schRaCb { - uint16_t tcrnti; + bool msg4recvd; + uint16_t tcrnti; + uint16_t dlMsgPduLen; }SchRaCb; /** @@ -155,12 +155,14 @@ typedef struct schRaCb */ typedef struct schUlSlotInfo { - SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */ - uint8_t puschCurrentPrb; /*!< Current PRB for PUSCH allocation */ - bool puschPres; /*!< PUSCH presence field */ - SchPuschInfo *schPuschInfo; /*!< PUSCH info */ - bool pucchPres; /*!< PUCCH presence field */ - SchPucchInfo schPucchInfo; /*!< PUCCH info */ + SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */ + uint8_t puschCurrentPrb; /*!< Current PRB for PUSCH allocation */ + bool puschPres; /*!< PUSCH presence field */ + SchPuschInfo *schPuschInfo; /*!< PUSCH info */ + bool pucchPres; /*!< PUCCH presence field */ + SchPucchInfo schPucchInfo; /*!< PUCCH info */ + uint8_t pucchUe; /*!< Store UE id for which PUCCH is scheduled */ + uint8_t puschUe; /*!< Store UE id for which PUSCH is scheduled */ }SchUlSlotInfo; /** @@ -211,6 +213,7 @@ typedef struct schUlCb typedef struct schUeCfgCb { uint16_t cellId; + uint8_t ueId; uint16_t crnti; bool macCellGrpCfgPres; SchMacCellGrpCfg macCellGrpCfg; @@ -221,6 +224,7 @@ typedef struct schUeCfgCb SchAmbrCfg *ambrCfg; SchModulationInfo dlModInfo; SchModulationInfo ulModInfo; + SchDataTransmission dataTransmissionAction; }SchUeCfgCb; /*Following structures to keep record and estimations of PRB allocated for each @@ -259,12 +263,13 @@ typedef struct schLcPrbEstimate */ typedef struct schUeCb { - uint16_t ueIdx; + uint16_t ueId; uint16_t crnti; SchUeCfgCb ueCfg; SchUeState state; SchCellCb *cellCb; bool srRcvd; + bool bsrRcvd; BsrInfo bsrInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS]; SchUlCb ulInfo; SchDlCb dlInfo; @@ -284,6 +289,31 @@ typedef struct schRaReq SlotTimingInfo winEndTime; }SchRaReq; +typedef struct schPageInfo +{ + uint8_t pf; /*Value of Paging Frame received from DUAPP*/ + uint8_t i_s; /*Value of Paging Occ Index received from DUAPP*/ + SlotTimingInfo TxTime; /*Start Paging window*/ + uint8_t crntSsbIdx; /*Counts the slot till totalSSB is receached*/ + uint8_t mcs; + uint8_t nPRB; + uint16_t msgLen; + uint8_t *pagePdu; +}SchPageInfo; + +typedef struct schPagingOcc +{ + uint8_t frameOffset; + uint8_t pagingOccSlot; +}SchPagingOcc; + +typedef struct schPageCb +{ + CmLListCp pageReqInfoRecord[MAX_SFN]; /*List of Page Records received which are stored per sfn*/ + SchPagingOcc pagMonOcc[MAX_PO_PER_PF]; /*Paging Occasion Slot/FrameOffset are stored*/ + SchPageInfo currPageInfo; /*Page Req which is being currently processed */ +}SchPageCb; + /** * @brief * Cell Control block per cell. @@ -307,6 +337,8 @@ typedef struct schCellCb uint32_t actvUeBitMap; /*!