X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.h;h=4281ef808b3189e42b9b17330f2f6e2277fa7969;hb=2bd852089c3226f721d83b30f816b90f803237f6;hp=8212299ded3d6d859a3536d0944725e386c6c500;hpb=a733e46886692ec1525a60243fcfe4465da6457b;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 8212299de..4281ef808 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -59,6 +59,20 @@ #define PRB_BITMAP_IDX_LEN 64 #define PRB_BITMAP_MAX_IDX ((MAX_NUM_RB + PRB_BITMAP_IDX_LEN-1) / PRB_BITMAP_IDX_LEN) +#define SCH_MAX_NUM_UL_HQ_PROC 16 +#define SCH_MAX_NUM_DL_HQ_PROC 16 +#define SCH_MAX_NUM_MSG3_TX 2 +#define SCH_MAX_NUM_DL_HQ_TX 3 +#define SCH_MAX_NUM_UL_HQ_TX 3 +#define SCH_MAX_NUM_MSG4_TX 2 +#define HQ_ACK 0 +#define HQ_NACK 1 +#define HQ_DTX 2 + +typedef struct schDlHqProcCb SchDlHqProcCb; +typedef struct schUlHqEnt SchUlHqEnt; +typedef struct schRaReq SchRaReq; +typedef struct schDlHqEnt SchDlHqEnt; typedef struct schCellCb SchCellCb; typedef struct schUeCb SchUeCb; @@ -74,9 +88,18 @@ typedef enum typedef enum { SCH_UE_STATE_INACTIVE, - SCH_UE_STATE_ACTIVE + SCH_UE_STATE_ACTIVE, + SCH_UE_HANDIN_IN_PROGRESS }SchUeState; +typedef enum +{ + SCH_RA_STATE_MSG2_HANDLE, + SCH_RA_STATE_MSG3_PENDING, + SCH_RA_STATE_MSG4_PENDING, + SCH_RA_STATE_MSG4_DONE +}SchRaState; + typedef enum { SCH_LC_STATE_INACTIVE, @@ -90,12 +113,124 @@ typedef enum WINDOW_EXPIRED }RaRspWindowStatus; -typedef enum +typedef enum +{ + HQ_TB_ACKED=0, + HQ_TB_NACKED, + HQ_TB_WAITING +}SchHqTbState; + +/*Following structures to keep record and estimations of PRB allocated for each + * LC taking into consideration the RRM policies*/ +typedef struct lcInfo { - SEARCH, - CREATE, - DELETE -}ActionTypeLcLL; + uint8_t lcId; /*LCID for which BO are getting recorded*/ + uint32_t reqBO; /*Size of the BO requested/to be allocated for this LC*/ + uint32_t allocBO; /*TBS/BO Size which is actually allocated*/ + uint8_t allocPRB; /*PRB count which is allocated based on RRM policy/FreePRB*/ +}LcInfo; + +typedef struct schLcPrbEstimate +{ + /* TODO: For Multiple RRMPolicies, Make DedicatedLcInfo as array/Double Pointer + * and have separate DedLCInfo for each RRMPolcyMemberList*/ + /* Dedicated LC List will be allocated, if any available*/ + CmLListCp dedLcList; /*Contain LCInfo per RRMPolicy*/ + CmLListCp defLcList; /*Linklist of LC assoc with Default S-NSSAI(s)*/ + /* SharedPRB number can be used by any LC. + * Need to calculate in every Slot based on PRB availability*/ + uint16_t sharedNumPrb; +}SchLcPrbEstimate; +typedef struct schUlHqTbCb +{ + uint32_t tbSzReq; + uint32_t tbSzAllc; + uint8_t ndi; + uint8_t rv; + uint8_t rvIdx; + uint8_t qamOrder; + SchMcsTable mcsTable; + uint8_t iMcs; + uint8_t iMcsInDci; + uint8_t numLyrs; + uint8_t txCntr; + SchHqTbState state; + uint8_t cntrRetxAllocFail; + uint8_t statsBitmap; +}SchUlHqTbCb; + +typedef struct schDlHqTbCb +{ + uint8_t tbIdx; + Bool isEnabled; + uint32_t tbSzReq; + uint8_t txCntr; + uint8_t ndi; + uint8_t rv; + uint8_t rvIdx; + uint8_t iMcs; + uint8_t iMcsInDci; + uint8_t numLyrs; + SchHqTbState state; + uint8_t isAckNackDtx; + uint8_t cntrRetxAllocFail; + //InfUeTbInfo tbCompInfo; + uint8_t statsBitmap; +}SchDlHqTbCb; + +typedef struct schUlHqProcCb +{ + uint8_t procId; /*!< HARQ Process ID */ + SchUlHqEnt *hqEnt; + uint8_t maxHqTxPerHqP; + SchUlHqTbCb tbInfo; + CmLList ulHqEntLnk; + CmLList ulSlotLnk; + uint8_t strtSymbl; + uint8_t numSymbl; + SchLcPrbEstimate ulLcPrbEst; /*UL PRB Alloc Estimate among different LC*/ + CmLList ulHqProcLink; + uint8_t puschResType; /* Resource allocation type */ + uint16_t puschStartPrb; + uint16_t puschNumPrb; + uint8_t dmrsMappingType; + uint8_t nrOfDmrsSymbols; + uint8_t dmrsAddPos; +}SchUlHqProcCb; + +struct schDlHqProcCb +{ + uint8_t procId; /*!< HARQ Process ID */ + SchDlHqEnt *hqEnt; + uint8_t maxHqTxPerHqP; + CmLList dlHqEntLnk; + CmLList ulSlotLnk; + SchDlHqTbCb tbInfo[2]; + uint8_t k1; + SchLcPrbEstimate dlLcPrbEst; /*DL PRB Alloc Estimate among different LC*/ + CmLList dlHqProcLink; +}; +struct schUlHqEnt +{ + SchCellCb *cell; /*!< Contains the pointer to cell*/ + SchUeCb *ue; /*!< Contains the pointer to ue*/ + CmLListCp free; /*!< List of free HARQ processes */ + CmLListCp inUse; /*!< List of in-use HARQ processes */ + uint8_t maxHqTx; /*!< Maximum number of harq re-transmissions */ + uint8_t numHqPrcs; /*!< Number of HARQ Processes */ + SchUlHqProcCb procs[SCH_MAX_NUM_UL_HQ_PROC]; /*!< Uplink harq process info */ +}; +struct schDlHqEnt +{ + SchCellCb *cell; /*!< Contains the pointer to cell */ + SchUeCb *ue; /*!< Contains the pointer to UE */ + CmLListCp free; /*!< List of free HARQ processes */ + CmLListCp inUse; /*!< List of in-use HARQ processes */ + uint8_t maxHqTx; /*!< Maximum number of harq transmissions */ + uint8_t numHqPrcs; /*!< Number of HARQ Processes */ + SchDlHqProcCb procs[SCH_MAX_NUM_DL_HQ_PROC];/*!< Downlink harq processes */ +}; + /** * @brief * Structure holding LTE MAC's General Configuration information. @@ -140,15 +275,24 @@ typedef struct schDlSlotInfo uint8_t ssbIdxSupported; /*!< Max SSB index */ SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */ - RarAlloc *rarAlloc; /*!< RAR allocation */ - DlMsgAlloc *dlMsgAlloc; /*!< Dl msg allocation */ + uint8_t pdcchUe; /*!< UE for which PDCCH is scheduled in this slot */ + uint8_t pdschUe; /*!< UE for which PDSCH is scheduled in this slot */ + RarAlloc *rarAlloc[MAX_NUM_UE]; /*!< RAR allocation per UE*/ + DciInfo *ulGrant; + DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/ }SchDlSlotInfo; typedef struct schRaCb { + uint8_t ueId; bool msg4recvd; - DlMsgInfo dlMsgInfo; uint16_t tcrnti; + uint16_t dlMsgPduLen; + SchUlHqProcCb msg3HqProc; + SchUlHqProcCb *retxMsg3HqProc; + SchRaState raState; + SchCellCb *cell; + SchRaReq *raReq; }SchRaCb; /** @@ -157,12 +301,14 @@ typedef struct schRaCb */ typedef struct schUlSlotInfo { - SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */ - uint8_t puschCurrentPrb; /*!< Current PRB for PUSCH allocation */ - bool puschPres; /*!< PUSCH presence field */ - SchPuschInfo *schPuschInfo; /*!< PUSCH info */ - bool pucchPres; /*!< PUCCH presence field */ - SchPucchInfo schPucchInfo; /*!< PUCCH info */ + SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */ + uint8_t puschCurrentPrb; /*!< Current PRB for PUSCH allocation */ + bool puschPres; /*!< PUSCH presence field */ + SchPuschInfo *schPuschInfo; /*!< PUSCH info */ + bool pucchPres; /*!< PUCCH presence field */ + SchPucchInfo schPucchInfo; /*!< PUCCH info */ + uint8_t pucchUe; /*!< Store UE id for which PUCCH is scheduled */ + uint8_t puschUe; /*!< Store UE id for which PUSCH is scheduled */ }SchUlSlotInfo; /** @@ -184,6 +330,7 @@ typedef struct schLcCtxt uint16_t pduSessionId; /*Pdu Session Id*/ Snssai *snssai; /*S-NSSAI assoc with LCID*/ bool isDedicated; /*Flag containing Dedicated S-NSSAI or not*/ + uint16_t rsvdDedicatedPRB; }SchDlLcCtxt; typedef struct schDlCb @@ -194,7 +341,7 @@ typedef struct schDlCb typedef struct schUlLcCtxt { SchLcState lcState; - uint8_t lcId; + uint8_t lcId; uint8_t priority; uint8_t lcGroup; uint8_t schReqId; @@ -203,6 +350,7 @@ typedef struct schUlLcCtxt uint16_t pduSessionId; /*Pdu Session Id*/ Snssai *snssai; /*S-NSSAI assoc with LCID*/ bool isDedicated; /*Flag containing Dedicated S-NSSAI or not*/ + uint16_t rsvdDedicatedPRB; }SchUlLcCtxt; typedef struct schUlCb @@ -213,6 +361,7 @@ typedef struct schUlCb typedef struct schUeCfgCb { uint16_t cellId; + uint8_t ueId; uint16_t crnti; bool macCellGrpCfgPres; SchMacCellGrpCfg macCellGrpCfg; @@ -223,37 +372,18 @@ typedef struct schUeCfgCb SchAmbrCfg *ambrCfg; SchModulationInfo dlModInfo; SchModulationInfo ulModInfo; + SchDataTransmission dataTransmissionAction; }SchUeCfgCb; -/*Following structures to keep record and estimations of PRB allocated for each - * LC taking into consideration the RRM policies*/ -typedef struct lcInfo +typedef struct schHqDlMap { - uint8_t lcId; /*LCID for which BO are getting recorded*/ - uint32_t reqBO; /*Size of the BO requested/to be allocated for this LC*/ - uint32_t allocBO; /*TBS/BO Size which is actually allocated*/ - uint8_t allocPRB; /*PRB count which is allocated based on RRM policy/FreePRB*/ -}LcInfo; + CmLListCp hqList; +}SchHqDlMap; -typedef struct dedicatedLCInfo +typedef struct schHqUlMap { - CmLListCp dedLcList; /*Linklist of LC assoc with RRMPolicyMemberList*/ - uint16_t rsvdDedicatedPRB; /*Number of PRB reserved for this Dedicated S-NSSAI*/ -}DedicatedLCInfo; - -typedef struct schLcPrbEstimate -{ - /* TODO: For Multiple RRMPolicies, Make DedicatedLcInfo as array/Double Pointer - * and have separate DedLCInfo for each RRMPolcyMemberList*/ - /* Dedicated LC List will be allocated, if any available*/ - DedicatedLCInfo *dedLcInfo; /*Contain LCInfo per RRMPolicy*/ - - CmLListCp defLcList; /*Linklist of LC assoc with Default S-NSSAI(s)*/ - - /* SharedPRB number can be used by any LC. - * Need to calculate in every Slot based on PRB availability*/ - uint16_t sharedNumPrb; -}SchLcPrbEstimate; + CmLListCp hqList; +}SchHqUlMap; /** * @brief @@ -261,17 +391,25 @@ typedef struct schLcPrbEstimate */ typedef struct schUeCb { - uint16_t ueIdx; + uint16_t ueId; uint16_t crnti; SchUeCfgCb ueCfg; SchUeState state; SchCellCb *cellCb; + SchCfraResource cfraResource; bool srRcvd; + bool bsrRcvd; BsrInfo bsrInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS]; SchUlCb ulInfo; SchDlCb dlInfo; - SchLcPrbEstimate dlLcPrbEst; /*DL PRB Alloc Estimate among different LC*/ - SchLcPrbEstimate ulLcPrbEst; /*UL PRB Alloc Estimate among different LC*/ + SchUlHqEnt ulHqEnt; + SchDlHqEnt dlHqEnt; + SchDlHqProcCb *msg4Proc; + SchDlHqProcCb *retxMsg4HqProc; + SchHqDlMap **hqDlmap; + SchHqUlMap **hqUlmap; + CmLListCp ulRetxHqList; + CmLListCp dlRetxHqList; }SchUeCb; /** @@ -282,10 +420,34 @@ typedef struct schRaReq { uint32_t raRnti; RachIndInfo *rachInd; + bool isCFRA; + SchUeCb *ueCb; /* Filled only if isCFRA = true */ SlotTimingInfo winStartTime; SlotTimingInfo winEndTime; }SchRaReq; +typedef struct schPageInfo +{ + uint16_t pf; /*Value of Paging Frame received from DUAPP*/ + uint8_t i_s; /*Value of Paging Occ Index received from DUAPP*/ + SlotTimingInfo pageTxTime; /*Start Paging window*/ + uint8_t mcs; /*MCS index*/ + uint16_t msgLen; /*Pdu length */ + uint8_t *pagePdu; /*RRC Page PDU bit string*/ +}SchPageInfo; + +typedef struct schPagingOcc +{ + uint8_t frameOffset; + uint8_t pagingOccSlot; +}SchPagingOcc; + +typedef struct schPageCb +{ + CmLListCp pageIndInfoRecord[MAX_SFN]; /*List of Page Records received which are stored per sfn*/ + SchPagingOcc pagMonOcc[MAX_PO_PER_PF]; /*Paging Occasion Slot/FrameOffset are stored*/ +}SchPageCb; + /** * @brief * Cell Control block per cell. @@ -302,13 +464,16 @@ typedef struct schCellCb SchCellCfg cellCfg; /*!< Cell ocnfiguration */ bool firstSsbTransmitted; bool firstSib1Transmitted; - uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!