X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Fsch.c;h=ebdab07f65b4d5e4771eb577bd8f53b78375c8dc;hb=e44180890b286bf1f78cd8f3867092f0914cccec;hp=5c8d88993c7c0143c3ea676a78849033dfabd9fe;hpb=14e7b51e11af9b82227eda55b4bc6a67c5d94994;p=o-du%2Fl2.git diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index 5c8d88993..ebdab07f6 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -412,15 +412,12 @@ uint16_t schGetPeriodicityInMsec(DlUlTxPeriodicity tddPeriod) void schInitTddSlotCfg(SchCellCb *cell, SchCellCfg *schCellCfg) { uint16_t periodicityInMicroSec = 0; - uint32_t slotBitPos, symbBitPos, bitMask; int8_t slotIdx, symbIdx; periodicityInMicroSec = schGetPeriodicityInMsec(schCellCfg->tddCfg.tddPeriod); cell->numSlotsInPeriodicity = (periodicityInMicroSec * pow(2, schCellCfg->numerology))/1000; -cell->slotFrmtBitMap = 0; + cell->slotFrmtBitMap = 0; cell->symbFrmtBitMap = 0; - slotBitPos = (cell->numSlotsInPeriodicity*2)-1; /* considering 2 bits to represent a slot */ - symbBitPos = (MAX_SYMB_PER_SLOT*2)-1; /* considering 2 bits to represent a symbol */ for(slotIdx = cell->numSlotsInPeriodicity-1; slotIdx >= 0; slotIdx--) { symbIdx = 0; @@ -433,23 +430,13 @@ cell->slotFrmtBitMap = 0; case DL_SLOT: { /*BitMap to be set to 00 */ - bitMask = 1<slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<slotFrmtBitMap = (cell->slotFrmtBitMap<<2); break; } case UL_SLOT: { /*BitMap to be set to 01 */ - bitMask = 1<slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<slotFrmtBitMap = ((cell->slotFrmtBitMap<<2) | (UL_SLOT)); break; } default: @@ -458,12 +445,8 @@ cell->slotFrmtBitMap = 0; continue; } /* slot config is flexible. First set slotBitMap to 10 */ - bitMask = 1<slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<slotFrmtBitMap = ((cell->slotFrmtBitMap<<2) | (FLEXI_SLOT)); + /* Now set symbol bitmap */ for(symbIdx = MAX_SYMB_PER_SLOT-1; symbIdx >= 0; symbIdx--) { @@ -472,34 +455,19 @@ cell->slotFrmtBitMap = 0; case DL_SLOT: { /*symbol BitMap to be set to 00 */ - bitMask = 1<symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<symbFrmtBitMap = (cell->symbFrmtBitMap<<2); break; } case UL_SLOT: { /*symbol BitMap to be set to 01 */ - bitMask = 1<symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<symbFrmtBitMap = ((cell->symbFrmtBitMap<<2) | (UL_SLOT)); break; } case FLEXI_SLOT: { /*symbol BitMap to be set to 10 */ - bitMask = 1<symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<symbFrmtBitMap = ((cell->symbFrmtBitMap<<2) | (FLEXI_SLOT)); break; } default: @@ -507,7 +475,6 @@ cell->slotFrmtBitMap = 0; } } } - } #endif @@ -719,7 +686,7 @@ void fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg uint8_t slotIndex = 0; uint8_t FreqDomainResource[6] = {0}; uint16_t tbSize = 0; - uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */ + uint8_t numPdschSymbols = 11; /* considering pdsch region from symbols 3 to 13 */ uint8_t ssbIdx = 0; PdcchCfg *pdcch = &(sib1SchCfg->sib1PdcchCfg); @@ -814,14 +781,14 @@ void fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg pdsch->codeword[cwCount].mcsIndex = sib1SchCfg->sib1Mcs; pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = 0; - tbSize = schCalcTbSize(sib1SchCfg->sib1PduLen); + tbSize = schCalcTbSize(sib1SchCfg->sib1PduLen + TX_PAYLOAD_HDR_LEN); pdsch->codeword[cwCount].tbSize = tbSize; } pdsch->dataScramblingId = pci; pdsch->numLayers = 1; pdsch->transmissionScheme = 0; pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = 2; + pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = pci; pdsch->dmrs.scid = 0; @@ -837,7 +804,8 @@ void fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols); pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ pdsch->pdschTimeAlloc.rowIndex = 1; - pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */ + /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */ + pdsch->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */ pdsch->pdschTimeAlloc.timeAlloc.numSymb = numPdschSymbols; pdsch->beamPdschInfo.numPrgs = 1; pdsch->beamPdschInfo.prgSize = 1; @@ -921,6 +889,9 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo) uint8_t lcId = 0; uint16_t ueIdx = 0; uint16_t slot; +#ifdef NR_TDD + uint16_t slotIdx = 0; +#endif SchUeCb *ueCb = NULLP; SchCellCb *cell = NULLP; SchDlSlotInfo *schDlSlotInfo = NULLP; @@ -929,12 +900,18 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo) DU_LOG("\nDEBUG --> SCH : Received RLC BO Status indication"); cell = schCb[inst].cells[inst]; + if(cell == NULLP) + { + DU_LOG("\nERROR --> SCH : MacSchDlRlcBoInfo(): Cell does not exists"); + return RFAILED; + } + GET_UE_IDX(dlBoInfo->crnti, ueIdx); ueCb = &cell->ueCb[ueIdx-1]; lcId = dlBoInfo->lcId; if(lcId == SRB1_LCID || lcId == SRB2_LCID || lcId == SRB3_LCID || \ - (lcId >= MIN_DRB_LCID && lcId <= MAX_DRB_LCID)) + (lcId >= MIN_DRB_LCID && lcId <= MAX_DRB_LCID)) { SET_ONE_BIT(ueIdx, cell->boIndBitMap); ueCb->dlInfo.dlLcCtxt[lcId].bo = dlBoInfo->dataVolume; @@ -945,16 +922,35 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo) return RFAILED; } - slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA + BO_DELTA) % cell->numSlots; + slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA_DL + BO_DELTA) % cell->numSlots; +#ifdef NR_TDD + while(schGetSlotSymbFrmt(cell->slotFrmtBitMap, slot) != DL_SLOT) + { + slot = (slot + 1)%cell->numSlots; + slotIdx++; + if(slotIdx==cell->numSlots) + { + DU_LOG("\nERROR --> SCH : No DL Slot available"); + return RFAILED; + } + } +#endif + schDlSlotInfo = cell->schDlSlotInfo[slot]; + if(schDlSlotInfo == NULLP) + { + DU_LOG("\nERROR --> SCH : MacSchDlRlcBoInfo(): schDlSlotInfo does not exists"); + return RFAILED; + } SCH_ALLOC(schDlSlotInfo->dlMsgInfo, sizeof(DlMsgInfo)); - if(!schDlSlotInfo->dlMsgInfo) + if(schDlSlotInfo->dlMsgInfo == NULLP) { DU_LOG("\nERROR --> SCH : Memory allocation failed for dlMsgInfo"); schDlSlotInfo = NULL; return RFAILED; } + schDlSlotInfo->dlMsgInfo->crnti = dlBoInfo->crnti; schDlSlotInfo->dlMsgInfo->ndi = 1; schDlSlotInfo->dlMsgInfo->harqProcNum = 0; @@ -964,8 +960,10 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo) schDlSlotInfo->dlMsgInfo->harqFeedbackInd = 0; schDlSlotInfo->dlMsgInfo->dciFormatId = 1; if(lcId == SRB0_LCID) + { schDlSlotInfo->dlMsgInfo->isMsg4Pdu = true; - + schDlSlotInfo->dlMsgInfo->dlMsgPduLen = dlBoInfo->dataVolume; + } return ROK; }