X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrsch%2Frg_sch_gom.c;h=af6fba3f1ba3644b02da6fd65a01daa7725184c1;hb=def50dc175cebc67238db5f1acd5ff322a2279bd;hp=b70e203a121af7a15eb61822b6e10509738dfe24;hpb=9c8b78da0f4ef42dae5e30a3061463b81327e7a0;p=o-du%2Fl2.git diff --git a/src/5gnrsch/rg_sch_gom.c b/src/5gnrsch/rg_sch_gom.c index b70e203a1..af6fba3f1 100755 --- a/src/5gnrsch/rg_sch_gom.c +++ b/src/5gnrsch/rg_sch_gom.c @@ -73,32 +73,32 @@ PRIVATE S16 rgSCHGomHndlDelReq ARGS((RgSchCb *instCb,SpId spId, RgrDel *del,RgSchErrInfo *errInfo)); #ifdef LTE_ADV PRIVATE S16 rgSCHGomHndlSCellActDeactReq ARGS((RgSchCb *instCb, SpId spId, - RgrSCellActDeactEvnt *sCellActDeactEvnt, RgSchErrInfo *errInfo, U8 action)); + RgrSCellActDeactEvnt *sCellActDeactEvnt, RgSchErrInfo *errInfo, uint8_t action)); #endif /* LTE_ADV */ #ifdef EMTC_ENABLE EXTERN S16 rgSchEmtcGetSiWinPerd ARGS(( RgSchCellCb *cell, -U16 *siWinSize, -U16 *minPeriod +uint16_t *siWinSize, +uint16_t *minPeriod )); extern S16 rgSCHEmtcUtlCalMcsAndNPrb ( RgSchCellCb *cell, - U8 cfgType, + uint8_t cfgType, MsgLen msgLen, - U8 siId + uint8_t siId ); EXTERN S32 rgSCHEmtcUtlGetAllwdCchTbSzForSI ARGS( ( -U32 bo +uint32_t bo )); EXTERN Void rgSCHEmtcWarningSiCfg ARGS( ( RgSchCellCb *cell, RgrWarningSiCfgReqInfo *warningSiCfgReqInfo, -U16 idx +uint16_t idx )); #endif @@ -155,7 +155,7 @@ RgrCfgReqInfo *cfgReqInfo; SpId spId = 0; CmLteCellId cellId; RgSchCellCb *cell = NULLP; - U8 cfmStatus = RGR_CFG_CFM_NOK; + uint8_t cfmStatus = RGR_CFG_CFM_NOK; #ifdef DEBUGP Inst inst = (instCb->rgSchInit.inst ); #endif @@ -263,7 +263,7 @@ RgrCfgReqInfo *cfgReqInfo; #endif { SpId spId = 0; - U8 cfmStatus = RGR_CFG_CFM_OK; + uint8_t cfmStatus = RGR_CFG_CFM_OK; S16 ret; RgSchErrInfo errInfo; #ifdef DEBUGP @@ -387,14 +387,14 @@ RgrCfgReqInfo *rgrCfgReq; #endif { S16 ret; - U32 sfDiff; + uint32_t sfDiff; RgSchCfgElem *rgrCfgElem = NULLP; CmLteTimingInfo actvTime; Inst inst = cell->instIdx; /* Allocate memory for config Element */ ret = rgSCHUtlAllocSBuf(inst, (Data **)&rgrCfgElem, sizeof(RgSchCfgElem)); - if ((ret != ROK) || ((U8 *)rgrCfgElem == NULLP)) + if ((ret != ROK) || ((uint8_t *)rgrCfgElem == NULLP)) { return RFAILED; } @@ -669,7 +669,7 @@ RgSchErrInfo *errInfo; * @param[in] RgSchCb *instCb * @param[in] SpId spId * @param[in] RgrSCellActDeactEvnt *sCellActDeactEvnt - * @param[in] U8 action + * @param[in] uint8_t action * @param[out] RgSchErrInfo *errInfo * @return S16 * -# ROK @@ -682,7 +682,7 @@ RgSchCb *instCb, SpId spId, RgrSCellActDeactEvnt *sCellActDeactEvnt, RgSchErrInfo *errInfo, -U8 action +uint8_t action ) #else PRIVATE S16 rgSCHGomHndlSCellActDeactReq(instCb, spId, sCellActDeactEvnt, errInfo, action) @@ -690,12 +690,12 @@ RgSchCb *instCb; SpId spId; RgrSCellActDeactEvnt *sCellActDeactEvnt; RgSchErrInfo *errInfo; -U8 action; +uint8_t action; #endif { RgSchUeCb *ue = NULLP; - U16 idx = 0; - U16 sCellIdx = 0; + uint16_t idx = 0; + uint16_t sCellIdx = 0; RgSchCellCb *cell = instCb->rgrSap[spId].cell; Inst inst = (instCb->rgSchInit.inst); @@ -953,7 +953,7 @@ RgSchErrInfo *errInfo; #ifdef DEBUGP Inst inst = (instCb->rgSchInit.inst); #endif - VOLATILE U32 startTime=0; + VOLATILE uint32_t startTime=0; errInfo->errType = RGSCHERR_GOM_DEL_REQ; @@ -972,7 +972,7 @@ RgSchErrInfo *errInfo; if(ret == ROK) { /* TODO::Needs to be revisited after tti flow CaDev Start */ - U8 idx = (U8)((instCb->rgrSap[spId].cell->cellId - instCb->genCfg.startCellId)&(CM_LTE_MAX_CELLS-1)); + uint8_t idx = (uint8_t)((instCb->rgrSap[spId].cell->cellId - instCb->genCfg.startCellId)&(CM_LTE_MAX_CELLS-1)); instCb->cells[idx] = NULLP; /* CaDev End */ instCb->rgrSap[spId].cell = NULLP; @@ -1140,15 +1140,15 @@ RgrSiCfgReqInfo *cfgReqInfo; RgSchCellCb *cell = instCb->rgrSap[spId].cell; Inst inst = (instCb->rgSchInit.inst ); RgSchErrInfo errInfo; - U8 cfmStatus = RGR_CFG_CFM_NOK; + uint8_t cfmStatus = RGR_CFG_CFM_NOK; MsgLen msgLen = 0, pduLen; S32 tbSz = 0; - U8 nPrb = 0; - U8 mcs = 0; + uint8_t nPrb = 0; + uint8_t mcs = 0; /* check if cell does not exists */ - if (((U8 *)cell == NULLP) || (cell->cellId != cfgReqInfo->cellId)) + if (((uint8_t *)cell == NULLP) || (cell->cellId != cfgReqInfo->cellId)) { RLOG_ARG0(L_ERROR,DBG_CELLID,cfgReqInfo->cellId,"Cell Control block does not exist" ); @@ -1335,7 +1335,7 @@ RgrSiCfgReqInfo *cfgReqInfo; } else /* Initial Si cfg or si recfg where numSi did not change */ { - U8 bitMask; + uint8_t bitMask; /* Initial Si cfg */ if (cell->siCb.crntSiInfo.siInfo[cfgReqInfo->siId-1].si == NULLP) { @@ -1440,19 +1440,19 @@ RgrWarningSiCfgReqInfo *warningSiCfgReqInfo; #endif { RgSchCellCb *cell = instCb->rgrSap[spId].cell; - U8 cfmStatus = RGR_CFG_CFM_NOK; - U16 idx; - U8 siId = warningSiCfgReqInfo->siId; - U8 j, mcs=0, nPrb=0; + uint8_t cfmStatus = RGR_CFG_CFM_NOK; + uint16_t idx; + uint8_t siId = warningSiCfgReqInfo->siId; + uint8_t j, mcs=0, nPrb=0; RgSchWarningSiSeg *warningSiMsg; RgSchWarningSiPdu *pduNode; CmLList *node; MsgLen msgLen = 0; Bool freeNodeFound = FALSE; - U16 siWinSize = 0; - U16 minPeriod = 0; + uint16_t siWinSize = 0; + uint16_t minPeriod = 0; #ifdef EMTC_ENABLE - U8 isEmtc = warningSiCfgReqInfo->emtcEnable; + uint8_t isEmtc = warningSiCfgReqInfo->emtcEnable; #endif #ifdef EMTC_ENABLE @@ -1467,7 +1467,7 @@ RgrWarningSiCfgReqInfo *warningSiCfgReqInfo; minPeriod = cell->siCfg.minPeriodicity; } /* check if cell does not exists */ - if (((U8 *)cell == NULLP) || + if (((uint8_t *)cell == NULLP) || (cell->cellId != warningSiCfgReqInfo->cellId) || (warningSiCfgReqInfo->siId > ((minPeriod * 10)/siWinSize))) @@ -1619,7 +1619,7 @@ Void rgSCHGomHndlWarningSiStopReq Region reg, Pool pool, RgSchCb *instCb, -U8 siId, +uint8_t siId, RgrCfgTransId transId, SpId spId ) @@ -1628,13 +1628,13 @@ Void rgSCHGomHndlWarningSiStopReq(reg, pool, instCb, siId, transId, spId) Region reg; Pool pool; RgSchCb *instCb; -U8 siId; +uint8_t siId; RgrCfgTransId transId; SpId spId; #endif { RgSchCellCb *cell = instCb->rgrSap[spId].cell; - U16 idx; + uint16_t idx; CmLList *node; RgSchWarningSiPdu *warningSiPdu; Buffer *pdu; @@ -1643,8 +1643,8 @@ SpId spId; { if(cell->siCb.warningSi[idx].siId == siId) { - if ((cmMemcmp ((U8 *)&cell->siCb.warningSi[idx].warningSiMsg.transId, - (U8 *)&transId, sizeof(RgrCfgTransId))) == 0) + if ((cmMemcmp ((uint8_t *)&cell->siCb.warningSi[idx].warningSiMsg.transId, + (uint8_t *)&transId, sizeof(RgrCfgTransId))) == 0) { /* ccpu00136659: CMAS ETWS design changes */ CM_LLIST_FIRST_NODE(&cell->siCb.warningSi[idx].warningSiMsg.segLstCp, node); @@ -1664,7 +1664,7 @@ SpId spId; } } } - RETVOID; + return; } #endif/*RGR_SI_SCH */ @@ -1774,10 +1774,10 @@ S16 rgSCHGomHndlLoadInf(reg, pool, instCb, spId, transId, loadInfReq) RgSchCellCb *cell = instCb->rgrSap[spId].cell; Inst inst = (instCb->rgSchInit.inst ); RgSchErrInfo errInfo; - U16 i; + uint16_t i; /* check if cell does not exists */ - if (((U8 *)cell == NULLP) || (cell->cellId != loadInfReq->cellId)) + if (((uint8_t *)cell == NULLP) || (cell->cellId != loadInfReq->cellId)) { RLOG_ARG1(L_ERROR,DBG_CELLID,loadInfReq->cellId,"Cell Control block does not exist" "for load cellId:%d",loadInfReq->cellId);