X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrrlc%2Fkw_tmr.c;h=dc5c79470f396087259828c2c9f505bc513d6b21;hb=3330932565e15a749fd5dd5039cdea2862ca51cc;hp=c0f2df3b93daf6333c2753e7d462ca3562453750;hpb=ef21e69ff09d53e6db07ec4f5b75bf644f40c5e6;p=o-du%2Fl2.git

diff --git a/src/5gnrrlc/kw_tmr.c b/src/5gnrrlc/kw_tmr.c
index c0f2df3b9..dc5c79470 100755
--- a/src/5gnrrlc/kw_tmr.c
+++ b/src/5gnrrlc/kw_tmr.c
@@ -121,13 +121,13 @@ void rlcStartTmr(RlcCb *gCb, PTR cb, int16_t tmrEvnt)
          arg.max = RLC_MAX_UM_TMR;
          break;
       }
-      case EVENT_RLC_AMUL_REORD_TMR:
+      case EVENT_RLC_AMUL_REASSEMBLE_TMR:
       {
          RlcAmUl* amUl = &(((RlcUlRbCb *)cb)->m.amUl);
          /* kw005.201 Changed wait calculation ccpu00117634*/ 
-         RLC_TMR_CALCUATE_WAIT(arg.wait, amUl->reOrdTmrInt, gCb->genCfg.timeRes);         
+         RLC_TMR_CALCUATE_WAIT(arg.wait, amUl->reAsmblTmrInt, gCb->genCfg.timeRes);         
 
-         arg.timers = &amUl->reOrdTmr;
+         arg.timers = &amUl->reAsmblTmr;
          arg.max = RLC_MAX_AM_TMR;
          break;
       }
@@ -228,9 +228,9 @@ void rlcStopTmr(RlcCb *gCb, PTR cb, uint8_t tmrType)
          arg.max = RLC_MAX_UM_TMR;
          break;
       }
-      case EVENT_RLC_AMUL_REORD_TMR:
+      case EVENT_RLC_AMUL_REASSEMBLE_TMR:
       {
-         arg.timers = &((RlcUlRbCb *)cb)->m.amUl.reOrdTmr;
+         arg.timers = &((RlcUlRbCb *)cb)->m.amUl.reAsmblTmr;
          arg.max = RLC_MAX_AM_TMR;
          break;
       }
@@ -307,10 +307,10 @@ Void rlcTmrExpiry(PTR cb,S16 tmrEvnt)
 
          break;
       }
-      case EVENT_RLC_AMUL_REORD_TMR:
+      case EVENT_RLC_AMUL_REASSEMBLE_TMR:
       {
          RlcUlRbCb *ulRbCb = (RlcUlRbCb *)cb;
-         rlcAmmReOrdTmrExp(RLC_GET_RLCCB(ulRbCb->inst), ulRbCb);
+         rlcAmmReAsmblTmrExp(RLC_GET_RLCCB(ulRbCb->inst), ulRbCb);
          break;
       }
       case EVENT_RLC_AMUL_STA_PROH_TMR:
@@ -366,10 +366,10 @@ bool rlcChkTmr(RlcCb *gCb, PTR cb, int16_t tmrEvnt)
          return (((RlcUlRbCb *)cb)->m.umUl.reAsmblTmr.tmrEvnt == 
                   EVENT_RLC_UMUL_REASSEMBLE_TMR);
       }
-      case EVENT_RLC_AMUL_REORD_TMR:
+      case EVENT_RLC_AMUL_REASSEMBLE_TMR:
       {
-         return (((RlcUlRbCb *)cb)->m.amUl.reOrdTmr.tmrEvnt == 
-                  EVENT_RLC_AMUL_REORD_TMR);
+         return (((RlcUlRbCb *)cb)->m.amUl.reAsmblTmr.tmrEvnt == 
+                  EVENT_RLC_AMUL_REASSEMBLE_TMR);
       }
       case EVENT_RLC_AMUL_STA_PROH_TMR:
       {