X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrmac%2Fmac_slot_ind.c;h=d8dc0e7a7a8c379098fcfe60ace6a7acf17f1dcb;hb=c01ca171144bd6e576646466d420c6d5feaabc59;hp=dcbf870b4111eba526b6c4e756eb706941acd15b;hpb=f191979f3454e08cc049af12d6323819730260ef;p=o-du%2Fl2.git diff --git a/src/5gnrmac/mac_slot_ind.c b/src/5gnrmac/mac_slot_ind.c index dcbf870b4..d8dc0e7a7 100644 --- a/src/5gnrmac/mac_slot_ind.c +++ b/src/5gnrmac/mac_slot_ind.c @@ -54,9 +54,13 @@ MacSchSlotIndFunc macSchSlotIndOpts[] = **/ uint8_t MacProcDlAlloc(Pst *pst, DlSchedInfo *dlSchedInfo) { + uint8_t ueIdx; uint16_t cellIdx; MacDlSlot *currDlSlot = NULLP; +#ifdef CALL_FLOW_DEBUG_LOG + DU_LOG("\nCall Flow: ENTSCH -> ENTMAC : EVENT_DL_SCH_INFO\n"); +#endif if(dlSchedInfo != NULLP) { GET_CELL_IDX(dlSchedInfo->cellId, cellIdx); @@ -90,7 +94,10 @@ uint8_t MacProcDlAlloc(Pst *pst, DlSchedInfo *dlSchedInfo) /* Check if the downlink pdu is msg4 */ if(dlSchedInfo->dlMsgAlloc->dlMsgInfo.isMsg4Pdu) { - macCb.macCell[cellIdx]->macRaCb[0].msg4TbSize = dlSchedInfo->dlMsgAlloc->dlMsgPdschCfg.codeword[0].tbSize; + GET_UE_IDX(dlSchedInfo->dlMsgAlloc->dlMsgInfo.crnti, ueIdx); + ueIdx = ueIdx -1; + macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4TbSize = \ + dlSchedInfo->dlMsgAlloc->dlMsgPdschCfg.codeword[0].tbSize; } else { @@ -145,8 +152,8 @@ void fillMsg4Pdu(uint16_t cellId, DlMsgAlloc *msg4Alloc) if(macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4Pdu != NULLP) { - MAC_ALLOC(msg4DlData.pduInfo[ueIdx].dlPdu, macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4PduLen); - if(msg4DlData.pduInfo[ueIdx].dlPdu != NULLP) + MAC_ALLOC(msg4DlData.pduInfo[msg4DlData.numPdu].dlPdu, macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4PduLen); + if(msg4DlData.pduInfo[msg4DlData.numPdu].dlPdu != NULLP) { msg4TxPduLen = macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4TbSize - TX_PAYLOAD_HDR_LEN; @@ -166,7 +173,8 @@ void fillMsg4Pdu(uint16_t cellId, DlMsgAlloc *msg4Alloc) DU_LOG("\nERROR --> MAC: Failed allocating memory for msg4TxPdu"); } /* Free memory allocated */ - MAC_FREE(msg4DlData.pduInfo[0].dlPdu, macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4PduLen); + MAC_FREE(msg4DlData.pduInfo[msg4DlData.numPdu-1].dlPdu, macCb.macCell[cellIdx]->macRaCb[ueIdx].msg4PduLen); + msg4DlData.numPdu--; } } @@ -326,11 +334,6 @@ uint8_t macProcSlotInd(SlotIndInfo slotInd) /* Trigger for DL TTI REQ */ fillDlTtiReq(slotInd); - /* TODO : check if this too needs to be sent in sequence with Dl and Ul TTI req. - * If so , move trigger for fillUlDciReq to lower mac */ - /* Trigger for UL DCI REQ */ - fillUlDciReq(slotInd); - return ROK; } /* macProcSlotInd */ @@ -353,6 +356,7 @@ uint8_t macProcSlotInd(SlotIndInfo slotInd) uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd) { uint8_t ret = ROK; + uint16_t cellIdx; volatile uint32_t startTime=0; #ifdef ODU_SLOT_IND_DEBUG_LOG @@ -362,6 +366,12 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd) ODU_START_TASK(&startTime, PID_MAC_TTI_IND); gSlotCount++; + if(gSlotCount == 1) + { + GET_CELL_IDX(slotInd->cellId, cellIdx); + macCb.macCell[cellIdx]->state = CELL_STATE_UP; + } + /* When testing L2 with Intel-L1, any changes specific to * timer mode testing must be guarded under INTEL_TIMER_MODE*/ #ifndef INTEL_TIMER_MODE