X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrmac%2Fmac_slot_ind.c;h=37cb68751f453e718558e7c3b7711c0990b93da4;hb=be872311899d115fdf4565e4811cc8b37226ac53;hp=2ea5be994f2e8998cbe5add934d5a6baa89a54d4;hpb=d0d5d7b78e2a24af16003322cfd1c78bcd8d7664;p=o-du%2Fl2.git diff --git a/src/5gnrmac/mac_slot_ind.c b/src/5gnrmac/mac_slot_ind.c index 2ea5be994..37cb68751 100644 --- a/src/5gnrmac/mac_slot_ind.c +++ b/src/5gnrmac/mac_slot_ind.c @@ -25,6 +25,7 @@ #include "rlc_mac_inf.h" #include "mac.h" #include "mac_upr_inf_api.h" +#include "lwr_mac.h" #include "lwr_mac_fsm.h" #include "mac_utils.h" @@ -61,48 +62,48 @@ uint8_t MacProcDlAlloc(Pst *pst, DlSchedInfo *dlSchedInfo) GET_CELL_IDX(dlSchedInfo->cellId, cellIdx); if(dlSchedInfo->isBroadcastPres) { - currDlSlot = &macCb.macCell[cellIdx]->\ - dlSlot[dlSchedInfo->schSlotValue.broadcastTime.slot]; - currDlSlot->dlInfo.isBroadcastPres = true; - memcpy(&currDlSlot->dlInfo.brdcstAlloc, &dlSchedInfo->brdcstAlloc, sizeof(DlBrdcstAlloc)); + currDlSlot = &macCb.macCell[cellIdx]->\ + dlSlot[dlSchedInfo->schSlotValue.broadcastTime.slot]; + currDlSlot->dlInfo.isBroadcastPres = true; + memcpy(&currDlSlot->dlInfo.brdcstAlloc, &dlSchedInfo->brdcstAlloc, sizeof(DlBrdcstAlloc)); currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg = \ - &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg; + &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg; } if(dlSchedInfo->rarAlloc != NULLP) { - currDlSlot = &macCb.macCell[cellIdx]->\ - dlSlot[dlSchedInfo->schSlotValue.rarTime.slot]; - currDlSlot->dlInfo.rarAlloc = dlSchedInfo->rarAlloc; + currDlSlot = &macCb.macCell[cellIdx]->\ + dlSlot[dlSchedInfo->schSlotValue.rarTime.slot]; + currDlSlot->dlInfo.rarAlloc = dlSchedInfo->rarAlloc; - /* MUXing of RAR */ - fillRarPdu(&currDlSlot->dlInfo.rarAlloc->rarInfo); + /* MUXing of RAR */ + fillRarPdu(&currDlSlot->dlInfo.rarAlloc->rarInfo); } if(dlSchedInfo->dlMsgAlloc != NULLP) { - currDlSlot = &macCb.macCell[cellIdx]->\ - dlSlot[dlSchedInfo->schSlotValue.dlMsgTime.slot]; - currDlSlot->dlInfo.dlMsgAlloc = dlSchedInfo->dlMsgAlloc; /* copy msg4 alloc pointer in MAC slot info */ + currDlSlot = &macCb.macCell[cellIdx]->\ + dlSlot[dlSchedInfo->schSlotValue.dlMsgTime.slot]; + currDlSlot->dlInfo.dlMsgAlloc = dlSchedInfo->dlMsgAlloc; /* copy msg4 alloc pointer in MAC slot info */ currDlSlot->dlInfo.cellId = dlSchedInfo->cellId; /* Check if the downlink pdu is msg4 */ - if(dlSchedInfo->dlMsgAlloc->dlMsgInfo.isMsg4Pdu) - { - macCb.macCell[cellIdx]->macRaCb[0].msg4TbSize = dlSchedInfo->dlMsgAlloc->dlMsgPdschCfg.codeword[0].tbSize; - } - else - { - memcpy(&currDlSlot->dlInfo.schSlotValue, &dlSchedInfo->schSlotValue, sizeof(SchSlotValue)); - /* Send LC schedule result to RLC */ - sendSchedRptToRlc(currDlSlot->dlInfo, dlSchedInfo->schSlotValue.dlMsgTime); - } + if(dlSchedInfo->dlMsgAlloc->dlMsgInfo.isMsg4Pdu) + { + macCb.macCell[cellIdx]->macRaCb[0].msg4TbSize = dlSchedInfo->dlMsgAlloc->dlMsgPdschCfg.codeword[0].tbSize; + } + else + { + memcpy(&currDlSlot->dlInfo.schSlotValue, &dlSchedInfo->schSlotValue, sizeof(SchSlotValue)); + /* Send LC schedule result to RLC */ + sendSchedRptToRlc(currDlSlot->dlInfo, dlSchedInfo->schSlotValue.dlMsgTime); + } } if(dlSchedInfo->ulGrant != NULLP) { - currDlSlot = &macCb.macCell[cellIdx]->\ - dlSlot[dlSchedInfo->schSlotValue.ulDciTime.slot]; + currDlSlot = &macCb.macCell[cellIdx]->\ + dlSlot[dlSchedInfo->schSlotValue.ulDciTime.slot]; currDlSlot->dlInfo.ulGrant = dlSchedInfo->ulGrant; } } @@ -203,7 +204,7 @@ void buildAndSendMuxPdu(SlotIndInfo currTimingInfo) GET_CELL_IDX(currTimingInfo.cellId, cellIdx); - ADD_DELTA_TO_TIME(currTimingInfo, muxTimingInfo, PHY_DELTA); + ADD_DELTA_TO_TIME(currTimingInfo, muxTimingInfo, PHY_DELTA_DL); currDlSlot = &macCb.macCell[cellIdx]->dlSlot[muxTimingInfo.slot]; if(currDlSlot->dlInfo.dlMsgAlloc) { @@ -314,9 +315,8 @@ uint8_t macProcSlotInd(SlotIndInfo slotInd) /* Trigger for DL TTI REQ */ fillDlTtiReq(slotInd); - /* Trigger for UL TTI REQ */ - fillUlTtiReq(slotInd); - + /* TODO : check if this too needs to be sent in sequence with Dl and Ul TTI req. + * If so , move trigger for fillUlDciReq to lower mac */ /* Trigger for UL DCI REQ */ fillUlDciReq(slotInd); @@ -345,7 +345,7 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd) volatile uint32_t startTime=0; #ifdef ODU_SLOT_IND_DEBUG_LOG - DU_LOG("\nDEBUG --> MAC : Slot Indication received"); + DU_LOG("\nDEBUG --> MAC : Slot Indication received. [%d : %d]", slotInd->sfn, slotInd->slot); #endif /*starting Task*/ ODU_START_TASK(&startTime, PID_MAC_TTI_IND); @@ -387,6 +387,16 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd) /*stoping Task*/ ODU_STOP_TASK(startTime, PID_MAC_TTI_IND); MAC_FREE_SHRABL_BUF(pst->region, pst->pool, slotInd, sizeof(SlotIndInfo)); + +#ifdef INTEL_WLS_MEM + lwrMacCb.phySlotIndCntr++; + if(lwrMacCb.phySlotIndCntr > WLS_MEM_FREE_PRD) + { + lwrMacCb.phySlotIndCntr = 1; + } + freeWlsBlockList(lwrMacCb.phySlotIndCntr - 1); +#endif + return ret; } /* fapiMacSlotInd */