X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=src%2F5gnrmac%2Fmac.h;h=e64cba274b5e5101b5cc6f3c0c0947d0e7d8836a;hb=efd3fd582205e5c94878e6bcae6d6282dd6f1d25;hp=947fbcc251cd1b7ee5d5c7dc1506197903c473a5;hpb=2193e4cf01012809495be026097e8d7eacb9f0ac;p=o-du%2Fl2.git

diff --git a/src/5gnrmac/mac.h b/src/5gnrmac/mac.h
index 947fbcc25..e64cba274 100644
--- a/src/5gnrmac/mac.h
+++ b/src/5gnrmac/mac.h
@@ -21,51 +21,16 @@
 /* MAX values */
 #define MAX_MAC_CE 6
 #define MAX_CRI_SIZE 6
-#define MAX_MAC_DL_PDU 10
+#define MAX_MAC_DL_PDU 16
 #define MAX_NUM_HARQ_PROC  16
-#define MAX_SLOT_SUPPORTED    10 /* numerology 0 15Khz */
 #define MAX_ZERO_CORR_CFG_IDX 16 /* max zero correlation config index */
+#define MAC_TQ_SIZE    10        /* Timing Queue Size */
+#define MAX_NUM_TIMER  1         /* MAX number of MAC timers */
 
 #define DEFAULT_CELLS 1
 #define SI_RNTI 0xFFFF
 #define P_RNTI 0xFFFE
 
-#define PERIODIC_BSR_TMR_1MS    1
-#define PERIODIC_BSR_TMR_5MS    5
-#define PERIODIC_BSR_TMR_10MS   10
-#define PERIODIC_BSR_TMR_16MS   16
-#define PERIODIC_BSR_TMR_20MS   20
-#define PERIODIC_BSR_TMR_32MS   32
-#define PERIODIC_BSR_TMR_40MS   40
-#define PERIODIC_BSR_TMR_60MS   60
-#define PERIODIC_BSR_TMR_80MS   80
-#define PERIODIC_BSR_TMR_128MS   128
-#define PERIODIC_BSR_TMR_160MS   160
-#define PERIODIC_BSR_TMR_320MS   320
-#define PERIODIC_BSR_TMR_640MS   640
-#define PERIODIC_BSR_TMR_1280MS  1280
-#define PERIODIC_BSR_TMR_2560MS  2560
-
-#define RETX_BSR_TMR_10MS    10
-#define RETX_BSR_TMR_20MS    20
-#define RETX_BSR_TMR_40MS    40
-#define RETX_BSR_TMR_80MS    80
-#define RETX_BSR_TMR_160MS   160
-#define RETX_BSR_TMR_320MS   320
-#define RETX_BSR_TMR_640MS   640
-#define RETX_BSR_TMR_1280MS   1280
-#define RETX_BSR_TMR_2560MS   2560
-#define RETX_BSR_TMR_5120MS   5120
-#define RETX_BSR_TMR_10240MS  10240
-
-#define SR_DELAY_TMR_20MS     20
-#define SR_DELAY_TMR_40MS     40
-#define SR_DELAY_TMR_64MS     64
-#define SR_DELAY_TMR_128MS    128
-#define SR_DELAY_TMR_512MS    512
-#define SR_DELAY_TMR_1024MS   1024
-#define SR_DELAY_TMR_2560MS   2560
-
 #define MAC_LCID_CCCH              0
 #define MAC_LCID_MIN               1
 #define MAC_LCID_MAX               32
@@ -216,9 +181,10 @@ struct macCellCb
    uint16_t    cellId;
    uint8_t     crntiMap;
    MacRaCbInfo macRaCb[MAX_NUM_UE];
-   MacDlSlot   dlSlot[MAX_SLOT_SUPPORTED];
-   MacUlSlot   ulSlot[MAX_SLOT_SUPPORTED];
+   MacDlSlot   dlSlot[MAX_SLOTS];
+   MacUlSlot   ulSlot[MAX_SLOTS];
    uint16_t    numActvUe;
+   MacUeCfg    *ueCfgTmpData[MAX_NUM_UE];
    MacUeCb     ueCb[MAX_NUM_UE];
    MacCellCfg  macCellCfg;
    SlotIndInfo currTime;
@@ -228,6 +194,10 @@ typedef struct macCb
 {
    Inst       macInst;
    ProcId     procId;
+   uint8_t    tmrRes;                    /*!< Timer resolution */
+   CmTqCp     tmrTqCp;                   /*!< Timer Task Queue Cntrl Point */
+   CmTqType   tmrTq[MAC_TQ_SIZE];        /*!< Timer Task Queue */
+   CmTimer    tmrBlk[MAX_NUM_TIMER];     /*!< Timer Block */
    MacCellCb  *macCell[MAX_NUM_CELL];
 }MacCb;
 
@@ -235,6 +205,7 @@ typedef struct macCb
 MacCb macCb;
 
 /* Function declarations */
+short int macActvTmr(Ent ent,Inst inst);
 void fillRarPdu(RarInfo *rarInfo);
 void createMacRaCb(RachIndInfo *rachIndInfo);
 void fillMsg4DlData(MacDlData *dlData, uint16_t msg4PduLen, uint8_t *msg4Pdu);