X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=fhi_lib%2Ftest%2Ftest_xran%2Finit_sys_functional.cc;h=fa9b7d1063e555ee7f6968b784e3c7ccb211d2b4;hb=892daba4c616407f16506415d5a69549519ef11d;hp=39497aa5b0cfbd53890beae158bceaed60b81b5b;hpb=2fbf70096f64af622da983e88c5a64e90ad9bdbd;p=o-du%2Fphy.git

diff --git a/fhi_lib/test/test_xran/init_sys_functional.cc b/fhi_lib/test/test_xran/init_sys_functional.cc
index 39497aa..fa9b7d1 100644
--- a/fhi_lib/test/test_xran/init_sys_functional.cc
+++ b/fhi_lib/test/test_xran/init_sys_functional.cc
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-*   Copyright (c) 2019 Intel.
+*   Copyright (c) 2020 Intel.
 *
 *   Licensed under the Apache License, Version 2.0 (the "License");
 *   you may not use this file except in compliance with the License.
@@ -36,10 +36,10 @@ const std::string module_name = "init_sys_functional";
 
 extern enum xran_if_state xran_if_current_state;
 
-void physide_sym_call_back(void * param)
+int32_t physide_sym_call_back(void * param, struct xran_sense_of_time *time)
 {
     rte_pause();
-    return;
+    return 0;
 }
 
 int physide_dl_tti_call_back(void * param)
@@ -66,6 +66,19 @@ void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
     return;
 }
 
+void xran_fh_bfw_callback(void *pCallbackTag, xran_status_t status)
+{
+    rte_pause();
+    return;
+}
+
+void xran_fh_srs_callback(void *pCallbackTag, xran_status_t status)
+{
+    rte_pause();
+    return;
+}
+
+
 void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
 {
 
@@ -78,8 +91,8 @@ protected:
 
     void SetUp() override
     {
-        xranlib->Init();
-        xranlib->Open(nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback);
+        xranlib->Init(0);
+        xranlib->Open(0, nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_bfw_callback, (void *)xran_fh_rx_prach_callback, (void *)xran_fh_srs_callback);
     }
 
     /* It's called after an execution of the each test case.*/
@@ -97,6 +110,8 @@ public:
     BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
     BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
 
+    BbuIoBufCtrlStruct sFHCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+    BbuIoBufCtrlStruct sFHCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
     /* buffers lists */
     struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
     struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
@@ -141,6 +156,7 @@ TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)
     struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
     struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
     struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+    struct xran_buffer_list *pFthRxRachBufferDecomp[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];    
 
     Init_Sys_Check::nInstanceNum = xranlib->get_num_cc();
 
@@ -176,6 +192,7 @@ TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)
                 pFthRxBuffer[i][z][j]     = &(Init_Sys_Check::sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
                 pFthRxPrbMapBuffer[i][z][j]     = &(Init_Sys_Check::sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
                 pFthRxRachBuffer[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
+                pFthRxRachBufferDecomp[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList);                	
             }
         }
     }
@@ -197,7 +214,7 @@ TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)
         // add prach callback here
         for (int i = 0; i < xranlib->get_num_cc(); i++)
         {
-            ret = xran_5g_prach_req(Init_Sys_Check::nInstanceHandle[0][i], pFthRxRachBuffer[i],
+            ret = xran_5g_prach_req(Init_Sys_Check::nInstanceHandle[0][i], pFthRxRachBuffer[i], pFthRxRachBufferDecomp[i],
                 xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
             ASSERT_EQ(0, ret);
         }
@@ -233,7 +250,7 @@ TEST_P(Init_Sys_Check, Test_xran_get_slot_idx)
     uint32_t nSlotIdx;
     uint64_t nSecond;
 
-    uint32_t nXranTime  = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
+    uint32_t nXranTime  = xran_get_slot_idx(0, &nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
     nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
         + nSubframeIdx*nNrOfSlotInSf
         + nSlotIdx;
@@ -247,19 +264,19 @@ TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb)
     int16_t ret = 0;
     ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
     ASSERT_EQ(0,ret);
-    ASSERT_EQ(physide_dl_tti_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]);
+    ASSERT_EQ((long long)physide_dl_tti_call_back, (long long)p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]);
     ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);
     ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]);
 
     ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
     ASSERT_EQ(0,ret);
-    ASSERT_EQ(physide_ul_half_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]);
-    ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]);
+    ASSERT_EQ((long long)physide_ul_half_slot_call_back, (long long)p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]);
+    ASSERT_EQ((long long)NULL, (long long)p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]);
     ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]);
 
     ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
     ASSERT_EQ(0,ret);
-    ASSERT_EQ(physide_ul_full_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]);
+    ASSERT_EQ((long long)physide_ul_full_slot_call_back,(long long) p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]);
     ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_FULL_SLOT_RX]);
     ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_FULL_SLOT_RX]);
 
@@ -267,14 +284,14 @@ TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb)
 
 TEST_P(Init_Sys_Check, Test_xran_reg_sym_cb){
     int16_t ret = 0;
-    ret = xran_reg_sym_cb(xranlib->get_xranhandle(),  physide_sym_call_back, NULL, 11, 0);
-    ASSERT_EQ(-1,ret);
+    ret = xran_reg_sym_cb(xranlib->get_xranhandle(),  physide_sym_call_back, NULL, NULL, 11, XRAN_CB_SYM_RX_WIN_END);
+    ASSERT_EQ(0,ret);
 }
 
 TEST_P(Init_Sys_Check, Test_xran_mm_destroy){
     int16_t ret = 0;
     ret = xran_mm_destroy(xranlib->get_xranhandle());
-    ASSERT_EQ(-1,ret);
+    ASSERT_EQ(0,ret);
 }
 
 TEST_P(Init_Sys_Check, Test_xran_start_stop){