X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=fhi_lib%2Fapp%2Fusecase%2Fcat_b%2Fmu1_100mhz%2F102%2Fconfig_file_o_ru.dat;h=eee70510aef9c07253f785d130c2ad7bb67928d7;hb=HEAD;hp=079da8115f54ca3b5dbe2fa00dec46803ccf16d0;hpb=2fbf70096f64af622da983e88c5a64e90ad9bdbd;p=o-du%2Fphy.git diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat index 079da81..eee7051 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat @@ -63,15 +63,21 @@ MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protoco Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 -ioCore=10 -systemCore=10 -pktProcCore=10 -pktAuxCore=10 -timingCore=11 -llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app - -numSlots=10 #number of slots per IQ files +ioCore=15 # core id + +# Eth 0 +duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +# Eth 1 +duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 @@ -106,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # enable (1)| disable (0) srs +srsSym=4 # deprecated +srsSlot=3 # scheduled srs slot within tdd period +srsNdmOffset=3 # delay offset to start ndm srs u-plane +srsNdmTxDuration=4 # tx duration for ndm srts u-plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -149,15 +158,20 @@ antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -nPrbElemDl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask # weight base beams -PrbElemDl0=0,90,0,14,1,1,1,9,1 +PrbElemDl0=0,64,0,14,0,1,4,2,1,10360,4095 +PrbElemDl1=64,26,0,14,1,1,4,2,1,10360,4095 -nPrbElemUl=1 +nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,90,0,14,1,1,1,9,1 +PrbElemUl0=0,64,0,14,0,1,1,9,1 +PrbElemUl1=64,26,0,14,1,1,1,9,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ###########################################################