X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;f=fhi_lib%2Fapp%2Fsrc%2Fcommon.h;h=2ba2fe58c6b04097d3bc12291fc47c7e56a0ef8c;hb=70d9d920dd4e575f085f1f1a9050fefd1c10e127;hp=8f9d4068583002fd0d463f769a28f279e42d3a13;hpb=cef07f74965b1749dd909fc1322e211489fea2ea;p=o-du%2Fphy.git diff --git a/fhi_lib/app/src/common.h b/fhi_lib/app/src/common.h index 8f9d406..2ba2fe5 100644 --- a/fhi_lib/app/src/common.h +++ b/fhi_lib/app/src/common.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2020 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,7 +16,6 @@ * *******************************************************************************/ - #ifndef _XRAN_APP_COMMON_H_ #define _XRAN_APP_COMMON_H_ @@ -29,7 +28,7 @@ #include #include -#define VERSIONX "#DIRTY#" +#define VERSIONX "oran_bronze_release_v1.1" #define APP_O_DU 0 #define APP_O_RU 1 @@ -50,12 +49,13 @@ enum nRChBwOptions #define N_SC_PER_PRB 12 #define N_SYM_PER_SLOT 14 #define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR) +#define MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR) #define SUBFRAME_DURATION_US 1000 //#define SLOTNUM_PER_SUBFRAME 8 #define SUBFRAMES_PER_SYSTEMFRAME 10 -#define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*66*N_SC_PER_PRB*4L) +#define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L) /* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/ #define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L) @@ -70,6 +70,11 @@ enum nRChBwOptions extern int iq_playback_buffer_size_dl; extern int iq_playback_buffer_size_ul; +extern int iq_bfw_buffer_size_dl; +extern int iq_bfw_buffer_size_ul; + +extern int iq_srs_buffer_size_ul; + extern uint8_t numCCPorts; /* Number of antennas supported by front-end */ @@ -83,6 +88,10 @@ extern int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; +extern int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR]; +extern int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR]; +extern int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR]; + /* Number of antennas supported by front-end */ extern int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; @@ -92,17 +101,41 @@ extern int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; +extern int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR]; +extern int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR]; +extern int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR]; + extern int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; extern int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED]; extern int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; +/* beamforming weights for UL (O-DU) */ +extern int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; + +/* beamforming weights for UL (O-DU) */ +extern int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; + +/* beamforming weights for UL (O-RU) */ +extern int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; + +/* beamforming weights for UL (O-RU) */ +extern int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; +extern int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; + void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num); void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num); int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num); uint32_t app_xran_get_scs(uint8_t nMu); -uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA); +uint16_t app_xran_get_num_rbs(uint8_t ranTech, uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA); uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq); int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig);