#include <stdio.h>+
#include <unistd.h>+
#include "xran_fh_o_du.h"+
#include "xran_pkt_up.h"+
#include <rte_common.h>+
#include <rte_mbuf.h>+
+Include dependency graph for common.h:
+
+
+
+
+
+This graph shows which files directly or indirectly include this file:
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+Go to the source code of this file.
++Macros | |
| #define | VERSIONX "#DIRTY#" |
| #define | APP_O_DU 0 |
| #define | APP_O_RU 1 |
| #define | N_SC_PER_PRB 12 |
| #define | N_SYM_PER_SLOT 14 |
| #define | MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR) |
| #define | MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR) |
| #define | SUBFRAME_DURATION_US 1000 |
| #define | SUBFRAMES_PER_SYSTEMFRAME 10 |
| #define | IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L) |
| #define | PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L) |
| #define | iAssert(p) |
+Enumerations | |
| enum | app_state { APP_RUNNING, +APP_STOPPED + } |
| enum | nRChBwOptions { + PHY_BW_5_0_MHZ = 5, +PHY_BW_10_0_MHZ = 10, +PHY_BW_15_0_MHZ = 15, +PHY_BW_20_0_MHZ = 20, + + PHY_BW_25_0_MHZ = 25, +PHY_BW_30_0_MHZ = 30, +PHY_BW_40_0_MHZ = 40, +PHY_BW_50_0_MHZ = 50, + + PHY_BW_60_0_MHZ = 60, +PHY_BW_70_0_MHZ = 70, +PHY_BW_80_0_MHZ = 80, +PHY_BW_90_0_MHZ = 90, + + PHY_BW_100_0_MHZ = 100, +PHY_BW_200_0_MHZ = 200, +PHY_BW_400_0_MHZ = 400 + + } |
+Functions | |
| void | sys_save_buf_to_file_txt (char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num) |
| void | sys_save_buf_to_file (char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num) |
| int | sys_load_file_to_buff (char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num) |
| uint32_t | app_xran_get_scs (uint8_t nMu) |
| uint16_t | app_xran_get_num_rbs (uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA) |
| uint32_t | app_xran_cal_nrarfcn (uint32_t nCenterFreq) |
| int32_t | app_xran_set_slot_type (uint32_t nPhyInstanceId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig) |
| uint32_t | app_xran_get_tti_interval (uint8_t nMu) |
Macro Definition Documentation
+ +◆ APP_O_DU
+ + + +◆ APP_O_RU
+ + + +◆ iAssert
+ + + +◆ IQ_PLAYBACK_BUFFER_BYTES
+ +
+
+
+
+
+
+
+| #define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L) | +
◆ MAX_ANT_CARRIER_SUPPORTED
+ +
+
+
+
+
+
+
+| #define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR) | +
◆ MAX_ANT_CARRIER_SUPPORTED_CAT_B
+ +
+
+
+
+
+
+
+| #define MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR) | +
◆ N_SC_PER_PRB
+ + + +◆ N_SYM_PER_SLOT
+ + + +◆ PRACH_PLAYBACK_BUFFER_BYTES
+ +
+
+
+
+
+
+
+| #define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L) | +
◆ SUBFRAME_DURATION_US
+ + + +◆ SUBFRAMES_PER_SYSTEMFRAME
+ + + +◆ VERSIONX
+ + +Enumeration Type Documentation
+ +◆ app_state
+ +
+
+
+
+
+
+
+| enum app_state | +
◆ nRChBwOptions
+ +
+
+
+
+
+
+| enum nRChBwOptions | +
Function Documentation
+ +◆ app_xran_cal_nrarfcn()
+ +
+
+
+
+
+
+
+| uint32_t app_xran_cal_nrarfcn | +( | +uint32_t | +nCenterFreq | ) | ++ |
◆ app_xran_get_num_rbs()
+ +
+
+
+
+
+
+
| uint16_t app_xran_get_num_rbs | +( | +uint32_t | +nNumerology, | +
| + | + | uint32_t | +nBandwidth, | +
| + | + | uint32_t | +nAbsFrePointA | +
| + | ) | ++ |
+
+- Parameters
-
+
+
+[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz [in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400 [in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+
- Returns
- Number of RBs in cell
Returns number of RBs based on 38.101-1 and 38.101-2 for the cell
+ + + +◆ app_xran_get_scs()
+ +
+
+
+
+
+
+
+| uint32_t app_xran_get_scs | +( | +uint8_t | +nMu | ) | ++ |
◆ app_xran_get_tti_interval()
+ +
+
+
+
+
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+| uint32_t app_xran_get_tti_interval | +( | +uint8_t | +nMu | ) | ++ |
◆ app_xran_set_slot_type()
+ +
+
+
+
+
+
+
+| int32_t app_xran_set_slot_type | +( | +uint32_t | +nPhyInstanceId, | +
| + | + | uint32_t | +nFrameDuplexType, | +
| + | + | uint32_t | +nTddPeriod, | +
| + | + | struct xran_slot_config * | +psSlotConfig | +
| + | ) | ++ |
◆ sys_load_file_to_buff()
+ +
+
+
+
+
+
+
+| int sys_load_file_to_buff | +( | +char * | +filename, | +
| + | + | char * | +bufname, | +
| + | + | unsigned char * | +pBuffer, | +
| + | + | unsigned int | +size, | +
| + | + | unsigned int | +buffers_num | +
| + | ) | ++ |
◆ sys_save_buf_to_file()
+ +
+
+
+
+
+
+
+| void sys_save_buf_to_file | +( | +char * | +filename, | +
| + | + | char * | +bufname, | +
| + | + | unsigned char * | +pBuffer, | +
| + | + | unsigned int | +size, | +
| + | + | unsigned int | +buffers_num | +
| + | ) | ++ |
◆ sys_save_buf_to_file_txt()
+ +
+
+
+
+
+
+| void sys_save_buf_to_file_txt | +( | +char * | +filename, | +
| + | + | char * | +bufname, | +
| + | + | unsigned char * | +pBuffer, | +
| + | + | unsigned int | +size, | +
| + | + | unsigned int | +buffers_num | +
| + | ) | ++ |
Variable Documentation
+ +◆ iq_bfw_buffer_size_dl
+ + + +◆ iq_bfw_buffer_size_ul
+ + + +◆ iq_playback_buffer_size_dl
+ + + +◆ iq_playback_buffer_size_ul
+ + + +◆ iq_srs_buffer_size_ul
+ + + +◆ num_eAxc
+ + + +◆ numCCPorts
+ + + +◆ p_prach_log_buffer
+ +
+
+
+
+
+
+
+| int16_t* p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_rx_buffer
+ +
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+| int16_t* p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_rx_dl_bfw_buffer
+ +
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+| int16_t* p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_rx_log_buffer
+ +
+
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+| int16_t* p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_rx_ul_bfw_buffer
+ +
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+| int16_t* p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_srs_log_buffer
+ +
+
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+| int16_t* p_srs_log_buffer[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR] | +
◆ p_tx_buffer
+ +
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+| int16_t* p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_tx_dl_bfw_buffer
+ +
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+| int16_t* p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_tx_play_buffer
+ +
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+| int16_t* p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_tx_prach_play_buffer
+ +
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+| int16_t* p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ p_tx_srs_play_buffer
+ +
+
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+| int16_t* p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR] | +
◆ p_tx_ul_bfw_buffer
+ +
+
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+| int16_t* p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED] | +
◆ prach_log_buffer_position
+ +
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+| int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ prach_log_buffer_size
+ +
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+| int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_buffer_size
+ +
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+| int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_dl_bfw_buffer_position
+ +
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+| int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_dl_bfw_buffer_size
+ +
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+| int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_log_buffer_position
+ +
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+| int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_log_buffer_size
+ +
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+| int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_ul_bfw_buffer_position
+ +
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+| int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ rx_ul_bfw_buffer_size
+ +
+
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+| int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ srs_log_buffer_position
+ +
+
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+| int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR] | +
◆ srs_log_buffer_size
+ +
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+| int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR] | +
◆ tx_buffer_size
+ +
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+| int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_dl_bfw_buffer_position
+ +
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+| int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_dl_bfw_buffer_size
+ +
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+| int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_play_buffer_position
+ +
+
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+
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+| int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_play_buffer_size
+ +
+
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+| int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_prach_play_buffer_position
+ +
+
+
+
+
+
+
+| int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_prach_play_buffer_size
+ +
+
+
+
+
+
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+| int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_srs_play_buffer_position
+ +
+
+
+
+
+
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+| int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR] | +
◆ tx_srs_play_buffer_size
+ +
+
+
+
+
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+| int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR] | +
◆ tx_ul_bfw_buffer_position
+ +
+
+
+
+
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+| int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED] | +
◆ tx_ul_bfw_buffer_size
+ +
+
+
+
+
+
+| int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED] | +
+