X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=blobdiff_plain;ds=inline;f=src%2F5gnrsch%2Fsch.c;h=9c10ceb41611a00b6bf2f703d7c9b7cc8f5d509b;hb=f01eb5471d34834e2ef1d8dbbfc4b2fe68403650;hp=afbcb183ebc7b420a4937df392fa79d48f0c36af;hpb=5cc86eb25cc33a2cc1472325cffc5634a6c203c6;p=o-du%2Fl2.git

diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c
index afbcb183e..9c10ceb41 100644
--- a/src/5gnrsch/sch.c
+++ b/src/5gnrsch/sch.c
@@ -149,15 +149,15 @@ uint8_t SchInstCfg(RgCfg *cfg, Inst  dInst)
    schCb[inst].genCfg.isSCellActDeactAlgoEnable =  cfg->s.schInstCfg.genCfg.isSCellActDeactAlgoEnable;
 #endif
    schCb[inst].genCfg.startCellId    = cfg->s.schInstCfg.genCfg.startCellId;
-#if 0
+
    /* Initialzie the timer queue */   
-   memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType)*RGSCH_TQ_SIZE);
+   memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType) * SCH_TQ_SIZE);
    /* Initialize the timer control point */
    memset(&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
    schCb[inst].tmrTqCp.tmrLen = RGSCH_TQ_SIZE;
 
    /* SS_MT_TMR needs to be enabled as schActvTmr needs instance information */
-   /* Timer Registration request to SSI */
+   /* Timer Registration request to system services */
    if (ODU_REG_TMR_MT(schCb[inst].schInit.ent, dInst,
 	    (int)schCb[inst].genCfg.tmrRes, schActvTmr) != ROK)
    {
@@ -165,7 +165,7 @@ uint8_t SchInstCfg(RgCfg *cfg, Inst  dInst)
 	    "register timer.");
       return (LCM_REASON_MEM_NOAVAIL);
    }   
-#endif               
+              
    /* Set Config done in TskInit */
    schCb[inst].schInit.cfgDone = TRUE;
    DU_LOG("\nINFO  -->  SCH : Scheduler gen config done");
@@ -678,6 +678,8 @@ uint8_t schInitCellCb(Inst inst, SchCellCfg *schCellCfg)
       cell->schUlSlotInfo[idx] = schUlSlotInfo;
 
    }
+   cell->firstSsbTransmitted = false;
+   cell->firstSib1Transmitted = false;
    fillSsbStartSymb(cell);
    schCb[inst].cells[inst] = cell;