<JIRA ID: ODUHIGH-354> Bug in RACH IND trigger

[o-du/l2.git] / src / phy_stub / phy_stub_msg_hdl.c

diff --git a/src/phy_stub/phy_stub_msg_hdl.c b/src/phy_stub/phy_stub_msg_hdl.c
index dd36140..8cd6217 100644 (file)
--- a/src/phy_stub/phy_stub_msg_hdl.c
+++ b/src/phy_stub/phy_stub_msg_hdl.c
@@ -1042,18 +1042,18 @@ S16 l1HdlUlTtiReq(uint16_t msgLen, void *msg)
       numPdus--;
    }
 
-   if(ueDb.ueCb[ueDb.numActvUe].rachIndSent == false && ulTtiReq->sfn == 16 && ulTtiReq->slot == 6)
+   if(ueDb.ueCb[UE_IDX_0].rachIndSent == false && ulTtiReq->sfn == 16 && ulTtiReq->slot == 6)
    {
-      ueDb.ueCb[ueDb.numActvUe].rachIndSent = true;
+      ueDb.ueCb[UE_IDX_0].rachIndSent = true;
       l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn);
       ueDb.numActvUe++;
    }
 
    //Following can be enabled to test with a second UE
 #if 0
-   if(ueDb.ueCb[ueDb.numActvUe].rachIndSent == false && ulTtiReq->sfn == 304 && ulTtiReq->slot == 0)
+   if(ueDb.ueCb[UE_IDX_1].rachIndSent == false && ulTtiReq->sfn == 304 && ulTtiReq->slot == 0)
    {
-      ueDb.ueCb[ueDb.numActvUe].rachIndSent = true;
+      ueDb.ueCb[UE_IDX_1].rachIndSent = true;
       l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn);
       ueDb.numActvUe++;
    }