#include "lwr_mac_fsm.h"
#include "lwr_mac_phy.h"
#ifdef INTEL_FAPI
-#include "fapi.h"
+#include "nr5g_fapi_internal.h"
#include "fapi_vendor_extension.h"
#endif
#include "lwr_mac_upr_inf.h"
* RFAILED - failure
*
* ****************************************************************/
-uint16_t l1BuildAndSendCrcInd(uint16_t slot, uint16_t sfn)
+uint16_t l1BuildAndSendCrcInd(uint16_t slot, uint16_t sfn, fapi_ul_pusch_pdu_t puschPdu)
{
+ uint8_t result[]={0,//MSG3
+ 0,//BSR
+ 0,//MSG5 RRC Setup Complete
+ 0,//Security Mode Complete
+ 0,//Registraion Complete
+ 0,//RRC Reconfiguration Complete
+ 0,//UL DATA -1
+ 0,//UL DATA -2
+ 0,//UL DATA -3
+ 0,//UL DATA -4
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+
#ifdef INTEL_FAPI
uint8_t idx = 0;
+ static uint8_t ind=0;
+ uint16_t ret = ROK;
fapi_crc_ind_t *crcInd;
MAC_ALLOC(crcInd, sizeof(fapi_crc_ind_t));
crcInd->slot = slot;
crcInd->numCrcs = 1;
- crcInd->crc[idx].handle = 0;
- crcInd->crc[idx].rnti = 0;
- crcInd->crc[idx].harqId = 0;
+ crcInd->crc[idx].handle = puschPdu.handle;
+ crcInd->crc[idx].rnti = puschPdu.rnti;
+ crcInd->crc[idx].harqId = puschPdu.puschData.harqProcessId;
crcInd->crc[idx].tbCrcStatus = 0;
crcInd->crc[idx].numCb = 1;
- crcInd->crc[idx].cbCrcStatus[0] = 0;
+ crcInd->crc[idx].cbCrcStatus[0] = result[ind%50];
+ ret = (0== crcInd->crc[idx].cbCrcStatus[0])?ROK:RFAILED;
+ /*TBD: To use crc ind with random number and percentage */
+ //crcInd->crc[idx].cbCrcStatus[0] = (crcPassPer >= rand()%(100))?0:1;
+
+ ind++;
crcInd->crc[idx].ul_cqi = 0;
crcInd->crc[idx].timingAdvance = 0;
crcInd->crc[idx].rssi = 0;
fillMsgHeader(&crcInd->header, FAPI_CRC_INDICATION, \
sizeof(fapi_crc_ind_t) - sizeof(fapi_msg_t));
- /* Sending RACH indication to MAC */
+ /* Sending CRC indication to MAC */
DU_LOG("\nINFO --> PHY STUB: Sending CRC Indication to MAC");
procPhyMessages(crcInd->header.msg_id, sizeof(fapi_crc_ind_t), (void *)crcInd);
MAC_FREE(crcInd, sizeof(fapi_crc_ind_t));
#endif
- return ROK;
+ return ret;
} /* l1BuildAndSendCrcInd */
#ifdef INTEL_FAPI
phyDb.ueDb.ueCb[ueId-1].msg5Sent = true;
type = MSG_TYPE_MSG5;
}
- else if(!phyDb.ueDb.ueCb[ueId-1].msgSecurityModeComp)
+ else if(!phyDb.ueDb.ueCb[ueId-1].msgNasSecurityModeComp)
+ {
+ phyDb.ueDb.ueCb[ueId-1].msgNasSecurityModeComp = true;
+ type = MSG_TYPE_NAS_SECURITY_MODE_COMPLETE;
+ }
+ else if(!phyDb.ueDb.ueCb[ueId-1].msgRrcSecurityModeComp)
{
- phyDb.ueDb.ueCb[ueId-1].msgSecurityModeComp = true;
- type = MSG_TYPE_SECURITY_MODE_COMPLETE;
+ phyDb.ueDb.ueCb[ueId-1].msgRrcSecurityModeComp = true;
+ type = MSG_TYPE_RRC_SECURITY_MODE_COMPLETE;
}
else if(!phyDb.ueDb.ueCb[ueId-1].msgRegistrationComp)
{
byteIdx += msg5PduLen; /* 4 bytes of header : MAC+RLC */
break;
}
+
+ case MSG_TYPE_NAS_SECURITY_MODE_COMPLETE:
+ {
+ /* For NAS security mode complete where RRC Container is dummy
+ *
+ * MAC subheader format is R/F/LCId/L (2/3 bytes)
+ * LCId is 1 for SRB1
+ * L is length of PDU i.e 6bytes here
+ * From 38.321 section 6.1.1
+ *
+ * RLC subheader for AM PDU is D/C/P/SI/SN (2 bytes for 12-bit SN)
+ * From 38.322, section 6.2.2.4
+ */
+ DU_LOG("\nDEBUG --> PHY_STUB: Forming NAS SECURITY MODE COMPLETE PDU");
+ uint8_t pduLen = 93; /* Length of PDU */
+ pduLen += 2; /* RLC subheader */
+ uint8_t msg[] = {1, pduLen, 128, phyDb.ueDb.ueCb[ueId-1].rlcSnForSrb1++, 0, phyDb.ueDb.ueCb[ueId-1].pdcpSn++, 0x3a, 0x2a, 0x3f,
+ 0x02, 0x75, 0xa0, 0xa0, 0xc0, 0x80, 0x3f, 0x00, 0x2f, 0x3b, 0x80, 0x04, 0x9a, 0xa2, 0x81, 0x09, 0x80, 0xc0,
+ 0x28, 0x04, 0xf8, 0xb8, 0x80, 0x1d, 0xbf, 0x00, 0x20, 0x8c, 0x80, 0x05, 0xf9, 0x00, 0x78, 0x88, 0x7a, 0x88,
+ 0xd9, 0x00, 0x00, 0x00, 0x03, 0x08, 0x00, 0x81, 0x97, 0x02, 0x78, 0x38, 0x78, 0x38, 0x17, 0x82, 0x82, 0x00,
+ 0x80, 0x00, 0x00, 0xa9, 0x00, 0x78, 0x88, 0x00, 0x00, 0x00, 0x8b, 0x83, 0xf8, 0x38, 0x60, 0x20, 0x0c, 0xc0,
+ 0x50, 0x0c, 0x00, 0x80, 0x3a, 0x00, 0x00, 0x48, 0x29, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00};
- case MSG_TYPE_SECURITY_MODE_COMPLETE:
+ pduLen += 2; /* 2 bytes of MAC header */
+ memcpy(pdu, &msg, pduLen);
+ byteIdx += pduLen; /* 4 bytes of header : MAC+RLC */
+break;
+ }
+ case MSG_TYPE_RRC_SECURITY_MODE_COMPLETE:
{
/* For security mode complete where RRC Container is dummy
*
* RLC subheader for AM PDU is D/C/P/SI/SN (2 bytes for 12-bit SN)
* From 38.322, section 6.2.2.4
*/
- DU_LOG("\nDEBUG --> PHY_STUB: Forming SECURITY MODE COMPLETE PDU");
+ DU_LOG("\nDEBUG --> PHY_STUB: Forming RRC SECURITY MODE COMPLETE PDU");
uint8_t pduLen = 12; /* Length of PDU */
pduLen += 2; /* RLC subheader */
uint8_t msg[] = {1, pduLen, 128, phyDb.ueDb.ueCb[ueId-1].rlcSnForSrb1++, 0, phyDb.ueDb.ueCb[ueId-1].pdcpSn++, 0x2a, 0x40, \
uint8_t fillPucchF0F1PduInfo(fapi_uci_o_pucch_f0f1_t *pduInfo, fapi_ul_pucch_pdu_t pucchPdu)
{
uint8_t idx = 0;
+ static uint8_t ind=0;
+ uint8_t result[]={0,//msg4
+ 0,//Security Mode Command
+ 0,//Registration Accept
+ 0,//RRC Reconfiguration
+ 0,//Data 1
+ 0,//Data 2
+ 0,//Data 3
+ 0,//Data 4
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,};
pduInfo->handle = pucchPdu.handle;
pduInfo->pduBitmap = 1; //hardcoded for SR
+ if (pucchPdu.bitLenHarq)
+ {
+ pduInfo->pduBitmap |= HARQ_PDU_BITMASK;
+ }
pduInfo->pucchFormat = pucchPdu.formatType;
pduInfo->ul_cqi = 0;
pduInfo->rnti = pucchPdu.rnti;
pduInfo->rssi = 0;
if(pduInfo->pduBitmap & SR_PDU_BITMASK)
{
- pduInfo->srInfo.srIndication = SR_DETECTED;
- pduInfo->srInfo.srConfidenceLevel = CONFDC_LEVEL_GOOD;
+ if (result[ind%50] == 0)
+ {
+ pduInfo->srInfo.srIndication = SR_DETECTED;
+ pduInfo->srInfo.srConfidenceLevel = CONFDC_LEVEL_GOOD;
+ }
}
if(pduInfo->pduBitmap & HARQ_PDU_BITMASK)
{
pduInfo->harqInfo.harqConfidenceLevel = CONFDC_LEVEL_GOOD;
for(idx = 0; idx < pduInfo->harqInfo.numHarq; idx++)
{
- pduInfo->harqInfo.harqValue[idx] = HARQ_PASS;
+ pduInfo->harqInfo.harqValue[idx] = result[ind%50];
+ ind++;
+ /*TBD: To use harq ind with random number and percentage*/
+ //pduInfo->harqInfo.harqValue[idx] = (dlHqPassPer >= rand()%(100))?HARQ_PASS:HARQ_FAIL;
}
}
return ROK;
if(ulTtiReq->pdus[numPdus-1].pduType == 0)
{
DU_LOG("\nINFO --> PHY STUB: PRACH PDU");
+
+ /* Send RACH Ind to L2 for first UE */
+ if(phyDb.ueDb.ueCb[UE_IDX_0].rachIndSent == false)
+ {
+ phyDb.ueDb.ueCb[UE_IDX_0].isCFRA = false;
+ phyDb.ueDb.ueCb[UE_IDX_0].rachIndSent = true;
+ l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX);
+ phyDb.ueDb.numActvUe++;
+ }
+#if 0
+ /* Send RACH Ind to L2 for second UE */
+ if(phyDb.ueDb.ueCb[UE_IDX_1].rachIndSent == false && phyDb.ueDb.ueCb[UE_IDX_0].msgRrcReconfigComp == true)
+ {
+ phyDb.ueDb.ueCb[UE_IDX_0].isCFRA = false;
+ phyDb.ueDb.ueCb[UE_IDX_1].rachIndSent = true;
+ l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX);
+ phyDb.ueDb.numActvUe++;
+ }
+
+ /* Send RACH Ind to L2 for third UE */
+ if(phyDb.ueDb.ueCb[UE_IDX_2].rachIndSent == false && phyDb.ueDb.ueCb[UE_IDX_1].msgRrcReconfigComp == true)
+ {
+ phyDb.ueDb.ueCb[UE_IDX_0].isCFRA = false;
+ phyDb.ueDb.ueCb[UE_IDX_2].rachIndSent = true;
+ l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX);
+ phyDb.ueDb.numActvUe++;
+ }
+#endif
}
if(ulTtiReq->pdus[numPdus-1].pduType == 1)
{
DU_LOG("\nINFO --> PHY STUB: PUSCH PDU");
- l1BuildAndSendRxDataInd(ulTtiReq->slot, ulTtiReq->sfn, ulTtiReq->pdus[numPdus-1].pdu.pusch_pdu);
+ if (ROK == l1BuildAndSendCrcInd(ulTtiReq->slot, ulTtiReq->sfn,ulTtiReq->pdus[numPdus-1].pdu.pusch_pdu))
+ {
+ l1BuildAndSendRxDataInd(ulTtiReq->slot, ulTtiReq->sfn, ulTtiReq->pdus[numPdus-1].pdu.pusch_pdu);
+ }
}
if(ulTtiReq->pdus[numPdus-1].pduType == 2)
{
memset(&ulTtiSlotInd, 0, sizeof(fapi_ul_tti_req_t));
ulTtiSlotInd.slot = ulTtiReq->slot;
ulTtiSlotInd.sfn = ulTtiReq->sfn;
- ADD_DELTA_TO_TIME(ulTtiSlotInd, ulTtiSlotInd, SLOT_DELAY);
+ ADD_DELTA_TO_TIME(ulTtiSlotInd, ulTtiSlotInd, SLOT_DELAY, MAX_SLOTS);
l1BuildAndSendUciInd(ulTtiSlotInd.slot, ulTtiSlotInd.sfn, ulTtiReq->pdus[numPdus-1].pdu.pucch_pdu);
}
numPdus--;
}
- /* TODO: [SFN:SLOT] at which RACH Indication is sent should be calculated
- * based on PRACH cfg index */
- /* Send RACH Ind to L2 for first UE */
- if(phyDb.ueDb.ueCb[UE_IDX_0].rachIndSent == false && ulTtiReq->sfn == 16 && ulTtiReq->slot == 6)
- {
- phyDb.ueDb.ueCb[UE_IDX_0].isCFRA = false;
- phyDb.ueDb.ueCb[UE_IDX_0].rachIndSent = true;
- l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX);
- phyDb.ueDb.numActvUe++;
- }
-#if 0
- /* Send RACH Ind to L2 for second UE */
- if(phyDb.ueDb.ueCb[UE_IDX_1].rachIndSent == false && ulTtiReq->sfn == 304 && ulTtiReq->slot == 0)
- {
- phyDb.ueDb.ueCb[UE_IDX_0].isCFRA = false;
- phyDb.ueDb.ueCb[UE_IDX_1].rachIndSent = true;
- l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX);
- phyDb.ueDb.numActvUe++;
- }
-
- /* Send RACH Ind to L2 for third UE */
- if(phyDb.ueDb.ueCb[UE_IDX_2].rachIndSent == false && ulTtiReq->sfn == 526 && ulTtiReq->slot == 0)
- {
- phyDb.ueDb.ueCb[UE_IDX_0].isCFRA = false;
- phyDb.ueDb.ueCb[UE_IDX_2].rachIndSent = true;
- l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX);
- phyDb.ueDb.numActvUe++;
- }
-#endif
MAC_FREE(msg, msgLen);
#endif
return ROK;
{
if(ulDciReq->pdus[numPdus-1].pduType == 0)
{
- DU_LOG("\nINFO --> PHY STUB: Received UL DCI Request for PDCCH PDU");
+ DU_LOG("\nINFO --> PHY STUB: Received UL DCI Request for PDCCH PDU");
//l1BuildAndSendMsg5(ulDciReq->sfn, ulDciReq->slot);
//msg5Sent = true;
}
Code Review / o-du / l2.git / blobdiff