[Epic-ID: ODUHIGH-464][Task-ID: ODUHIGH-480] WG8 Alignment |Third phase | Cfg/Recfg...

[o-du/l2.git] / src / du_app / du_mgr.h

diff --git a/src/du_app/du_mgr.h b/src/du_app/du_mgr.h
index 7dad91b..4cf1255 100644 (file)
--- a/src/du_app/du_mgr.h
+++ b/src/du_app/du_mgr.h
@@ -57,6 +57,9 @@
 #define DU_SET_ZERO(_buf, _size)   \
    memset((_buf), 0, _size);
 
+/*Refer Spec 38.331 Annexure A: maxNrofPageRec : 32 [Maximum number of page records]*/
+#define MAX_PAGING_UE_RECORDS 32
+
 typedef enum
 {
    SLICE_INFO_NOT_AVAILABLE,
@@ -126,20 +129,82 @@ typedef struct upTnlCfg
    GtpTnlCfg *tnlCfg2; /* Tunnel 2 */
 }UpTnlCfg;
 
+#ifdef NR_DRX
+/* This structures is taken from the DRX Cycle section of
+ * specification 33.473. */
+typedef struct drxCycle
+{
+   uint16_t drxLongCycleLength;
+   bool     shortDrxCyclePres;
+   ShortDrx shortDrxCycle;
+}DrxCycle;
+#endif
+
+typedef struct duLcCfg
+{
+   ConfigType configType;
+   LcCfg      lcConfig;
+}DuLcCfg;
+
+typedef struct duMacUeCfg
+{
+   uint16_t               cellId;
+   uint8_t                ueId;
+   uint16_t               crnti;
+   bool                   macCellGrpCfgPres;
+   MacCellGrpCfg          macCellGrpCfg;
+   bool                   phyCellGrpCfgPres;
+   PhyCellGrpCfg          phyCellGrpCfg;
+   bool                   spCellCfgPres;
+   SpCellRecfg            spCellCfg;
+   AmbrCfg                *ambrCfg;
+   ModulationInfo         dlModInfo;    /* DL modulation info */ //TBD
+   ModulationInfo         ulModInfo;    /* UL modulation info */  //TBD
+   uint8_t                numLcs;
+   DuLcCfg                lcCfgList[MAX_NUM_LC];
+   UeCfgState             macUeCfgState;    /* InActive / Completed */ //TBD
+   DataTransmissionAction transmissionAction; //TBD
+#ifdef NR_DRX
+   bool     drxConfigIndicatorRelease;
+#endif
+}DuMacUeCfg;
+
+typedef struct duRlcBearerCfg
+{
+   ConfigType   configType;
+   RlcBearerCfg rlcBearerCfg;
+}DuRlcBearerCfg;
+
+typedef struct duRlcUeCfg
+{
+   uint16_t       cellId;
+   uint8_t        ueId;
+   uint8_t        numLcs;
+   DuRlcBearerCfg rlcLcCfg[MAX_NUM_LC];
+   UeCfgState     rlcUeCfgState; /* InActive / Completed */
+}DuRlcUeCfg;
+
+
 typedef struct duUeCfg
 {
    void *cellGrpCfg;
    void *ueNrCapability;
    uint8_t numRlcLcs;        /* Rlc Ue Cfg */
-   RlcBearerCfg rlcLcCfg[MAX_NUM_LC];
+   DuRlcBearerCfg rlcLcCfg[MAX_NUM_LC];
    uint8_t numMacLcs;        /* Mac Ue Cfg */
-   LcCfg   macLcCfg[MAX_NUM_LC];
+   DuLcCfg   macLcCfg[MAX_NUM_LC];
    AmbrCfg *ambrCfg;
    uint8_t numDrb;
    UpTnlCfg upTnlInfo[MAX_NUM_DRB];  /* User plane TNL Info*/
    uint8_t numDrbSetupMod;        /*No. of DRB Added during Modification*/
-   MacUeCfg copyOfmacUeCfg;
-   DataTransmissionAction dataTransmissionAction; 
+   uint8_t numDrbModified;        /*No. of DRB Modified during Modification*/
+   DuMacUeCfg copyOfmacUeCfg;
+   DataTransmissionAction dataTransmissionAction;
+#ifdef NR_DRX
+   bool     drxCyclePres;
+   DrxCycle drxCycle;
+   bool     drxConfigIndicatorRelease;
+#endif
 }DuUeCfg;
 
 typedef struct f1UeContextSetup
@@ -168,8 +233,9 @@ typedef struct duUeCb
    uint32_t gnbCuUeF1apId;   /* GNB CU UE F1AP ID */
    uint32_t drbBitMap;       /* Drb Bit Map */
    UeState  ueState;         /* UE Active/ Ue Inactive state */
-   MacUeCfg macUeCfg;        /* Mac Ue Cfg */
-   RlcUeCfg rlcUeCfg;        /* Rlc Ue Cfg */
+   MacCfraResource cfraResource; /* CF-RA resource assigned by MAC/SCH */
+   DuMacUeCfg duMacUeCfg;        /* Mac Ue Cfg */
+   DuRlcUeCfg duRlcUeCfg;        /* Rlc Ue Cfg */
 }DuUeCb;
 
 typedef struct  slotInfo
@@ -178,6 +244,42 @@ typedef struct  slotInfo
    uint16_t slot;
 }SlotInfo;
 
+typedef struct pagingMsg
+{
+   /*Note: Paging UEID is extracted from 5gSTMSI as per Spec 38.304, Sec 7.1.
+    *This is not same as DU-UE_F1AP_ID or CU_UE_F1AP_ID*/
+   uint16_t  pagUeId;              /* UE Identifier from CU*/
+
+   /*TODO: When RAN Inititated Paging will be supported then I-RNTI will be
+    * added as a choice for UE Identity along with S-TMSI*/
+   uint64_t  sTmsi;             /* UE Paging Identity: S-TMSI */
+   bool      pagingDrxPres;     /* flag to indicate paging drx present or not */
+   uint16_t  pagingDrx;         /* UE specific paging drx */
+   uint8_t   pagPriority;       /* Paging priority */
+   uint16_t  pagingFrame;       /* paging frame */
+   uint16_t  pagingFrameOffset; /* paging offset */
+   uint8_t   i_s;               /* Index points to PO from the sub-frame pattern */
+   uint16_t  T;                 /* T is DRX cycle of the UE */
+}DuPagingMsg;
+
+typedef struct duPagUeRecord
+{
+   uint16_t  pagUeId;           /*UEID calculated from 5gsTMSI as per Spec 38.304*/
+   uint64_t  sTmsi;             /* UE Paging Identity: S-TMSI */
+}DuPagUeRecord;
+
+typedef struct duPagInfo
+{
+   uint8_t      i_s;          /*Index of PO*/
+   CmLListCp    pagUeList;    /*List of UEs to be paged in this Paging Frame/Paging Occ*/
+}DuPagUeList;
+
+typedef struct duPagInfoMap
+{
+   uint16_t    pf;             /* Paging Frame*/
+   CmLListCp   pagInfoList;    /* Master List of Paging Identified by PF and i_s*/
+}DuPagInfoList;
+
 typedef struct duCellCb
 {
    uint16_t       cellId;                 /* Internal cell Id */
@@ -188,6 +290,8 @@ typedef struct duCellCb
    uint32_t       numActvUes;             /* Total Active UEs */
    DuUeCb         ueCb[MAX_NUM_UE];       /* Stores UE context */
    SlotInfo       currSlotInfo;
+   DuPagingMsg    tmpPagingInfoOfUe;      /* UE paging information */
+   CmHashListCp   pagingInfoMap;          /*Paging Map between PF and PagingInfoList*/
 }DuCellCb;
 
 typedef struct duLSapCb
@@ -293,6 +397,7 @@ uint8_t duSendEgtpDatInd(Buffer *mBuf);
 uint8_t duHdlSchCfgComplete(Pst *pst, RgMngmt *cfm);
 uint8_t duBuildAndSendMacCellStart();
 uint8_t duBuildAndSendMacCellStop(uint16_t cellId);
+
 #endif
 
 /**********************************************************************