Merge "Separation of logs in based on error, info, debug"

[o-du/l2.git] / src / du_app / du_cfg.h

diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h
index 1fbf9b3..ba5665f 100644 (file)
--- a/src/du_app/du_cfg.h
+++ b/src/du_app/du_cfg.h
@@ -32,6 +32,7 @@
 #define CU_EGTP_PORT  39002
 #define NR_PCI 1
 #define NR_CELL_ID 1
+#define NR_NUMEROLOGY 0
 #define DU_NAME "ORAN_OAM_DU"
 #define CELL_TYPE SMALL
 #define DUPLEX_MODE DUP_MODE_FDD
@@ -43,12 +44,15 @@
 #define PLMN_MNC1 8
 #define PLMN_MNC2 0
 #define PLMN_SIZE 3
-#define NR_DL_ARFCN 2118460
-#define NR_UL_ARFCN 1718460
+
+/* Spec 30.104 Table 5.4.2.3-1:Applicable NR-ARFCN per operating band in FR1 */
+#define NR_DL_ARFCN 428000
+#define NR_UL_ARFCN 390000
 #define SUL_ARFCN 100
-#define NR_FREQ_BAND 257
-#define NR_FREQ_BAND_IND 78
+#define NR_FREQ_BAND 1
+#define NR_FREQ_BAND_IND 1
 #define SUL_BAND 2
+
 #define TIME_CFG 0
 #define CARRIER_IDX 1
 #define NUM_TX_ANT 2
@@ -56,10 +60,8 @@
 #define FREQ_SHIFT_7P5KHZ FALSE
 #define SSB_PBCH_PWR 0
 #define BCH_PAYLOAD PHY_GEN_TIMING_PBCH_BIT
-#define TOTAL_PRB_BW 106
 #define SUBCARRIER_SPACING 0
 #define NORMAL_CYCLIC_PREFIX 0
-#define SCS_CARRIER_BANDWIDTH 273         /* Subcarrier spacing- carrier bandwidth */
 #define OFFSET_TO_POINT_A 24                     /* PRB Offset to Point A */
 #define BETA_PSS BETA_PSS_0DB  
 #define SSB_PERIODICITY_5MS   5
@@ -71,9 +73,8 @@
 #define SSB_SUBCARRIER_OFFSET 0               
 #define SSB_MULT_CARRIER_BAND FALSE
 #define MULT_CELL_CARRIER FALSE
-#define FREQ_LOC_BW  1099              /* DL frequency location and bandwidth */
+#define FREQ_LOC_BW  28875             /* DL frequency location and bandwidth. Spec 38.508 Table 4.3.1.0B-1*/
 #define UL_P_MAX  23
-#define BANDWIDTH 20
 #define DMRS_TYPE_A_POS 2
 #define NUM_SYMBOLS_PER_SLOT 14       /* Number of symbols within a slot */
 #define CORESET0_END_PRB   48
@@ -104,11 +105,9 @@
 #define ROOT_SEQ_LEN 139
 
 /* MACRCO Ddefine for PDCCH Configuration */
-#define PDCCH_CTRL_RSRC_SET_ZERO   13   /* Control resouce set zero */
-#define PDCCH_SEARCH_SPACE_ZERO    0    /* Search space zero */
 #define PDCCH_SEARCH_SPACE_ID      1    /* Common search space id */
 #define PDCCH_CTRL_RSRC_SET_ID     0    /* Control resource set id */
-#define PDCCH_SEARCH_SPACE_ID_SIB1 0    /* Search space id for sib1 */
+#define PDCCH_SEARCH_SPACE_ID_SIB1 1    /* Search space id for sib1 */
 #define PDCCH_SEARCH_SPACE_ID_PAGING 1  /* Search space id for paging */
 #define PDCCH_SEARCH_SPACE_ID_RA   1    /* Search spaced id for random access */
 #define PDCCH_SERACH_SPACE_DCI_FORMAT 0
@@ -213,8 +212,6 @@
 #define SYS_FRAME_NUM 0
 #define SPARE 0
 #define SSB_SC_OFFSET 8
-#define CORESET_ZERO 1
-#define SEARCH_SPACE_ZERO 8
 #define DU_RANAC 1
 #define CELL_IDENTITY 32
 
@@ -259,6 +256,14 @@
 #define LC_ID 1
 #endif
 
+/* MACRO definitions for modulcation order */
+#define MOD_ORDER_QPSK  2
+#define MOD_ORDER_QAM16 4
+#define MOD_ORDER_QAM64 6
+#define MOD_ORDER_QAM256 8
+#define PDSCH_MCS_INDEX 20  /* For 64QAM, valid mcs index: 17-28 in 38.214  - Table 5.1.3.1-1*/
+#define PUSCH_MCS_INDEX 10  /* For 16QAM, valid mcs index: 10-16 in 38.214  - Table 5.1.3.1-1*/
+
 typedef enum
 {
    GNBDU,