#define DU_ID 1
#ifndef O1_ENABLE
-
#define DU_IP_V4_ADDR "192.168.130.81"
#define CU_IP_V4_ADDR "192.168.130.82"
#define RIC_IP_V4_ADDR "192.168.130.80"
#define NORMAL_CYCLIC_PREFIX 0
#define OFFSET_TO_POINT_A 24 /* PRB Offset to Point A */
#define BETA_PSS BETA_PSS_0DB
-#define SSB_PERIODICITY_5MS 5
-#define SSB_PERIODICITY_10MS 10
-#define SSB_PERIODICITY_20MS 20
-#define SSB_PERIODICITY_40MS 40
-#define SSB_PERIODICITY_80MS 80
-#define SSB_PERIODICITY_160MS 160
+#define SSB_PERIODICITY 20
#define SSB_SUBCARRIER_OFFSET 0
#define SSB_MULT_CARRIER_BAND FALSE
#define MULT_CELL_CARRIER FALSE
#define CORESET1_NUM_PRB 24
/* MACRO defines for PRACH Configuration */
+#ifndef NR_TDD
+#define PRACH_CONFIG_IDX 16
+#else
#define PRACH_CONFIG_IDX 88
+#endif
#define PRACH_MAX_PRB 24 /* As per (spec 38.211-Table 6.3.3.2-1), max allocated PRBs can go upto 24 */
#define PRACH_FREQ_START (MAX_NUM_RB - PRACH_MAX_PRB) /* In order to allocate PRACH from end of the resource grid */
#define PRACH_SEQ_LEN SHORT_SEQUENCE
#define NUM_UNUSED_ROOT_SEQ 0
#define UNUSED_ROOT_SEQ 1
#define SSB_PER_RACH 1
+#define CB_PREAMBLE_PER_SSB 8
#define PRACH_MULT_CARRIER_BAND FALSE
#define PRACH_PREAMBLE_RCVD_TGT_PWR -74
#define NUM_RA_PREAMBLE 63
#define SPARE 0
#define SSB_SC_OFFSET 0
#define DU_RANAC 1
-#define CELL_IDENTITY 16
+#define CELL_IDENTITY 1
/* Macro definitions for DUtoCuRrcContainer */
#define CELL_GRP_ID 0
#define DEDICATED_RATIO 10
#define NUM_OF_SUPPORTED_SLICE 2
+#ifdef NR_DRX
+/* Macros for Drx configuration */
+#define DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS true
+#define DRX_ONDURATION_TIMER_VALUE_IN_SUBMS 32
+#define DRX_ONDURATION_TIMER_VALUE_IN_MS 10
+#define DRX_INACTIVITY_TIMER 2
+#define DRX_HARQ_RTT_TIMER_DL 56
+#define DRX_HARQ_RTT_TIMER_UL 56
+#define DRX_RETRANSMISSION_TIMER_DL 4
+#define DRX_RETRANSMISSION_TIMER_UL 4
+#define DRX_LONG_CYCLE_START_OFFSET_CHOICE 40
+#define DRX_LONG_CYCLE_START_OFFSET_VAL 8
+#define DRX_SHORT_CYCLE_PRESENT true
+#define DRX_SHORT_CYCLE 2
+#define DRX_SHORT_CYCLE_TIMER 2
+#define DRX_SLOT_OFFSET 0
+#endif
+
typedef enum
{
GNBDU,
long pwrRampingStep; /* Power ramping steps for PRACH */
long raRspWindow; /* RA response window */
long numRaPreamble; /* Total num of preamble used in random access */
- uint8_t ssbPerRachOccPresent;
long numSsbPerRachOcc; /* Numer of SSBs per RACH Occassion */
+ long numCbPreamblePerSsb; /* Number of Contention-Based preamble per SSB */
long contResTimer; /* Contention resolution timer */
long rsrpThreshSsb;
uint8_t rootSeqIdxPresent;
typedef struct ulCfgCommon
{
+ long freqBandInd; /* Uplink frequency band indicator */
long pMax; /* Max UL transmission power that UE applies */
long locAndBw; /* Frequency location and bandwidth */
ScsSpecCarrier ulScsCarrier; /* SCS Specific carrier */
typedef struct srvCellCfgCommSib
{
+ long scs;
DlCfgCommon dlCfg;
UlCfgCommon ulCfg;
uint8_t ssbPosInBurst;