[Issue-ID : ODUHIGH-487] EGTP Port fix at F1 interface

[o-du/l2.git] / src / du_app / du_cfg.h

diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h
index 2a488d1..6f55b4f 100644 (file)
--- a/src/du_app/du_cfg.h
+++ b/src/du_app/du_cfg.h
@@ -28,21 +28,19 @@
 #define DU_ID 1
 
 #ifndef O1_ENABLE
-
 #define DU_IP_V4_ADDR "192.168.130.81"
 #define CU_IP_V4_ADDR "192.168.130.82"
 #define RIC_IP_V4_ADDR "192.168.130.80"
-#define DU_PORT 38472
-#define CU_PORT 38472
-#define RIC_PORT 36421
+
+#define F1_SCTP_PORT 38472  /* As per the spec 38.472, the registered port number for F1AP is 38472 */
+#define E2_SCTP_PORT 36421
 #endif
 
-#define DU_EGTP_PORT  39001
-#define CU_EGTP_PORT  39003
+#define F1_EGTP_PORT  2152  /* As per the spec 29.281, the registered port number for GTP-U is 2152 */
 #define NR_PCI 1
 #define NR_CELL_ID 1
 
-#define DU_NAME "ORAN_OAM_DU"
+#define DU_NAME "ORAN OAM DU"
 #define CELL_TYPE SMALL
 
 //TODO: while testing for TDD, Mu1 and 100 MHz, this flag must be enabled
@@ -88,12 +86,7 @@
 #define NORMAL_CYCLIC_PREFIX 0
 #define OFFSET_TO_POINT_A 24                     /* PRB Offset to Point A */
 #define BETA_PSS BETA_PSS_0DB  
-#define SSB_PERIODICITY_5MS   5
-#define SSB_PERIODICITY_10MS  10
-#define SSB_PERIODICITY_20MS  20
-#define SSB_PERIODICITY_40MS  40
-#define SSB_PERIODICITY_80MS  80
-#define SSB_PERIODICITY_160MS 160
+#define SSB_PERIODICITY 20
 #define SSB_SUBCARRIER_OFFSET 0               
 #define SSB_MULT_CARRIER_BAND FALSE
 #define MULT_CELL_CARRIER FALSE
@@ -105,7 +98,11 @@
 #define CORESET1_NUM_PRB   24
 
 /* MACRO defines for PRACH Configuration */
+#ifndef NR_TDD
+#define PRACH_CONFIG_IDX   16
+#else
 #define PRACH_CONFIG_IDX   88
+#endif
 #define PRACH_MAX_PRB  24  /* As per (spec 38.211-Table 6.3.3.2-1), max allocated PRBs can go upto 24 */
 #define PRACH_FREQ_START  (MAX_NUM_RB - PRACH_MAX_PRB) /* In order to allocate PRACH from end of the resource grid */
 #define PRACH_SEQ_LEN SHORT_SEQUENCE
@@ -118,6 +115,7 @@
 #define NUM_UNUSED_ROOT_SEQ 0
 #define UNUSED_ROOT_SEQ 1
 #define SSB_PER_RACH 1
+#define CB_PREAMBLE_PER_SSB 8
 #define PRACH_MULT_CARRIER_BAND FALSE
 #define PRACH_PREAMBLE_RCVD_TGT_PWR  -74   
 #define NUM_RA_PREAMBLE  63
@@ -240,7 +238,7 @@
 #define SPARE 0
 #define SSB_SC_OFFSET 0
 #define DU_RANAC 1
-#define CELL_IDENTITY 16
+#define CELL_IDENTITY 1
 
 /* Macro definitions for DUtoCuRrcContainer */
 #define CELL_GRP_ID 0
@@ -301,6 +299,24 @@
 #define DEDICATED_RATIO  10
 #define NUM_OF_SUPPORTED_SLICE  2
 
+#ifdef NR_DRX
+/* Macros for Drx configuration */
+#define DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS true
+#define DRX_ONDURATION_TIMER_VALUE_IN_SUBMS 32
+#define DRX_ONDURATION_TIMER_VALUE_IN_MS 10
+#define DRX_INACTIVITY_TIMER 2
+#define DRX_HARQ_RTT_TIMER_DL 56
+#define DRX_HARQ_RTT_TIMER_UL 56
+#define DRX_RETRANSMISSION_TIMER_DL 4
+#define DRX_RETRANSMISSION_TIMER_UL 4
+#define DRX_LONG_CYCLE_START_OFFSET_CHOICE 40
+#define DRX_LONG_CYCLE_START_OFFSET_VAL 8
+#define DRX_SHORT_CYCLE_PRESENT true
+#define DRX_SHORT_CYCLE 2
+#define DRX_SHORT_CYCLE_TIMER 2
+#define DRX_SLOT_OFFSET 0
+#endif
+
 typedef enum
 {
    GNBDU,
@@ -1149,8 +1165,8 @@ typedef struct rachCfgCommon
    long   pwrRampingStep;    /* Power ramping steps for PRACH */
    long   raRspWindow;       /* RA response window */
    long   numRaPreamble;     /* Total num of preamble used in random access */
-   uint8_t ssbPerRachOccPresent;
    long   numSsbPerRachOcc;  /* Numer of SSBs per RACH Occassion */
+   long   numCbPreamblePerSsb; /* Number of Contention-Based preamble per SSB */
    long   contResTimer;      /* Contention resolution timer */
    long   rsrpThreshSsb;
    uint8_t rootSeqIdxPresent;
@@ -1185,6 +1201,7 @@ typedef struct pucchCfgCommon
 
 typedef struct ulCfgCommon
 {
+   long   freqBandInd;  /* Uplink frequency band indicator */
    long   pMax;         /* Max UL transmission power that UE applies */
    long   locAndBw;     /* Frequency location and bandwidth */
    ScsSpecCarrier   ulScsCarrier; /* SCS Specific carrier */
@@ -1206,6 +1223,7 @@ typedef struct tddUlDlCfgCommon
 
 typedef struct srvCellCfgCommSib
 { 
+   long               scs;
    DlCfgCommon        dlCfg;
    UlCfgCommon        ulCfg;
    uint8_t            ssbPosInBurst;