/* MACROS */
#define DU_INST 0
#define DU_ID 1
-#define DU_IP_V4_ADDR "10.0.2.20"
+#define DU_IP_V4_ADDR "192.168.130.81"
#define CU_IP_V4_ADDR "10.0.2.25"
-#define RIC_IP_V4_ADDR "10.0.2.30"
+#define RIC_IP_V4_ADDR "192.168.130.80"
#define DU_PORT 38472
#define CU_PORT 38472
-#define RIC_PORT 38482
+#define RIC_PORT 36422
#define DU_EGTP_PORT 39001
#define CU_EGTP_PORT 39002
#define NR_PCI 1
#define FREQ_SHIFT_7P5KHZ FALSE
#define SSB_PBCH_PWR -5
#define BCH_PAYLOAD MAC_GEN_FULL_PBCH_PAYLD
-#define SUBCARRIER_SPACING 1
+#define TOTAL_PRB_BW 106
+#define SUBCARRIER_SPACING 0
+#define NORMAL_CYCLIC_PREFIX 0
#define SCS_CARRIER_BANDWIDTH 273 /* Subcarrier spacing- carrier bandwidth */
#define OFFSET_TO_POINT_A 24 /* PRB Offset to Point A */
#define BETA_PSS BETA_PSS_0DB
-#define SSB_PERIODICITY 2
+#define SSB_PERIODICITY 5
#define SSB_SUBCARRIER_OFFSET 0
#define SSB_MULT_CARRIER_BAND FALSE
#define MULT_CELL_CARRIER FALSE
#define BANDWIDTH 20
/* MACRO defines for PRACH Configuration */
-#define PRACH_CONFIG_IDX 147
+#define PRACH_CONFIG_IDX 105
#define PRACH_FREQ_START 0
#define PRACH_SEQ_LEN SHORT_SEQUENCE
#define PRACH_SUBCARRIER_SPACING 1
#define PRACH_RESTRICTED_SET_CFG 0
#define NUM_PRACH_FDM 1
-#define ROOT_SEQ_IDX 0
+#define ROOT_SEQ_IDX 24
#define NUM_ROOT_SEQ 1
#define ZERO_CORRELATION_ZONE_CFG 6
-#define NUM_UNUSED_ROOT_SEQ 1
+#define NUM_UNUSED_ROOT_SEQ 0
#define UNUSED_ROOT_SEQ 1
-#define SSB_PER_RACH 0
+#define SSB_PER_RACH 1
#define PRACH_MULT_CARRIER_BAND FALSE
#define PRACH_PREAMBLE_RCVD_TGT_PWR -74
#define NUM_RA_PREAMBLE 63
#define RSRP_THRESHOLD_SSB 31
#define TDD_PERIODICITY TX_PRDCTY_MS_2P5
#define RSS_MEASUREMENT_UNIT DONT_REPORT_RSSI
+#define RA_CONT_RES_TIMER 64
+#define RA_RSP_WINDOW 180
+#define PRACH_RESTRICTED_SET 0 /* Unrestricted */
/* MACRCO Ddefine for PDCCH Configuration */
/* MACRCO Ddefine for PDSCH Configuration */
#define PDSCH_K0 0
-#define PDSCH_START_SYMB_AND_LEN 53
+#define PDSCH_START_SYMBOL 2
+#define PDSCH_LENGTH_SYMBOL 12
+
/* MACRO Define for PUSCH Configuration */
-#define PUSCH_K0 3
-#define PUSCH_START_SYMB_AND_LEN 55
+#define PUSCH_K2 3
+#define PUSCH_START_SYMBOL 0
+#define PUSCH_LENGTH_SYMBOL 14
+
#define PUSCH_MSG3_DELTA_PREAMBLE 0
#define PUSCH_P0_NOMINAL_WITH_GRANT -70
PERMIT_HIGH_PRIOR_SESSION_AND_MOBILE_TERM_SERVICE
}F1UacStandardAction;
+typedef enum
+{
+ PDSCH_MAPPING_TYPE_A,
+ PDSCH_MAPPING_TYPE_B,
+}pdschMappingType;
+
+typedef enum
+{
+ PUSCH_MAPPING_TYPE_A,
+ PUSCH_MAPPING_TYPE_B,
+}puschMappingType;
+
+
typedef struct f1RrcVersion
{
char rrcVer[30]; /* Latest RRC Version */
typedef struct f1CellInfo
{
NrEcgi nrCgi; /* Cell global Identity */
- uint32_t nrPci; /* Physical Cell Identity */
+ uint32_t nrPci; /* Physical Cell Identity */
Plmn plmn[MAX_PLMN]; /* Available PLMN list */
Plmn extPlmn[MAX_PLMN]; /* Extended available PLMN list */
}F1CellInfo;
typedef struct f1DuCellInfo
{
F1CellInfo cellInfo; /* cell info */
- uint16_t tac; /* tracking area code */
- uint16_t epsTac; /* Configured EPS TAC */
+ uint16_t tac; /* tracking area code */
+ uint16_t epsTac; /* Configured EPS TAC */
NrModeInfo f1Mode; /* NR mode info : FDD/TDD */
- uint8_t measTimeCfg; /* Measurement timing configuration */
+ uint8_t measTimeCfg; /* Measurement timing configuration */
F1CellDir cellDir; /* Cell Direction */
F1CellType cellType; /* Cell Type */
F1BrdcstPlmnInfo brdcstPlmnInfo[MAXBPLMNNRMINUS1]; /* Broadcast PLMN Identity Info List */
typedef struct schedulerCfg
{
- uint8_t numTxAntPorts; /*!< Number of Tx antenna ports */
- uint8_t ulSchdType; /*!< Indicates which UL scheduler to use, range
- * is 0..(number of schedulers - 1) */
- uint8_t dlSchdType; /*!< Indicates which DL scheduler to use, range
- * is 0..(number of schedulers - 1) */
- uint8_t numCells; /*!< Max number of cells */
- uint8_t maxUlUePerTti; /*!< Max number of UE in UL per TTI */
- uint8_t maxDlUePerTti; /*!< Max number of UE in DL per TTI */
+ uint8_t numTxAntPorts; /*!< Number of Tx antenna ports */
+ uint8_t ulSchdType; /*!< Indicates which UL scheduler to use, range
+ * is 0..(number of schedulers - 1) */
+ uint8_t dlSchdType; /*!< Indicates which DL scheduler to use, range
+ * is 0..(number of schedulers - 1) */
+ uint8_t numCells; /*!< Max number of cells */
+ uint8_t maxUlUePerTti; /*!< Max number of UE in UL per TTI */
+ uint8_t maxDlUePerTti; /*!< Max number of UE in DL per TTI */
}SchedulerCfg;
typedef struct mibParams
typedef struct pdschCfgCommon
{
uint8_t present;
- long k0;
- long mapType; /* Mapping Type */
- long startSymbAndLen; /* Start Symbol and Length */
+ long k0;
+ long mapType; /* Mapping Type */
+ uint16_t sliv;
}PdschCfgCommon;
typedef struct bcchCfg
typedef struct puschCfgCommon
{
- uint8_t present;
- long k2;
- long mapType;
- long startSymbAndLen;
- long msg3DeltaPreamble;
- long p0NominalWithGrant;
+ uint8_t present;
+ long k2;
+ long mapType;
+ uint16_t sliv;
+ long msg3DeltaPreamble;
+ long p0NominalWithGrant;
}PuschCfgCommon;
typedef struct pucchCfgCommon