*******************************************************************************/
/* events */
-#define EVENT_SCH_CELL_CFG 1
-#define EVENT_SCH_CELL_CFG_CFM 2
+#define EVENT_SCH_CELL_CFG 1
+#define EVENT_SCH_CELL_CFG_CFM 2
+#define EVENT_DL_ALLOC 3
+#define EVENT_UL_SCH_INFO 4
/* selector */
#define MAC_SCH_LC_SELECTOR 0
#define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
#define MAX_CODEWORDS 1 /* max should be 2 */
+/* Datatype in UL SCH Info */
+#define SCH_DATATYPE_PUSCH 1
+#define SCH_DATATYPE_PUSCH_UCI 2
+#define SCH_DATATYPE_UCI 4
+#define SCH_DATATYPE_SRS 8
+#define SCH_DATATYPE_PRACH 16
+
/*structures*/
uint32_t nSSBMask[SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
}SchSsbCfg;
-/* SIB1 interface structure */
typedef struct bwpCfg
{
uint8_t subcarrierSpacing;
uint16_t BWPStart;
}BwpCfg;
-typedef struct coresetCfg
-{
- uint8_t startSymbolIndex;
- uint8_t durationSymbols;
- uint8_t freqDomainResource[6];
- uint8_t cceRegMappingType;
- uint8_t regBundleSize;
- uint8_t interleaverSize;
- uint8_t coreSetType;
- uint16_t shiftIndex;
- uint8_t precoderGranularity;
- uint8_t cceIndex;
- uint8_t aggregationLevel;
-} CoresetCfg;
-
typedef struct prg
{
uint16_t pmIdx;
Prg prg[MAX_NUM_PRG];
} BeamformingInfo;
-typedef struct txPowerPdcchInfo
-{
- uint8_t powerValue;
- uint8_t powerControlOffsetSS;
-} TxPowerPdcchInfo;
-
-typedef struct dlDCI
-{
- uint16_t rnti;
- uint16_t scramblingId;
- uint16_t scramblingRnti;
- uint8_t cceIndex;
- uint8_t aggregLevel;
- BeamformingInfo beamPdcchInfo;
- TxPowerPdcchInfo txPdcchPower;
-} DlDCI;
-
-typedef struct sib1PdcchCfg
-{
- BwpCfg sib1PdcchBwpCfg;
- /* coreset-0 configuration */
- CoresetCfg sib1Coreset0Cfg;
-
- uint16_t numDlDci;
- DlDCI sib1DlDci; /* as of now its only one DCI, later it will be numDlCi */
-} Sib1PdcchCfg;
-/* end of SIB1 PDCCH structures */
-
/* SIB1 PDSCH structures */
typedef struct codewordinfo
typedef struct pdschTimeAlloc
{
+ uint8_t rowIndex;
uint8_t startSymbolIndex;
uint8_t numSymbols;
} PdschTimeAlloc;
uint8_t powerControlOffsetSS;
} TxPowerPdschInfo;
-typedef struct sib1PdschCfg
+typedef struct pdschCfg
{
uint16_t pduBitmap;
uint16_t rnti;
uint16_t pduIndex;
- BwpCfg sib1PdschBwpCfg;
+ BwpCfg pdschBwpCfg;
uint8_t numCodewords;
CodewordInfo codeword[MAX_CODEWORDS];
uint16_t dataScramblingId;
uint8_t transmissionScheme;
uint8_t refPoint;
DmrsInfo dmrs;
- PdschFreqAlloc sib1FreqAlloc;
- PdschTimeAlloc sib1TimeAlloc;
+ PdschFreqAlloc freqAlloc;
+ PdschTimeAlloc timeAlloc;
BeamformingInfo beamPdschInfo;
TxPowerPdschInfo txPdschPower;
-} Sib1PdschCfg;
+} PdschCfg;
/* SIB1 PDSCH structures end */
+/* SIB1 interface structure */
+
+typedef struct coresetCfg
+{
+ uint8_t coreSet0Size;
+ uint8_t startSymbolIndex;
+ uint8_t durationSymbols;
+ uint8_t freqDomainResource[6];
+ uint8_t cceRegMappingType;
+ uint8_t regBundleSize;
+ uint8_t interleaverSize;
+ uint8_t coreSetType;
+ uint16_t shiftIndex;
+ uint8_t precoderGranularity;
+ uint8_t cceIndex;
+ uint8_t aggregationLevel;
+} CoresetCfg;
+
+typedef struct txPowerPdcchInfo
+{
+ uint8_t powerValue;
+ uint8_t powerControlOffsetSS;
+} TxPowerPdcchInfo;
+
+typedef struct dlDCI
+{
+ uint16_t rnti;
+ uint16_t scramblingId;
+ uint16_t scramblingRnti;
+ uint8_t cceIndex;
+ uint8_t aggregLevel;
+ BeamformingInfo beamPdcchInfo;
+ TxPowerPdcchInfo txPdcchPower;
+ PdschCfg *pdschCfg;
+} DlDCI;
+
+typedef struct pdcchCfg
+{
+ BwpCfg pdcchBwpCfg;
+ /* coreset-0 configuration */
+ CoresetCfg coreset0Cfg;
+
+ uint16_t numDlDci;
+ DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
+} PdcchCfg;
+/* end of SIB1 PDCCH structures */
+
typedef struct
{
/* parameters recieved from DU-APP */
/* parameters derived in scheduler */
uint8_t n0;
- Sib1PdcchCfg sib1PdcchCfg;
- Sib1PdschCfg sib1PdschCfg;
+ PdcchCfg sib1PdcchCfg;
+ PdschCfg sib1PdschCfg;
}SchSib1Cfg;
typedef struct schRachCfg
{
uint8_t prachCfgIdx; /* PRACH config idx */
uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
- uint8_t prachSeqLen; /* Support for PRACH long/short format */
uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
- uint8_t maxPrachOcassionsInSlot; /* Number of PRACH ocassions per slot */
- uint8_t numPrachFdOccasions; /*Number of PRACH ocassions in freq domain */
uint16_t rootSeqIdx; /* Root sequence index */
uint8_t numRootSeq; /* Number of root sequences required for FD */
uint16_t k1; /* Frequency Offset for each FD */
typedef struct sib1AllocInfo
{
- Sib1PdcchCfg sib1PdcchCfg;
- Sib1PdschCfg sib1PdschCfg;
+ PdcchCfg sib1PdcchCfg;
+ PdschCfg sib1PdschCfg;
} Sib1AllocInfo;
+typedef struct prachSchInfo
+{
+ uint8_t numPrachOcas; /* Num Prach Ocassions */
+ uint8_t prachFormat; /* PRACH Format */
+ uint8_t numRa; /* Freq domain ocassion */
+ uint8_t prachStartSymb; /* Freq domain ocassion */
+}PrachSchInfo;
+
/* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
typedef struct dlBrdcstAlloc
{
- uint16_t cellId; /* Cell Id */
- SlotIndInfo slotIndInfo; /* Slot Info: sfn, slot number */
/* Ssb transmission is determined as follows:
* 0 : No tranamission
* 1 : SSB Transmission
Sib1AllocInfo sib1Alloc;
}DlBrdcstAlloc;
-/* function pointers */
+typedef struct rarInfo
+{
+ uint16_t raRnti;
+ uint8_t RAPID;
+ uint16_t ta;
+ uint16_t msg3StartRb;
+ uint8_t msg3NumRb;
+ uint16_t tcrnti;
+ uint8_t rarPdu[8];
+ uint8_t rarPduLen;
+}RarInfo;
+
+typedef struct rarAlloc
+{
+ RarInfo rarInfo;
+ PdcchCfg rarPdcchCfg;
+ PdschCfg rarPdschCfg;
+}RarAlloc;
-typedef int (*SchMacDlBrdcstAllocFunc) ARGS((
- Pst *pst, /* Post Structure */
- DlBrdcstAlloc *dlBrdcstAlloc /* slot ind Info */
-));
+typedef struct dlAlloc
+{
+ uint16_t cellId; /* Cell Id */
+ SlotIndInfo slotIndInfo; /* Slot Info: sfn, slot number */
+
+ /* Allocation for broadcast messages */
+ uint8_t isBroadcastPres;
+ DlBrdcstAlloc brdcstAlloc;
+
+ /* Allocation for RAR message */
+ uint8_t isRarPres;
+ RarAlloc rarAlloc;
+}DlAlloc;
+typedef struct ulSchInfo
+{
+ uint16_t cellId; /* Cell Id */
+ SlotIndInfo slotIndInfo; /* Slot Info: sfn, slot number */
+ uint8_t dataType; /* Type of info being scheduled */
+ PrachSchInfo prachSchInfo; /* Prach scheduling info */
+}UlSchInfo;
+
+typedef struct rachIndInfo
+{
+ uint16_t cellId;
+ uint16_t crnti;
+ SlotIndInfo timingInfo;
+ uint8_t slotIdx;
+ uint8_t symbolIdx;
+ uint8_t freqIdx;
+ uint8_t preambleIdx;
+ uint16_t timingAdv;
+}RachIndInfo;
+
+/* function pointers */
typedef int (*SchCellCfgCfmFunc) ARGS((
Pst *pst, /* Post Structure */
Pst *pst, /* Post Structure */
SchCellCfg *schCellCfg /* Cell Cfg */
));
+
+typedef int (*SchMacDlAllocFunc) ARGS((
+ Pst *pst, /* Post Structure */
+ DlAlloc *dlAlloc /* dl allocation Info */
+));
+
+typedef int (*SchMacUlSchInfoFunc) ARGS((
+ Pst *pst, /* Post Structure */
+ UlSchInfo *ulSchInfo /* UL Sch Info */
+));
+
/* function declarations */
int packMacSchSlotInd(Pst *pst, SlotIndInfo *slotInd);
-int packSchMacDlBrdcstAlloc(Pst *pst, DlBrdcstAlloc *dlBrdcstAlloc);
+int packSchMacDlAlloc(Pst *pst, DlAlloc *dlAlloc);
+int packSchMacUlSchInfo(Pst *pst, UlSchInfo *ulSchInfo);
EXTERN int packSchCellCfg(Pst *pst, SchCellCfg *schCellCfg);
EXTERN int packSchCellCfgCfm(Pst *pst, SchCellCfgCfm *schCellCfgCfm);
-EXTERN int MacProcDlBrdcstAlloc(Pst *pst, DlBrdcstAlloc *dlBrdcstAlloc);
+EXTERN int MacProcDlAlloc(Pst *pst, DlAlloc *dlAlloc);
EXTERN int MacProcSchCellCfg(Pst *pst, SchCellCfg *schCellCfg);
EXTERN int MacProcSchCellCfgCfm(Pst *pst, SchCellCfgCfm *schCellCfgCfm);
EXTERN int SchHdlCellCfgReq(Pst *pst, SchCellCfg *schCellCfg);
EXTERN int schActvInit(Ent entity, Inst instId, Region region, Reason reason);
EXTERN S16 SchSendCfgCfm(Pst *pst, RgMngmt *cfm);
+EXTERN int MacProcUlSchInfo(Pst *pst, UlSchInfo *ulSchInfo);
+typedef int (*MacSchRachIndFunc)(Pst *pst, RachIndInfo *rachInd);
+int packMacSchRachInd(Pst *pst, RachIndInfo *rachInd);
+int macSchRachInd(Pst *pst, RachIndInfo *rachInd);
/**********************************************************************
End of file
Code Review / o-du / l2.git / blobdiff