#define DEFAULT_K2_VALUE_FOR_SCS60 2
#define DEFAULT_K2_VALUE_FOR_SCS120 3
+#define MAX_PLMN 2
+#define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
+
#define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
{ \
if ((crntTime.slot + incr) > (numOfSlot - 1)) \
typedef struct resAllocType1 FreqDomainRsrc;
-typedef struct
-{
- uint32_t ssbPbchPwr; /* SSB block power */
- uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
- uint8_t ssbOffsetPointA; /* SSB sub carrier offset from point A */
- SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
- uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
- uint32_t nSSBMask[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
-
- /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
- *value 1 => corresponding SS/PBCH block is transmitted*/
- uint8_t totNumSsb; /*S = Total Number of Actual SSB transmitted*/
-}SchSsbCfg;
-
/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */
typedef struct bwpCfg
{
uint8_t aggregLevel;
BeamformingInfo beamPdcchInfo;
TxPowerPdcchInfo txPdcchPower;
- PdschCfg *pdschCfg;
+ PdschCfg pdschCfg;
}DlDCI;
typedef struct pdcchCfg
} PdcchCfg;
/* end of SIB1 PDCCH structures */
-typedef struct pageCfg
+typedef struct schPcchCfg
{
uint8_t numPO; /*Derived from Ns*/
bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
-}PageCfg;
+}SchPcchCfg;
-typedef struct
+typedef struct schPdcchConfigSib1
{
- /* parameters recieved from DU-APP */
- uint16_t sib1PduLen;
- uint16_t sib1RepetitionPeriod;
uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
- uint16_t sib1Mcs;
-
- /* parameters derived in scheduler */
- uint8_t n0;
- BwpCfg bwp;
- PdcchCfg sib1PdcchCfg;
- PageCfg pageCfg; /*Config of Paging*/
-}SchSib1Cfg;
+}SchPdcchConfigSib1;
-typedef struct schRachCfg
+typedef struct schRachCfgGeneric
{
uint8_t prachCfgIdx; /* PRACH config idx */
- uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
- uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
- uint8_t rootSeqLen; /* root sequence length */
- uint16_t rootSeqIdx; /* Root sequence index */
- uint8_t numRootSeq; /* Number of root sequences required for FD */
- uint16_t k1; /* Frequency Offset for each FD */
+ uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
+ uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
+ int16_t preambleRcvdTargetPower;
+ uint8_t preambleTransMax;
+ uint8_t pwrRampingStep;
+ uint8_t raRspWindow; /* RA Response Window */
+}SchRachCfgGeneric;
+
+typedef struct schRachCfg
+{
+ SchRachCfgGeneric prachCfgGeneric;
uint8_t totalNumRaPreamble; /* Total number of RA preambles */
uint8_t ssbPerRach; /* SSB per RACH occassion */
uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
- uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */
uint8_t raContResTmr; /* RA Contention Resoultion Timer */
uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
- uint8_t raRspWindow; /* RA Response Window */
- uint8_t maxMsg3Tx; /* MAximum num of msg3 tx*/
+ uint16_t rootSeqIdx; /* Root sequence index */
+ uint16_t rootSeqLen; /* root sequence length */
+ uint8_t numRootSeq; /* Number of root sequences required for FD */
+ uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
}SchRachCfg;
typedef struct schBwpParams
SchBwpParams bwp;
SchPdcchCfgCmn pdcchCommon;
SchPdschCfgCmn pdschCommon;
- SchK0K1TimingInfoTbl k0K1InfoTbl;
}SchBwpDlCfg;
typedef struct schK2TimingInfo
typedef struct schBwpUlCfg
{
SchBwpParams bwp;
+ SchRachCfg schRachCfg; /* PRACH config */
SchPucchCfgCmn pucchCommon;
SchPuschCfgCmn puschCommon;
- SchK2TimingInfoTbl msg3K2InfoTbl;
- SchK2TimingInfoTbl k2InfoTbl;
}SchBwpUlCfg;
typedef struct schPlmnInfoList
Snssai **snssai; /* List of supporting snssai*/
}SchPlmnInfoList;
-typedef struct schHqCfgParam
-{
- uint8_t maxDlDataHqTx;
- uint8_t maxMsg4HqTx;
- uint8_t maxUlDataHqTx;
-}SchHqCfg;
-
#ifdef NR_DRX
/* The following list of structures is taken from the DRX-Config section of specification 33.331. */
}SchDrxCfg;
#endif
+/*Spec 38.331 'NrNsPmaxList'*/
+typedef struct schNrNsPmaxList
+{
+ long additionalPMax;
+ long additionalSpectrumEmission;
+}SchNrNsPmaxList;
+
+/*Spec 38.331 'FrequencyInfoDL-SIB'*/
+typedef struct schMultiFreqBandListSib
+{
+ long freqBandIndNr;
+ SchNrNsPmaxList nrNsPmaxList[1];
+}SchMultiFreqBandListSib;
+
+/*Spec 38.331 'SCS-SpecificCarrier'*/
+typedef struct schScsSpecificCarrier
+{
+ uint16_t offsetToCarrier;
+ uint8_t subCarrierSpacing;
+ uint16_t carrierBw;
+ uint16_t txDirectCurrentLoc;
+}SchScsSpecificCarrier;
+
+/*Spec 38.331 'FrequencyInfoDL-SIB'*/
+typedef struct schFreqInfoDlSib
+{
+ SchMultiFreqBandListSib mutiFreqBandList[1];
+ uint16_t offsetToPointA;
+ SchScsSpecificCarrier schSpcCarrier[1];
+}SchFreqInfoDlSib;
+
+typedef struct schBcchCfg
+{
+ long modPeriodCoeff;
+}SchBcchCfg;
+
+/*Spec 38.331 'DownlinkConfigCommonSIB'*/
+typedef struct schDlCfgCommon
+{
+ SchFreqInfoDlSib schFreqInfoDlSib;
+ SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
+ SchBcchCfg schBcchCfg;
+ SchPcchCfg schPcchCfg;
+}SchDlCfgCommon;
+
+/*Spec 38.331 'FrequencyInfoUL-SIB'*/
+typedef struct schFreqInfoUlSib
+{
+ SchMultiFreqBandListSib mutiFreqBandList[1];
+ uint16_t absoluteFreqPointA;
+ SchScsSpecificCarrier schSpcCarrier[1];
+ int8_t schPMax;
+ bool frequencyShift7p5khz;
+}SchFreqInfoUlSib;
+
+/*Spec 38.331 'UplinkConfigCommonSIB '*/
+typedef struct schUlCfgCommon
+{
+ SchFreqInfoUlSib schFreqInfoUlSib;
+ SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */
+ uint16_t schTimeAlignTimer;
+}SchUlCfgCommon;
+
+/*Ref: ORAN_WG8.V7.0.0 Sec 11.2.3.2.1*/
typedef struct schCellCfg
{
- uint16_t cellId; /* Cell Id */
- uint16_t phyCellId; /* Physical cell id */
- uint8_t numerology; /* Supported numerology */
- SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
- uint8_t bandwidth; /* Supported B/W */
- uint32_t dlFreq; /* DL Frequency */
- uint32_t ulFreq; /* UL Frequency */
- SchSsbCfg ssbSchCfg; /* SSB config */
- SchSib1Cfg sib1SchCfg; /* SIB1 config */
- SchRachCfg schRachCfg; /* PRACH config */
- SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
- SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */
- SchPlmnInfoList plmnInfoList; /* Consits of PlmnId and Snssai list */
- SchHqCfg schHqCfg;
+ uint16_t cellId; /* Cell Id */
+ uint8_t numOfBeams;
+ uint8_t numLayers;
+ uint8_t numAntPorts;
+ uint16_t phyCellId; /* Physical cell id */
+ SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */
+ SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
+ uint8_t numerology; /* Supported numerology */
+ uint8_t dlBandwidth; /* Supported B/W */
+ uint8_t ulBandwidth; /* Supported B/W */
+ SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/
+ SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/
#ifdef NR_TDD
- TDDCfg tddCfg; /* TDD Cfg */
+ TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */
#endif
+
+ /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
+ *value 1 => corresponding SS/PBCH block is transmitted*/
+ uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
+ SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
+ uint32_t ssbFrequency; /* SB frequency in kHz*/
+ uint8_t dmrsTypeAPos;
+ uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
+ SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/
+ uint32_t ssbPbchPwr; /* SSB block power */
+ uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
+ uint16_t sib1PduLen;
}SchCellCfg;
typedef struct schCellCfgCfm
typedef struct sib1AllocInfo
{
BwpCfg bwp;
- PdcchCfg sib1PdcchCfg;
+ PdcchCfg *sib1PdcchCfg;
}Sib1AllocInfo;
typedef struct prachSchInfo
typedef struct rarInfo
{
- uint16_t raRnti;
uint8_t RAPID;
uint16_t ta;
Msg3UlGrant ulGrant;
typedef struct rarAlloc
{
- DlPduType pduPres;
- uint8_t pdschSlot;
- RarInfo rarInfo;
- BwpCfg bwp;
- PdcchCfg rarPdcchCfg;
- PdschCfg rarPdschCfg;
+ uint16_t raRnti;
+ RarInfo rarInfo;
+ BwpCfg bwp;
+ PdcchCfg *rarPdcchCfg;
+ PdschCfg *rarPdschCfg;
}RarAlloc;
-typedef struct dlMsgInfo
-{
- uint16_t crnti;
- uint8_t ndi;
- uint8_t harqProcNum;
- uint8_t dlAssignIdx;
- uint8_t pucchTpc;
- uint8_t pucchResInd;
- uint8_t harqFeedbackInd;
- uint8_t dciFormatId;
- bool isMsg4Pdu;
- uint16_t dlMsgPduLen;
- uint8_t *dlMsgPdu;
-}DlMsgInfo;
-
typedef struct lcSchInfo
{
uint8_t lcId;
- uint32_t schBytes; /* Number of scheduled bytes */
+ uint32_t schBytes;
}LcSchInfo;
-typedef struct dlMsgSchedInfo
+typedef struct ceSchInfo
+{
+ uint8_t ceLcId;
+ uint8_t *ceContent;
+}CeSchInfo;
+
+typedef struct freqDomainAlloc
+{
+ uint8_t resAllocType; /* Resource allocation type */
+ union
+ {
+ ResAllocType0 type0;
+ ResAllocType1 type1;
+ }resAlloc;
+}FreqDomainAlloc;
+
+typedef struct transportBlock
{
- bool isRetx;
+ uint8_t mcs;
+ bool ndi;
+ uint8_t rv;
+ uint16_t tbSize;
+ uint8_t numCe;
+ CeSchInfo ceSchInfo[MAX_NUM_LC];
uint8_t numLc;
- LcSchInfo lcSchInfo[MAX_NUM_LC]; /* Scheduled LC info */
- BwpCfg bwp;
- PdcchCfg dlMsgPdcchCfg;
- PdschCfg dlMsgPdschCfg;
- DlPduType pduPres;
- uint8_t pdschSlot;
- DlMsgInfo dlMsgInfo;
-}DlMsgSchInfo;
+ LcSchInfo lcSchInfo[MAX_NUM_LC];
+}TransportBlock;
-typedef struct dlMsgAlloc
+typedef struct dlMsgSchedInfo
{
- uint16_t crnti;
- uint8_t numSchedInfo;
- DlMsgSchInfo dlMsgSchedInfo[2];
-}DlMsgAlloc;
+ uint16_t crnti;
+ uint8_t dciFormatId;
+ uint8_t harqProcNum;
+ bool vrbPrbMapping;
+ uint8_t dlAssignIdx;
+ uint8_t pucchTpc;
+ uint8_t pucchResInd;
+ uint8_t harqFeedbackInd;
+ uint16_t dlMsgPduLen;
+ uint8_t *dlMsgPdu;
+ FreqDomainAlloc freqAlloc;
+ TimeDomainAlloc timeAlloc;
+ uint8_t numOfTbs;
+ TransportBlock transportBlock[2];
+ BwpCfg bwp;
+ PdcchCfg *dlMsgPdcchCfg;
+ PdschCfg *dlMsgPdschCfg;
+}DlMsgSchInfo;
typedef struct schSlotValue
{
SlotTimingInfo ulDciTime;
}SchSlotValue;
-typedef struct freqDomainAlloc
-{
- uint8_t resAllocType; /* Resource allocation type */
- union
- {
- ResAllocType0 type0;
- ResAllocType1 type1;
- }resAlloc;
-}FreqDomainAlloc;
/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */
typedef struct format0_0
DciInfo *ulGrant;
/* Allocation from dedicated DL msg */
- DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE];
+ DlMsgSchInfo *dlMsgAlloc[MAX_NUM_UE];
}DlSchedInfo;
+/*Reference: O-RAN.WG8.AAD.v7.0.0, Sec 11.2.3.3.13 Downlink Paging Allocation*/
+typedef struct interleaved_t
+{
+ uint8_t regBundleSize;
+ uint8_t interleaverSize;
+ uint16_t shiftIndex;
+}Interleaved;
+
+typedef struct pageDlDci
+{
+ uint8_t freqDomainResource[6];
+ uint8_t durationSymbols;
+ uint8_t cceRegMappingType;
+ union
+ {
+ Interleaved interleaved;
+ uint8_t nonInterleaved;
+ }cceReg;
+ uint8_t ssStartSymbolIndex;
+ uint8_t cceIndex;
+ uint8_t aggregLevel;
+ uint8_t precoderGranularity;
+ uint8_t coreSetSize;
+}PageDlDci;
+
+typedef struct resAllocType1 PageFreqDomainAlloc;
+
+typedef struct pageTimeDomainAlloc
+{
+ uint8_t mappingType;
+ uint16_t startSymb;
+ uint16_t numSymb;
+}PageTimeDomainAlloc;
+
+typedef struct pageDmrsConfig
+{
+ uint8_t dmrsType;
+ uint8_t dmrsAddPos;
+ uint8_t nrOfDmrsSymbols;
+}PageDmrsConfig;
+
+typedef struct pageTbInfo
+{
+ uint8_t mcs;
+ uint32_t tbSize;
+}PageTbInfo;
+
+typedef struct pageDlSch
+{
+ PageFreqDomainAlloc freqAlloc;
+ PageTimeDomainAlloc timeAlloc;
+ PageDmrsConfig dmrs;
+ uint8_t vrbPrbMapping;
+ PageTbInfo tbInfo;
+ uint8_t tbScaling;
+ uint16_t dlPagePduLen;
+ uint8_t *dlPagePdu;
+}PageDlSch;
+
typedef struct dlPageAlloc
{
uint16_t cellId;
bool shortMsgInd;
uint8_t shortMsg;
BwpCfg bwp;
- PdcchCfg pagePdcchCfg;
- PdschCfg pagePdschCfg;
- uint16_t dlPagePduLen;
- uint8_t *dlPagePdu;
+ PageDlDci pageDlDci;
+ PageDlSch pageDlSch;
}DlPageAlloc;
typedef struct tbInfo
Code Review / o-du / l2.git / blobdiff