/*macros*/
-#define NO_SSB 0
-#define SSB_TRANSMISSION 1
-#define SSB_REPEAT 2
#define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */
#define SCH_SSB_MASK_SIZE 1
-#define NO_SIB1 0
-#define SIB1_TRANSMISSION 1
-#define SIB1_REPITITION 2
-
#define MAX_NUM_PRG 1 /* max value should be later 275 */
#define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
#define MAX_CODEWORDS 1 /* max should be 2 */
#define MAX_NUM_PATH_LOSS_REF_RS 4
#define MAX_NUM_DL_DATA_TO_UL_ACK 15
#define SD_SIZE 3
+#define QPSK_MODULATION 2
#define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
#define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
#define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
#define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */
#define MIN_NUM_K1_IDX 4 /* Min K1 values */
-#define DEFAULT_K0_VALUE 0 /*As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions*/
+#define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */
+#define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */
+/* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */
+#define DEFAULT_K2_VALUE_FOR_SCS15 1
+#define DEFAULT_K2_VALUE_FOR_SCS30 1
+#define DEFAULT_K2_VALUE_FOR_SCS60 2
+#define DEFAULT_K2_VALUE_FOR_SCS120 3
#define ADD_DELTA_TO_TIME(crntTime, toFill, incr) \
{ \
} \
}
+typedef enum
+{
+ NO_TRANSMISSION,
+ NEW_TRANSMISSION,
+ REPEATITION
+}PduTxOccsaion;
+
typedef enum
{
UNSPECIFIED_CAUSE,
SCH_MCS_TABLE_QAM_64_LOW_SE
}SchMcsTable;
+typedef enum
+{
+ PDCCH_PDU,
+ PDSCH_PDU,
+ BOTH
+}DlPduType;
+
/*structures*/
typedef struct timeDomainAlloc
{
SchK0K1TimingInfoTbl k0K1InfoTbl;
}SchBwpDlCfg;
+typedef struct schK2TimingInfo
+{
+ uint8_t numK2;
+ uint8_t k2Indexes[MAX_NUM_K2_IDX];
+}SchK2TimingInfo;
+
+typedef struct schK2TimingInfoTbl
+{
+ uint16_t tblSize;
+ SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS];
+}SchK2TimingInfoTbl;
+
typedef struct schBwpUlCfg
{
SchBwpParams bwp;
SchPucchCfgCmn pucchCommon;
SchPuschCfgCmn puschCommon;
+ SchK2TimingInfoTbl msg3K2InfoTbl;
+ SchK2TimingInfoTbl k2InfoTbl;
}SchBwpUlCfg;
typedef struct schCellCfg
Sib1AllocInfo sib1Alloc;
}DlBrdcstAlloc;
+typedef struct msg3UlGrant
+{
+ uint8_t freqHopFlag;
+ uint16_t bwpSize;
+ FreqDomainAlloc msg3FreqAlloc;
+ uint8_t k2Index;
+ uint8_t mcs;
+ uint8_t tpc;
+ uint8_t csiReq;
+}Msg3UlGrant;
+
typedef struct rarInfo
{
uint16_t raRnti;
uint8_t RAPID;
uint16_t ta;
- FreqDomainAlloc msg3FreqAlloc;
+ Msg3UlGrant ulGrant;
uint16_t tcrnti;
uint8_t rarPdu[RAR_PAYLOAD_SIZE];
uint8_t rarPduLen;
typedef struct rarAlloc
{
+ DlPduType pduPres;
+ uint8_t pdschSlot;
RarInfo rarInfo;
BwpCfg bwp;
PdcchCfg rarPdcchCfg;
SchPucchCfg pucchCfg;
bool puschCfgPres;
SchPuschCfg puschCfg;
+ SchK2TimingInfoTbl k2InfoTbl;
}SchInitialUlBwp;
/* Uplink BWP information */