<JIRA ID: ODUHIGH-386 : UL scheduling as per RRM policy

[o-du/l2.git] / src / cm / mac_sch_interface.h

diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h
index 1905d65..72f172c 100644 (file)
--- a/src/cm/mac_sch_interface.h
+++ b/src/cm/mac_sch_interface.h
@@ -35,6 +35,7 @@
 #define EVENT_UE_DELETE_RSP_TO_MAC   16
 #define EVENT_CELL_DELETE_REQ_TO_SCH   17
 #define EVENT_CELL_DELETE_RSP_TO_MAC   18
+#define EVENT_LONG_BSR              19
 
 
 /*macros*/
@@ -87,6 +88,7 @@
 
 #define RAR_PAYLOAD_SIZE 10             /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
 #define TX_PAYLOAD_HDR_LEN 32           /* Intel L1 requires adding a 32 byte header to transmitted payload */
+#define UL_TX_BUFFER_SIZE 5
 
 #define MAX_NUM_CONFIG_SLOTS 160  /*Max number of slots as per the numerology*/
 #define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
@@ -861,9 +863,8 @@ typedef struct lcSchInfo
    uint32_t  schBytes; /* Number of scheduled bytes */
 }LcSchInfo;
 
-typedef struct dlMsgAlloc
+typedef struct dlMsgSchedInfo
 {
-   uint16_t   crnti;
    uint8_t    numLc;
    LcSchInfo  lcSchInfo[MAX_NUM_LC]; /* Scheduled LC info */
    BwpCfg     bwp;
@@ -872,6 +873,13 @@ typedef struct dlMsgAlloc
    DlPduType  pduPres;
    uint8_t    pdschSlot;
    DlMsgInfo  dlMsgInfo;
+}DlMsgSchInfo;
+
+typedef struct dlMsgAlloc
+{
+   uint16_t     crnti;
+   uint8_t      numSchedInfo;
+   DlMsgSchInfo dlMsgSchedInfo[2];
 }DlMsgAlloc;
 
 typedef struct schSlotValue
@@ -946,17 +954,13 @@ typedef struct dlSchedInfo
    DlBrdcstAlloc brdcstAlloc;
 
    /* Allocation for RAR message */
-   //uint8_t isRarPres;
-   RarAlloc *rarAlloc;
-
-   /* Allocation from MSG4 */
-   //Msg4Alloc *msg4Alloc;
+   RarAlloc *rarAlloc[MAX_NUM_UE];
 
    /* UL grant in response to BSR */
    DciInfo    *ulGrant;
 
    /* Allocation from dedicated DL msg */
-   DlMsgAlloc *dlMsgAlloc;
+   DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE];
 
 }DlSchedInfo;
 
@@ -1209,6 +1213,7 @@ typedef struct schInitalDlBwp
    SchPdcchConfig   pdcchCfg;
    bool             pdschCfgPres;
    SchPdschConfig   pdschCfg;
+   bool             k0K1TblPrsnt;
    SchK0K1TimingInfoTbl k0K1InfoTbl;
 }SchInitalDlBwp;
 
@@ -1421,6 +1426,7 @@ typedef struct schInitialUlBwp
    SchPucchCfg   pucchCfg;
    bool          puschCfgPres;
    SchPuschCfg   puschCfg;
+   bool          k2TblPrsnt;
    SchK2TimingInfoTbl k2InfoTbl;
 }SchInitialUlBwp;