#define DEFAULT_K2_VALUE_FOR_SCS60 2
#define DEFAULT_K2_VALUE_FOR_SCS120 3
+#define MAX_PLMN 2
+
#define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
{ \
if ((crntTime.slot + incr) > (numOfSlot - 1)) \
uint16_t numPrb;
}ResAllocType1;
-typedef struct
-{
- uint32_t ssbPbchPwr; /* SSB block power */
- uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
- uint8_t ssbOffsetPointA; /* SSB sub carrier offset from point A */
- SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
- uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
- uint32_t nSSBMask[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
-
- /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
- *value 1 => corresponding SS/PBCH block is transmitted*/
- uint8_t totNumSsb; /*S = Total Number of Actual SSB transmitted*/
-}SchSsbCfg;
+typedef struct resAllocType1 FreqDomainRsrc;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */
typedef struct bwpCfg
{
uint8_t subcarrierSpacing;
uint8_t cyclicPrefix;
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
}BwpCfg;
typedef struct prg
{
uint8_t resourceAllocType;
/* since we are using type-1, rbBitmap excluded */
- ResAllocType1 freqAlloc;
+ uint8_t rbBitmap[36];
+ uint16_t startPrb;
+ uint16_t numPrb;
uint8_t vrbPrbMapping;
-} PdschFreqAlloc;
+}PdschFreqAlloc;
typedef struct pdschTimeAlloc
{
- uint8_t rowIndex;
- TimeDomainAlloc timeAlloc;
+ uint8_t rowIndex;
+ uint16_t startSymb;
+ uint16_t numSymb;
} PdschTimeAlloc;
typedef struct txPowerPdschInfo
uint8_t powerControlOffsetSS;
} TxPowerPdschInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
typedef struct pdschCfg
{
uint16_t pduBitmap;
/* SIB1 interface structure */
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
typedef struct coresetCfg
{
uint8_t coreSetSize;
uint8_t cceRegMappingType;
uint8_t regBundleSize;
uint8_t interleaverSize;
- uint8_t coreSetType;
uint16_t shiftIndex;
+ uint8_t coreSetType;
+ uint8_t coresetPoolIndex;
uint8_t precoderGranularity;
uint8_t cceIndex;
uint8_t aggregationLevel;
typedef struct txPowerPdcchInfo
{
- uint8_t powerValue;
+ uint8_t beta_pdcch_1_0;
uint8_t powerControlOffsetSS;
-} TxPowerPdcchInfo;
+}TxPowerPdcchInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
typedef struct dlDCI
{
uint16_t rnti;
BeamformingInfo beamPdcchInfo;
TxPowerPdcchInfo txPdcchPower;
PdschCfg *pdschCfg;
-} DlDCI;
+}DlDCI;
typedef struct pdcchCfg
{
/* coreset-0 configuration */
CoresetCfg coresetCfg;
-
- uint16_t numDlDci;
- DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
+ uint16_t numDlDci;
+ DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
} PdcchCfg;
/* end of SIB1 PDCCH structures */
-typedef struct pageCfg
+typedef struct schPcchCfg
{
uint8_t numPO; /*Derived from Ns*/
bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
-}PageCfg;
+}SchPcchCfg;
-typedef struct
+typedef struct schPdcchConfigSib1
{
- /* parameters recieved from DU-APP */
- uint16_t sib1PduLen;
- uint16_t sib1RepetitionPeriod;
uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
- uint16_t sib1Mcs;
+}SchPdcchConfigSib1;
- /* parameters derived in scheduler */
- uint8_t n0;
- BwpCfg bwp;
- PdcchCfg sib1PdcchCfg;
- PdschCfg sib1PdschCfg;
- PageCfg pageCfg; /*Config of Paging*/
-}SchSib1Cfg;
-
-typedef struct schRachCfg
+typedef struct schRachCfgGeneric
{
uint8_t prachCfgIdx; /* PRACH config idx */
- uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
- uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
- uint8_t rootSeqLen; /* root sequence length */
- uint16_t rootSeqIdx; /* Root sequence index */
- uint8_t numRootSeq; /* Number of root sequences required for FD */
- uint16_t k1; /* Frequency Offset for each FD */
+ uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
+ uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
+ int16_t preambleRcvdTargetPower;
+ uint8_t preambleTransMax;
+ uint8_t pwrRampingStep;
+ uint8_t raRspWindow; /* RA Response Window */
+}SchRachCfgGeneric;
+
+typedef struct schRachCfg
+{
+ SchRachCfgGeneric prachCfgGeneric;
uint8_t totalNumRaPreamble; /* Total number of RA preambles */
uint8_t ssbPerRach; /* SSB per RACH occassion */
uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
- uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */
uint8_t raContResTmr; /* RA Contention Resoultion Timer */
uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
- uint8_t raRspWindow; /* RA Response Window */
- uint8_t maxMsg3Tx; /* MAximum num of msg3 tx*/
+ uint16_t rootSeqIdx; /* Root sequence index */
+ uint16_t rootSeqLen; /* root sequence length */
+ uint8_t numRootSeq; /* Number of root sequences required for FD */
+ uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
}SchRachCfg;
typedef struct schBwpParams
{
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
uint8_t scs;
uint8_t cyclicPrefix;
}SchBwpParams;
SchBwpParams bwp;
SchPdcchCfgCmn pdcchCommon;
SchPdschCfgCmn pdschCommon;
- SchK0K1TimingInfoTbl k0K1InfoTbl;
}SchBwpDlCfg;
typedef struct schK2TimingInfo
typedef struct schBwpUlCfg
{
SchBwpParams bwp;
+ SchRachCfg schRachCfg; /* PRACH config */
SchPucchCfgCmn pucchCommon;
SchPuschCfgCmn puschCommon;
- SchK2TimingInfoTbl msg3K2InfoTbl;
- SchK2TimingInfoTbl k2InfoTbl;
}SchBwpUlCfg;
typedef struct schPlmnInfoList
Snssai **snssai; /* List of supporting snssai*/
}SchPlmnInfoList;
-typedef struct schHqCfgParam
-{
- uint8_t maxDlDataHqTx;
- uint8_t maxMsg4HqTx;
- uint8_t maxUlDataHqTx;
-}SchHqCfg;
-
#ifdef NR_DRX
/* The following list of structures is taken from the DRX-Config section of specification 33.331. */
}SchDrxCfg;
#endif
+/*Spec 38.331 'NrNsPmaxList'*/
+typedef struct schNrNsPmaxList
+{
+ long additionalPMax;
+ long additionalSpectrumEmission;
+}SchNrNsPmaxList;
+
+/*Spec 38.331 'FrequencyInfoDL-SIB'*/
+typedef struct schMultiFreqBandListSib
+{
+ long freqBandIndNr;
+ SchNrNsPmaxList nrNsPmaxList[1];
+}SchMultiFreqBandListSib;
+
+/*Spec 38.331 'SCS-SpecificCarrier'*/
+typedef struct schScsSpecificCarrier
+{
+ uint16_t offsetToCarrier;
+ uint8_t subCarrierSpacing;
+ uint16_t carrierBw;
+ uint16_t txDirectCurrentLoc;
+}SchScsSpecificCarrier;
+
+/*Spec 38.331 'FrequencyInfoDL-SIB'*/
+typedef struct schFreqInfoDlSib
+{
+ SchMultiFreqBandListSib mutiFreqBandList[1];
+ uint16_t offsetToPointA;
+ SchScsSpecificCarrier schSpcCarrier[1];
+}SchFreqInfoDlSib;
+
+typedef struct schBcchCfg
+{
+ long modPeriodCoeff;
+}SchBcchCfg;
+
+/*Spec 38.331 'DownlinkConfigCommonSIB'*/
+typedef struct schDlCfgCommon
+{
+ SchFreqInfoDlSib schFreqInfoDlSib;
+ SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
+ SchBcchCfg schBcchCfg;
+ SchPcchCfg schPcchCfg;
+}SchDlCfgCommon;
+
+/*Spec 38.331 'FrequencyInfoUL-SIB'*/
+typedef struct schFreqInfoUlSib
+{
+ SchMultiFreqBandListSib mutiFreqBandList[1];
+ uint16_t absoluteFreqPointA;
+ SchScsSpecificCarrier schSpcCarrier[1];
+ int8_t schPMax;
+ bool frequencyShift7p5khz;
+}SchFreqInfoUlSib;
+
+/*Spec 38.331 'UplinkConfigCommonSIB '*/
+typedef struct schUlCfgCommon
+{
+ SchFreqInfoUlSib schFreqInfoUlSib;
+ SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */
+ uint16_t schTimeAlignTimer;
+}SchUlCfgCommon;
+
+/*Ref: ORAN_WG8.V7.0.0 Sec 11.2.3.2.1*/
typedef struct schCellCfg
{
- uint16_t cellId; /* Cell Id */
- uint16_t phyCellId; /* Physical cell id */
- uint8_t numerology; /* Supported numerology */
- SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
- uint8_t bandwidth; /* Supported B/W */
- uint32_t dlFreq; /* DL Frequency */
- uint32_t ulFreq; /* UL Frequency */
- SchSsbCfg ssbSchCfg; /* SSB config */
- SchSib1Cfg sib1SchCfg; /* SIB1 config */
- SchRachCfg schRachCfg; /* PRACH config */
- SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
- SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */
- SchPlmnInfoList plmnInfoList; /* Consits of PlmnId and Snssai list */
- SchHqCfg schHqCfg;
+ uint16_t cellId; /* Cell Id */
+ uint8_t numOfBeams;
+ uint8_t numLayers;
+ uint8_t numAntPorts;
+ uint16_t phyCellId; /* Physical cell id */
+ SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */
+ SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
+ uint8_t numerology; /* Supported numerology */
+ uint8_t dlBandwidth; /* Supported B/W */
+ uint8_t ulBandwidth; /* Supported B/W */
+ SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/
+ SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/
#ifdef NR_TDD
- TDDCfg tddCfg; /* TDD Cfg */
+ TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */
#endif
+
+ /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
+ *value 1 => corresponding SS/PBCH block is transmitted*/
+ uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
+ SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
+ uint32_t ssbFrequency; /* SB frequency in kHz*/
+ uint8_t dmrsTypeAPos;
+ uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
+ SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/
+ uint32_t ssbPbchPwr; /* SSB block power */
+ uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
+ uint16_t sib1PduLen;
}SchCellCfg;
typedef struct schCellCfgCfm
typedef struct ssbInfo
{
uint8_t ssbIdx; /* SSB Index */
- TimeDomainAlloc tdAlloc; /* Time domain allocation */
- ResAllocType1 fdAlloc; /* Freq domain allocation */
+ TimeDomainAlloc tdAlloc; /* Time domain allocation */
+ FreqDomainRsrc fdAlloc; /* Freq domain allocation */
}SsbInfo;
typedef struct sib1AllocInfo
{
BwpCfg bwp;
PdcchCfg sib1PdcchCfg;
- PdschCfg sib1PdschCfg;
-} Sib1AllocInfo;
+}Sib1AllocInfo;
typedef struct prachSchInfo
{
/* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
typedef struct dlBrdcstAlloc
{
+ uint16_t crnti; /* SI-RNTI */
/* Ssb transmission is determined as follows:
* 0 : No tranamission
* 1 : SSB Transmission
* 2 : SSB Repetition */
- uint8_t ssbTrans;
+ uint8_t ssbTransmissionMode;
uint8_t ssbIdxSupported;
SsbInfo ssbInfo[MAX_SSB_IDX];
+ bool systemInfoIndicator;
+ uint8_t *siContent;
/* Sib1 transmission is determined as follows:
* 0 : No tranamission
* 1 : SIB1 Transmission
* 2 : SIB1 Repetition */
- uint8_t sib1Trans;
+ uint8_t sib1TransmissionMode;
Sib1AllocInfo sib1Alloc;
}DlBrdcstAlloc;
{
uint8_t freqHopFlag;
uint16_t bwpSize;
- ResAllocType1 msg3FreqAlloc;
+ FreqDomainRsrc msg3FreqAlloc;
uint8_t k2Index;
uint8_t mcs;
uint8_t tpc;
SlotTimingInfo ulDciTime;
}SchSlotValue;
+typedef struct freqDomainAlloc
+{
+ uint8_t resAllocType; /* Resource allocation type */
+ union
+ {
+ ResAllocType0 type0;
+ ResAllocType1 type1;
+ }resAlloc;
+}FreqDomainAlloc;
+
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */
typedef struct format0_0
{
uint8_t resourceAllocType;
- /* since we are using type-1, hence rbBitmap excluded */
- ResAllocType1 freqAlloc;
+ FreqDomainAlloc freqAlloc;
TimeDomainAlloc timeAlloc;
uint16_t rowIndex;
uint8_t mcs;
- uint8_t harqProcId; /* HARQ Process ID */
- bool puschHopFlag;
+ uint8_t harqProcId;
bool freqHopFlag;
- uint8_t ndi; /* NDI */
- uint8_t rv; /* Redundancy Version */
+ uint8_t ndi;
+ uint8_t rvIndex;
uint8_t tpcCmd;
- bool sUlCfgd;
+ bool sulIndicator;
}Format0_0;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-40 DCI Format 0_1 Configuration */
typedef struct format0_1
{
-/* TBD */
-
+ uint8_t carrierIndicator;
+ bool sulIndicator;
+ uint8_t bwpIndicator;
+ uint8_t resourceAlloc;
+ FreqDomainRsrc freqAlloc;
+ TimeDomainAlloc timeAlloc;
+ uint16_t rowIndex;
+ uint8_t mcs;
+ uint8_t harqProcId;
+ bool freqHopFlag;
+ uint8_t ndi;
+ uint8_t rvIndex;
+ uint8_t firstDownlinkAssignmentIndex;
+ uint8_t secondDownlinkAssignmentIndex;
+ uint8_t tpcCommand;
+ uint8_t srsResourceSetIndicator;
+ uint8_t srsResourceIndicator;
+ uint8_t tpmi;
+ uint8_t antennaPorts;
+ uint8_t srsRequest;
+ uint8_t csiRequest;
+ uint8_t cbgTransmissionInfo;
+ uint8_t ptrsDmrs;
+ uint8_t betaOffsetIndicator;
+ bool dmrsSequenceInitialization;
+ bool ulschIndicatior;
}Format0_1;
-typedef struct format1_0
+typedef struct dciFormat
{
-/* TBD */
-
-}Format1_0;
-
-typedef struct format1_1
-{
-/* TBD */
-}Format1_1;
-
-typedef struct dciInfo
-{
- uint16_t cellId;
- uint16_t crnti; /* CRNI */
- SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
- BwpCfg bwpCfg; /* BWP Cfg */
- CoresetCfg coresetCfg; /* Coreset1 Cfg */
- FormatType formatType; /* DCI Format */
+ FormatType formatType; /* DCI Format */
union
{
Format0_0 format0_0; /* Format 0_0 */
Format0_1 format0_1; /* Format 0_1 */
- Format1_0 format1_0; /* Format 1_0 */
- Format1_1 format1_1; /* Format 1_1 */
}format;
- DlDCI dciInfo;
+}DciFormat;
+
+typedef struct dciInfo
+{
+ uint16_t crnti; /* CRNTI */
+ BwpCfg bwpCfg; /* BWP Cfg */
+ CoresetCfg coresetCfg; /* Coreset1 Cfg */
+ DciFormat dciFormatInfo; /* Dci Format */
+ DlDCI dciInfo; /* DlDCI */
}DciInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
typedef struct dlSchedInfo
{
- uint16_t cellId; /* Cell Id */
+ uint16_t cellId; /* Cell Id */
SchSlotValue schSlotValue;
/* Allocation for broadcast messages */
SchMcsTable mcsTable; /* MCS Table */
}TbInfo;
-typedef struct freqDomainAlloc
-{
- uint8_t resAllocType; /* Resource allocation type */
- union
- {
- ResAllocType0 type0;
- ResAllocType1 type1;
- }resAlloc;
-}FreqDomainAlloc;
-
typedef struct schPuschInfo
{
uint8_t harqProcId; /* HARQ Process ID */
Code Review / o-du / l2.git / blobdiff