#define NUM_SSB 1 /* max value is 64 */
#define SSB_MASK_SIZE 1 /* SSB mask size is 32bit for sub6 */
-#define SIB1_NEW_TX_PERIOD 160
#define SIB1_REPETITION_PERIOD 20
#define CORESET_0_INDEX 0
#define CORESET_1_INDEX 1
#define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
#define SD_SIZE 3 /* Max size of Slice Differentiator in S-NSSAI */
-#define MAX_NUM_SRB 8
-#define MAX_NUM_DRB 64
#define MAX_NUM_SCELL 32
/* PUCCH Configuration Macro */
{
uint8_t *sib1Pdu;
uint16_t sib1PduLen;
- uint16_t sib1NewTxPeriod;
uint16_t sib1RepetitionPeriod;
uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
typedef struct ambrCfg
{
uint32_t ulBr; /* UL Bit rate */
- uint32_t dlBr; /* DL Bit rate */
}AmbrCfg;
/* Single Network Slice Selection assistance Info */
uint16_t cellId;
uint8_t ueIdx;
uint16_t crnti;
+ bool macCellGrpCfgPres;
MacCellGrpCfg macCellGrpCfg;
+ bool phyCellGrpCfgPres;
PhyCellGrpCfg phyCellGrpCfg;
+ bool spCellCfgPres;
SpCellCfg spCellCfg;
AmbrCfg *ambrCfg;
ModulationInfo dlModInfo; /* DL modulation info */