Corrected the values of PRACH config indexes, JIRA ID : ODUHIGH-198

[o-du/l2.git] / src / 5gnrsch / sch_rach.c

diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c
index 65d3e40..f4c7a64 100644 (file)
--- a/src/5gnrsch/sch_rach.c
+++ b/src/5gnrsch/sch_rach.c
@@ -31,30 +31,9 @@
 /** @file sch_rach.c
 @brief This file implements the rach handling.
 */
-
-#include "stdbool.h"
-#include "envopt.h"        /* environment options */
-#include "envdep.h"        /* environment dependent */
-#include "envind.h"        /* environment independent */
-#include "gen.h"           /* general layer */
-#include "ssi.h"           /* system service interface */
-#include "cm_tkns.h"       /* Common Token Defines */
-#include "cm_llist.h"      /* Common Link List Defines */
-#include "cm_hash.h"       /* Common Hash List Defines */
-#include "cm_mblk.h"       /* common memory link list library */
-#include "cm_lte.h"        /* Common LTE Defines */
+#include "common_def.h"
 #include "tfu.h"
 #include "lrg.h"
-
-#include "gen.x"           /* general layer typedefs */
-#include "ssi.x"           /* system services typedefs */
-#include "cm5.x"           /* system services */
-#include "cm_tkns.x"       /* Common Token Definitions */
-#include "cm_llist.x"      /* Common Link List Definitions */
-#include "cm_lib.x"        /* Common Library Definitions */
-#include "cm_hash.x"       /* Common Hash List Definitions */
-#include "cm_mblk.x"       /* common memory link list library */
-#include "cm_lte.x"        /* Common LTE Defines */
 #include "tfu.x"
 #include "lrg.x"
 #include "du_log.h"
@@ -62,7 +41,6 @@
 #include "mac_sch_interface.h"
 #include "sch.h"
 #include "sch_utils.h"
-#include "common_def.h"
 
 extern SchCb schCb[SCH_MAX_INST];
 extern uint8_t puschDeltaTable[MAX_MU_PUSCH];
@@ -182,6 +160,9 @@ uint8_t *msg3NumRb)
        schUlSlotInfo->schPuschInfo->tbInfo.ndi        = 1; /* new transmission */
        schUlSlotInfo->schPuschInfo->tbInfo.rv          = 0;
        schUlSlotInfo->schPuschInfo->tbInfo.tbSize     = 24; /*Considering 2 PRBs */
+       schUlSlotInfo->schPuschInfo->dmrsMappingType   = DMRS_MAP_TYPE_A;  /* Setting Type-A */
+       schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols   = NUM_DMRS_SYMBOLS;
+       schUlSlotInfo->schPuschInfo->dmrsAddPos        = DMRS_ADDITIONAL_POS;
 
        *msg3StartRb = startRb;
        *msg3NumRb   = numRb;
@@ -362,6 +343,9 @@ uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t of
    pdsch->dmrs.scid = 0;
    pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
    pdsch->dmrs.dmrsPorts = 0;
+       pdsch->dmrs.mappingType      = DMRS_MAP_TYPE_A;  /* Type-A */
+       pdsch->dmrs.nrOfDmrsSymbols  = NUM_DMRS_SYMBOLS;
+       pdsch->dmrs.dmrsAddPos       = DMRS_ADDITIONAL_POS;
    pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
    pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ 
    pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols);