* @param[in] shed instance
* @return void
**/
-void createSchRaCb(SchRaReq *raReq, Inst schInst)
+void createSchRaCb(uint8_t ueId, SchRaReq *raReq, Inst schInst)
{
- uint8_t ueId = 0;
-
if(raReq->isCFRA)
{
/* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH,
tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL);
tbSize = tbSize / 8 ; /*bits to byte conversion*/
- schUlSlotInfo->schPuschInfo->crnti = crnti;
schUlSlotInfo->schPuschInfo->harqProcId = msg3HqProc->procId;
- schUlSlotInfo->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1;
- schUlSlotInfo->schPuschInfo->fdAlloc.startPrb = startRb;
- schUlSlotInfo->schPuschInfo->fdAlloc.numPrb = numRb;
+ schUlSlotInfo->schPuschInfo->fdAlloc.resAllocType = SCH_ALLOC_TYPE_1;
+ schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.startPrb = startRb;
+ schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.numPrb = numRb;
schUlSlotInfo->schPuschInfo->tdAlloc.startSymb = startSymb;
schUlSlotInfo->schPuschInfo->tdAlloc.numSymb = symbLen;
schUlSlotInfo->schPuschInfo->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */
schUlSlotInfo->schPuschInfo->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */
schUlSlotInfo->schPuschInfo->tbInfo.rv = 0;
schUlSlotInfo->schPuschInfo->tbInfo.tbSize = tbSize;
+#ifdef INTEL_FAPI
schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS;
+#endif
+
if(!isRetx)
{
msg3HqProc->strtSymbl = startSymb;
msg3HqProc->numSymbl = symbLen;
- msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo->resAllocType;
- msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo->fdAlloc.startPrb;
- msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo->fdAlloc.numPrb;
+ msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo->fdAlloc.resAllocType;
+ msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.startPrb;
+ msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.numPrb;
msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo->tbInfo.qamOrder;
msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo->tbInfo.mcs;
msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo->tbInfo.mcsTable;
msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo->tbInfo.ndi;
msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo->tbInfo.rv;
msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo->tbInfo.tbSize;
+#ifdef INTEL_FAPI
msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo->dmrsMappingType;
msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols;
msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo->dmrsAddPos;
+#endif
}
return schUlSlotInfo->schPuschInfo;
}
}
/* Calculating time frame to send DCI for RAR */
- ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
+ ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
dciSlot = dciTime.slot;
#ifdef NR_TDD
/* Consider this slot for sending DCI, only if it is a DL slot */
k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
/* Calculating time frame to send RAR PDSCH */
- ADD_DELTA_TO_TIME(dciTime, rarTime, k0);
+ ADD_DELTA_TO_TIME(dciTime, rarTime, k0, cell->numSlots);
rarSlot = rarTime.slot;
/* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
{
k1Index = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
- if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg.dlDataToUlAck)
+ if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg.dlDataToUlAck)
{
- k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg.dlDataToUlAck->\
+ k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg.dlDataToUlAck->\
dlDataToUlAckList[k1Index];
}
else
k1 = defaultUlAckTbl[k1Index];
}
- ADD_DELTA_TO_TIME(rarTime, pucchTime, k1);
+ ADD_DELTA_TO_TIME(rarTime, pucchTime, k1, cell->numSlots);
#ifdef NR_TDD
if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
k2 = k2 + msg3Delta;
if(k2 >= msg3MinSchTime)
{
- ADD_DELTA_TO_TIME(rarTime, msg3Time, k2);
+ ADD_DELTA_TO_TIME(rarTime, msg3Time, k2, cell->numSlots);
#ifdef NR_TDD
if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb;
/* Spec 38.213, section 8.2, 0 : MSG3 PUSCH will be transmitted without frequency hopping */
dciSlotAlloc->rarInfo.ulGrant.freqHopFlag = 0;
- dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.startPrb;
- dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.numPrb;
+ dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.resAlloc.type1.startPrb;
+ dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.resAlloc.type1.numPrb;
dciSlotAlloc->rarInfo.ulGrant.k2Index = k2Index;
dciSlotAlloc->rarInfo.ulGrant.mcs = msg3PuschInfo->tbInfo.mcs;
dciSlotAlloc->rarInfo.ulGrant.tpc = 3; /* TODO : Check appropriate value to be filled */
cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId;
/* Create raCb at SCH */
- createSchRaCb(cell->raReq[ueId-1], schInst);
+ createSchRaCb(ueId, cell->raReq[ueId-1], schInst);
/* Remove RachInd from pending RA request list */
SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration;
/* Adding window size to window start time to get window end time */
- ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots);
+ ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots, cell->numSlots);
cell->raReq[ueId -1] = raReq;
/* Adding UE Id to list of pending UEs to be scheduled */