#include "sch.h"
#include "sch_utils.h"
-SchRachRsrcRspFunc SchRachRsrcRspOpts[] =
-{
- packSchRachRsrcRsp, /* LC */
- MacProcSchRachRsrcRsp, /* TC */
- packSchRachRsrcRsp /* LWLC */
-};
-
/**
* @brief Checks if PRACH can be scheduled in current slot
*
*
* @details
*
- * Function : MacSchRachRsrcReq
+ * Function : SchProcRachRsrcReq
*
* This function processes RACH resorce request
* from MAC for CFRA. It assigns a dedicated preamble
* @return ROK
* RFAILED
**/
-uint8_t MacSchRachRsrcReq(Pst *pst, SchRachRsrcReq *schRachRsrcReq)
+uint8_t SchProcRachRsrcReq(Pst *pst, SchRachRsrcReq *schRachRsrcReq)
{
uint8_t ssbIdx = 0, cfraSsbIdx = 0;
uint8_t firstCFPreambleIndex = 0, lastCFPreambleIndex = 0;
SCH_FREE(schRachRsrcReq, sizeof(SchRachRsrcReq));
/* Send RACH resource response to MAC */
- return (SchRachRsrcRspOpts[rspPst.selector](&rspPst, rachRsrcRsp));
+ return(MacMessageRouter(&rspPst, (void *)rachRsrcRsp));
}
/**
* @param[in] shed instance
* @return void
**/
-void createSchRaCb(SchRaReq *raReq, Inst schInst)
+void createSchRaCb(uint8_t ueId, SchRaReq *raReq, Inst schInst)
{
- uint8_t ueId = 0;
-
if(raReq->isCFRA)
{
/* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH,
schCb[schInst].cells[schInst]->numActvUe++;
SET_ONE_BIT(raReq->ueCb->ueId, schCb[schInst].cells[schInst]->actvUeBitMap);
raReq->ueCb->state = SCH_UE_STATE_ACTIVE;
+ schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG4_DONE;
}
}
else
GET_UE_ID(raReq->rachInd->crnti, ueId);
schCb[schInst].cells[schInst]->raCb[ueId -1].tcrnti = raReq->rachInd->crnti;
schCb[schInst].cells[schInst]->raCb[ueId -1].msg4recvd = FALSE;
+ schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG3_PENDING;
}
+ schCb[schInst].cells[schInst]->raCb[ueId -1].cell = schCb[schInst].cells[schInst];
}
/**
* @param[out] msg3NumRb
* @return void
**/
-SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, SlotTimingInfo msg3SlotTime)
+SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, SlotTimingInfo msg3SlotTime, SchUlHqProcCb* msg3HqProc, bool isRetx)
{
SchCellCb *cell = NULLP;
SchUlSlotInfo *schUlSlotInfo = NULLP;
tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL);
tbSize = tbSize / 8 ; /*bits to byte conversion*/
- schUlSlotInfo->schPuschInfo->crnti = crnti;
- schUlSlotInfo->schPuschInfo->harqProcId = SCH_HARQ_PROC_ID;
- schUlSlotInfo->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1;
- schUlSlotInfo->schPuschInfo->fdAlloc.startPrb = startRb;
- schUlSlotInfo->schPuschInfo->fdAlloc.numPrb = numRb;
+ schUlSlotInfo->schPuschInfo->harqProcId = msg3HqProc->procId;
+ schUlSlotInfo->schPuschInfo->fdAlloc.resAllocType = SCH_ALLOC_TYPE_1;
+ schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.startPrb = startRb;
+ schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.numPrb = numRb;
schUlSlotInfo->schPuschInfo->tdAlloc.startSymb = startSymb;
schUlSlotInfo->schPuschInfo->tdAlloc.numSymb = symbLen;
schUlSlotInfo->schPuschInfo->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */
schUlSlotInfo->schPuschInfo->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */
schUlSlotInfo->schPuschInfo->tbInfo.rv = 0;
schUlSlotInfo->schPuschInfo->tbInfo.tbSize = tbSize;
+#ifdef INTEL_FAPI
schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS;
-
+#endif
+
+ if(!isRetx)
+ {
+ msg3HqProc->strtSymbl = startSymb;
+ msg3HqProc->numSymbl = symbLen;
+ msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo->fdAlloc.resAllocType;
+ msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.startPrb;
+ msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo->fdAlloc.resAlloc.type1.numPrb;
+ msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo->tbInfo.qamOrder;
+ msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo->tbInfo.mcs;
+ msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo->tbInfo.mcsTable;
+ msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo->tbInfo.ndi;
+ msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo->tbInfo.rv;
+ msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo->tbInfo.tbSize;
+#ifdef INTEL_FAPI
+ msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo->dmrsMappingType;
+ msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols;
+ msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo->dmrsAddPos;
+#endif
+ }
return schUlSlotInfo->schPuschInfo;
}
SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP;
SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
RaRspWindowStatus windowStatus=0;
-
+
#ifdef NR_TDD
totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
#endif
}
/* Calculating time frame to send DCI for RAR */
- ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
+ ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
dciSlot = dciTime.slot;
#ifdef NR_TDD
/* Consider this slot for sending DCI, only if it is a DL slot */
k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
/* Calculating time frame to send RAR PDSCH */
- ADD_DELTA_TO_TIME(dciTime, rarTime, k0);
+ ADD_DELTA_TO_TIME(dciTime, rarTime, k0, cell->numSlots);
rarSlot = rarTime.slot;
/* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
{
k1Index = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
- if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg.dlDataToUlAck)
+ if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg.dlDataToUlAck)
{
- k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg.dlDataToUlAck->\
+ k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg.dlDataToUlAck->\
dlDataToUlAckList[k1Index];
}
else
k1 = defaultUlAckTbl[k1Index];
}
- ADD_DELTA_TO_TIME(rarTime, pucchTime, k1);
+ ADD_DELTA_TO_TIME(rarTime, pucchTime, k1, cell->numSlots);
#ifdef NR_TDD
if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
k2 = k2 + msg3Delta;
if(k2 >= msg3MinSchTime)
{
- ADD_DELTA_TO_TIME(rarTime, msg3Time, k2);
+ ADD_DELTA_TO_TIME(rarTime, msg3Time, k2, cell->numSlots);
#ifdef NR_TDD
if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
if(cell->raReq[ueId-1]->isCFRA)
{
/* Allocate resources for PUCCH */
- schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti);
+ schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti,NULLP, FALSE, NULLP);
}
else
{
/* Allocate resources for msg3 */
- msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time);
+ msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time, &(cell->raCb[ueId-1].msg3HqProc), FALSE);
if(msg3PuschInfo)
{
dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb;
/* Spec 38.213, section 8.2, 0 : MSG3 PUSCH will be transmitted without frequency hopping */
dciSlotAlloc->rarInfo.ulGrant.freqHopFlag = 0;
- dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.startPrb;
- dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.numPrb;
+ dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.resAlloc.type1.startPrb;
+ dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.resAlloc.type1.numPrb;
dciSlotAlloc->rarInfo.ulGrant.k2Index = k2Index;
dciSlotAlloc->rarInfo.ulGrant.mcs = msg3PuschInfo->tbInfo.mcs;
dciSlotAlloc->rarInfo.ulGrant.tpc = 3; /* TODO : Check appropriate value to be filled */
cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId;
/* Create raCb at SCH */
- createSchRaCb(cell->raReq[ueId-1], schInst);
+ createSchRaCb(ueId, cell->raReq[ueId-1], schInst);
/* Remove RachInd from pending RA request list */
SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
*
* @details
*
- * Function : schProcessRachInd
+ * Function : SchProcRachInd
*
* This function process rach indication
*
* @param[in] shed instance
* @return ROK
**/
-uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst)
+uint8_t SchProcRachInd(Pst *pst, RachIndInfo *rachInd)
{
- SchCellCb *cell = schCb[schInst].cells[schInst];
SchRaReq *raReq = NULLP;
- float slotDuration;
- uint8_t winNumSlots;
- uint8_t ueId;
+ float slotDuration;
+ uint8_t winNumSlots;
+ uint8_t ueId;
+ Inst schInst = pst->dstInst-SCH_INST_START;
+ SchCellCb *cell = schCb[schInst].cells[schInst];
+
+ DU_LOG("\nINFO --> SCH : Received Rach indication");
if(cell == NULLP)
{
- DU_LOG("\nERROR --> SCH: Failed to find cell in schProcessRachInd");
+ DU_LOG("\nERROR --> SCH: Failed to find cell in SchProcRachInd");
return RFAILED;
}
SCH_ALLOC(raReq, sizeof(SchRaReq));
if(!raReq)
{
- DU_LOG("\nERROR --> SCH : Memory allocation failure in schProcessRachInd");
+ DU_LOG("\nERROR --> SCH : Memory allocation failure in SchProcRachInd");
SCH_FREE(rachInd, sizeof(RachIndInfo));
return RFAILED;
}
winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration;
/* Adding window size to window start time to get window end time */
- ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots);
+ ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots, cell->numSlots);
cell->raReq[ueId -1] = raReq;
/* Adding UE Id to list of pending UEs to be scheduled */
- addUeToBeScheduled(cell, ueId);
-
+ cell->api->SchRachInd(cell, ueId);
return ROK;
}
*
* @details
*
- * Function : MacSchRachRsrcRel
+ * Function : SchProcRachRsrcRel
*
* This function processes RACH resorce release
* from MAC after CFRA. It releases the dedicated
* @return ROK
* RFAILED
*/
-uint8_t MacSchRachRsrcRel(Pst *pst, SchRachRsrcRel *schRachRsrcRel)
+uint8_t SchProcRachRsrcRel(Pst *pst, SchRachRsrcRel *schRachRsrcRel)
{
uint8_t ret = ROK;
uint8_t ssbIdx = 0, cfraSsbIdx = 0;
SCH_FREE(schRachRsrcRel, sizeof(SchRachRsrcRel));
return ret;
}
-
+ /* @brief process MSG4 completion
+ *
+ * @details
+ *
+ * Function : schMsg4Complete
+ *
+ * This function updates ra state and msg4 Hqrq
+ * proc upon MSG4 completion
+ * @param[in] SchUeCb *ueCb, UE cb pointer
+ * @return VOID
+ */
+void schMsg4Complete(SchUeCb *ueCb)
+{
+ DU_LOG("\nINFO --> SCH: State change for ueId[%2d] to SCH_RA_STATE_MSG4_DONE\n",ueCb->ueId);
+ ueCb->cellCb->raCb[ueCb->ueId-1].raState = SCH_RA_STATE_MSG4_DONE;
+ ueCb->msg4HqProc = ueCb->retxMsg4HqProc = NULLP;
+}
/**********************************************************************
End of file
**********************************************************************/
Code Review / o-du / l2.git / blobdiff