uint8_t ret = RFAILED;
uint16_t startPrb = 0;
uint32_t totDataReq = 0; /* in bytes */
- SchUeCb *ueCb;
- SchPuschInfo *puschInfo;
+ SchUeCb *ueCb = NULLP;
+ SchPuschInfo *puschInfo = NULLP;
DciInfo *dciInfo = NULLP;
cell = (*hqP)->hqEnt->cell;
/* Update PUSCH allocation */
if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb, isRetx, *hqP) == ROK)
{
- if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
+ if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo[ueCb->ueId])
{
- puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
+ puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo[ueCb->ueId];
if(puschInfo != NULLP)
{
/* Fill DCI for UL grant */
schFillUlDci(ueCb, puschInfo, dciInfo, isRetx, *hqP);
ueCb->srRcvd = false;
ueCb->bsrRcvd = false;
- cell->schUlSlotInfo[puschTime.slot]->puschUe = ueCb->ueId;
if(fcfsHqProcCb->lcCb.dedLcList.count != 0)
updateBsrAndLcList(&(fcfsHqProcCb->lcCb.dedLcList), ueCb->bsrInfo, ROK);
updateBsrAndLcList(&(fcfsHqProcCb->lcCb.defLcList), ueCb->bsrInfo, ROK);
else
{
#ifdef NR_DRX
- schHdlDrxInActvStrtTmr(cell, &cell->ueCb[ueId-1], PHY_DELTA_DL + SCHED_DELTA);
+ schHdlDrxInActvStrtTmr(cell, &cell->ueCb[ueId-1], gConfigInfo.gPhyDeltaDl + SCHED_DELTA);
#endif
}
}
}
-
+ }
+#ifdef NR_DRX
+ if((cell->ueCb[ueId-1].ueDrxInfoPres == true) && (cell->ueCb[ueId-1].drxUeCb.drxUlUeActiveStatus != true))
+ {
+ if(pendingUeNode->node)
+ {
+ cmLListAdd2Tail(&fcfsCell->ueToBeScheduled, cmLListDelFrm(&fcfsCell->ueToBeScheduled, pendingUeNode));
+ }
+ }
+ else
+#endif
+ {
/* Scheduling of UL grant */
node = NULLP;
if(fcfsUeCb)
else
{
#ifdef NR_DRX
- schHdlDrxInActvStrtTmr(cell, &cell->ueCb[ueId-1], PHY_DELTA_UL + SCHED_DELTA);
+ schHdlDrxInActvStrtTmr(cell, &cell->ueCb[ueId-1], gConfigInfo.gPhyDeltaUl + SCHED_DELTA);
#endif
}
}