SchCellCb *cell = schCb[inst].cells[inst];
SchPucchCfgCmn *pucchCfg = NULLP;
SchBwpParams *ulBwp = NULLP;
+#ifdef NR_DRX
+ SchUeCb *ueCb = NULLP;
+#endif
uint16_t startPrb;
GET_UE_ID(schPucchInfo->rnti, ueId);
ueIdx = ueId -1;
+#ifdef NR_DRX
+ ueCb = schGetUeCb(cell, schPucchInfo->rnti);
+ if(ueCb->ueDrxInfoPres)
+ {
+ if(!ueCb->drxUeCb.drxUlUeActiveStatus)
+ return RFAILED;
+ }
+#endif
if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
{
/* fill pucch dedicated cfg */
uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
{
int ret = ROK;
+#ifdef NR_DRX
+ SchUeCb *ueCb;
+#endif
UlSchedInfo ulSchedInfo;
SchUlSlotInfo *schUlSlotInfo = NULLP;
SlotTimingInfo ulTimingInfo;
if(schUlSlotInfo->schPuschInfo)
{
ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
+ /* Check the ue drx status if the UE is active for uplink scheduling or not */
+#ifdef NR_DRX
+ ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
+ if(ueCb->ueDrxInfoPres)
+ {
+ if(!ueCb->drxUeCb.drxUlUeActiveStatus)
+ return RFAILED;
+ }
+#endif
ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
sizeof(SchPuschInfo));
memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
sizeof(SchPucchInfo));
}
+ else
+ {
+ return RFAILED;
+ }
memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
}
continue;
}
k2Found = true;
+ if(hqP)
+ {
+ ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
+ }
break;
}
}
if(k2Found == true)
{
ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq, isRetx, *hqP);
-
+
if(totDataReq > 0 && ret == ROK)
{
SCH_ALLOC(dciInfo, sizeof(DciInfo));