#include "du_app_mac_inf.h"
#include "mac_sch_interface.h"
#include "sch.h"
+#include "sch_tmr.h"
#include "sch_utils.h"
/**
UlSchedInfo ulSchedInfo;
SchUlSlotInfo *schUlSlotInfo = NULLP;
SlotTimingInfo ulTimingInfo;
+ CmLList *node = NULLP;
+ TotalPrbUsage *ulTotalPrbUsage = NULLP;
+
memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
/* add PHY delta */
memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
}
- //send msg to MAC
+ /* Send msg to MAC */
ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
if(ret != ROK)
{
DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
}
+ /* Update DL PRB Usage for all stats group which requested for DL Total PRB Usage */
+ node = cmLListFirst(&schCb[schInst].statistics.activeKpiList.ulTotPrbUseList);
+ while(node)
+ {
+ ulTotalPrbUsage = (TotalPrbUsage *)node->node;
+ ulTotalPrbUsage->numPrbUsedForTx += schUlSlotInfo->prbAlloc.numPrbAlloc;
+ ulTotalPrbUsage->totalPrbAvailForTx += MAX_NUM_RB;
+ node = node->next;
+ }
+
+ /* Re-initialize UL Slot */
schInitUlSlot(schUlSlotInfo);
return ret;
}
uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
{
uint8_t ueId=0;
- uint8_t cwCount = 0;
+ uint8_t cwCount = 0, rbgCount = 0, pdcchStartSymbol = 0;
PdcchCfg *pdcch = NULLP;
PdschCfg *pdsch = NULLP;
BwpCfg *bwp = NULLP;
SchUeCb ueCb;
SchControlRsrcSet coreset1;
+ SchSearchSpace searchSpace;
SchPdschConfig pdschCfg;
uint8_t dmrsStartSymbol, startSymbol, numSymbol;
GET_UE_ID(crnti, ueId);
ueCb = cell->ueCb[ueId-1];
coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
+ searchSpace = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.searchSpcToAddModList[0];
pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
/* fill BWP */
bwp->cyclicPrefix = cell->sib1SchCfg.bwp.cyclicPrefix;
/* fill the PDCCH PDU */
- //Considering coreset1 also starts from same symbol as coreset0
- pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
+ /*StartSymbol of PDCCH*/
+ pdcchStartSymbol = findSsStartSymbol(searchSpace.mSymbolsWithinSlot);
+ if(pdcchStartSymbol < MAX_SYMB_PER_SLOT)
+ pdcch->coresetCfg.startSymbolIndex = pdcchStartSymbol;
+ else
+ {
+ DU_LOG("\nERROR --> SCH : Invalid SymbolIndex in schDlRsrcAllocDlMsg");
+ return RFAILED;
+ }
pdcch->coresetCfg.durationSymbols = coreset1.duration;
memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
- //Considering number of RBs in coreset1 is same as coreset0
- pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
+
+ /*Size of coreset: Number of PRBs in a coreset*/
+ rbgCount = countRBGFrmCoresetFreqRsrc(coreset1.freqDomainRsrc);
+ if(rbgCount)
+ {
+ pdcch->coresetCfg.coreSetSize = ((rbgCount) * NUM_PRBS_PER_RBG);
+ }
+ else
+ {
+ DU_LOG("\nERROR --> SCH : CORESETSize is zero in schDlRsrcAllocDlMsg");
+ return RFAILED;
+ }
+
pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
pdcch->numDlDci = 1;
pdcch->dci.rnti = ueCb.crnti;
pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
pdcch->dci.scramblingRnti = 0;
+
+ /*TODO below assumptions of CCE Index is wrong:
+ * Range 0 to 135 as per ORAN.WG8.AAD Table 9-35 CORESET configuration and
+ * it has to be calculated using the formula given in 3GPP TS 38.213, Sec 10.1 */
pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
pdcch->dci.aggregLevel = 4;
pdcch->dci.beamPdcchInfo.numPrgs = 1;
/* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
k0K1InfoTbl->tblSize = cell->numSlots;
- totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
+ totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
/* Storing time domain resource allocation list based on common or
* dedicated configuration availability. */
k2InfoTbl->tblSize = cell->numSlots;
if(msg3K2InfoTbl)
msg3K2InfoTbl->tblSize = cell->numSlots;
- totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
+ totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
/* Checking all possible indexes for K2. */
for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
k2Val = timeDomRsrcAllocList[k2Index].k2;
if(!k2Val)
{
- switch(cell->cellCfg.scsCommon)
+ switch(cell->cellCfg.ssbScs)
{
case SCS_15KHZ:
k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
if(msg3K2InfoTbl)
{
- msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
+ msg3Delta = puschDeltaTable[cell->numerology];
/* Check for K2 for MSG3 */
/* Current slot + k2 should be either UL or FLEXI slot.
* Functionality:
* fill DL message information for MSG4 and Dedicated DL Msg
*
-* @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
+* @params[in] DlMsgInfo *dlMsgInfo, uint16_t crnti
* @params[in] bool isRetx, SchDlHqProcCb *hqP
* @return void
*
*******************************************************************/
-void fillDlMsgInfo(DlMsgSchInfo *dlMsgSchInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
+void fillDlMsgInfo(DlMsgSchInfo *dlMsgSchInfo, uint16_t crnti, bool isRetx, SchDlHqProcCb *hqP)
{
hqP->tbInfo[0].isEnabled = TRUE;
hqP->tbInfo[0].state = HQ_TB_WAITING;
if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
#endif
{
- if(ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
- k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2InfoTbl;
+ if(ueCb->k2TblPrsnt)
+ k2InfoTbl = &ueCb->k2InfoTbl;
else
k2InfoTbl = &cell->k2InfoTbl;
{
k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
- if(!ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
+ if(!ueCb->k2TblPrsnt)
{
k2Val = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
startSymb = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
SlotTimingInfo currTime, msg3TempTime;
currTime = cell->slotInfo;
- puschMu = cell->cellCfg.numerology;
+ puschMu = cell->numerology;
if (isRetx)
{
{
numK2 = cell->msg3K2InfoTbl.k2TimingInfo[dlTime].numK2;
msg3K2InfoTbl = &cell->k2InfoTbl;
- msg3MinSchTime = minMsg3SchTime[cell->cellCfg.numerology];
+ msg3MinSchTime = minMsg3SchTime[cell->numerology];
msg3Delta = puschDeltaTable[puschMu];
}